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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Acked-by: Kai Ji ________________________________ From: Power, Ciara Sent: 15 November 2023 16:14 To: dev@dpdk.org Cc: Kusztal, ArkadiuszX ; Power, Ciara ; stable@dpdk.org ; Ji, Kai Subject: [PATCH v2] crypto/qat: fix gen3 legacy capabilities When the legacy capability flag was enabled for QAT GEN3, in the case of the last legacy capability in the list being SM3 or SM4, when no slice is on the device, the loop continues instead of checking if the end of the legacy capbilities list has been met. To fix this, the check for the end of the legacy capabilities list is moved to the top of the loop, so it is detected when the last legacy element is SM and no SM slice exists. Fixes: cffb726b7797 ("crypto/qat: enable insecure algorithms") Cc: stable@dpdk.org Signed-off-by: Ciara Power --- v2: updating sender email --- drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c b/drivers/crypto/= qat/dev/qat_crypto_pmd_gen3.c index 0a939161f9..150f77ab0c 100644 --- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c +++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c @@ -232,6 +232,13 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_priva= te *internals, } for (i =3D 0; i < capa_num; i++, iter++) { + if (unlikely(qat_legacy_capa) && (i =3D=3D legacy_capa_num)= ) { + capabilities =3D qat_sym_crypto_caps_gen3; + addr +=3D curr_capa; + curr_capa =3D 0; + iter =3D 0; + } + if (slice_map & ICP_ACCEL_MASK_SM4_SLICE && ( check_cipher_capa(&capabilities[iter], RTE_CRYPTO_CIPHER_SM4_ECB) || @@ -249,13 +256,6 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_priva= te *internals, memcpy(addr + curr_capa, capabilities + iter, sizeof(struct rte_cryptodev_capabilities)); curr_capa++; - - if (unlikely(qat_legacy_capa) && (i =3D=3D legacy_capa_num-= 1)) { - capabilities =3D qat_sym_crypto_caps_gen3; - addr +=3D curr_capa; - curr_capa =3D 0; - iter =3D -1; - } } internals->qat_dev_capabilities =3D internals->capa_mz->addr; -- 2.25.1 --_000_SN6PR11MB34084E09F19AD0C9F899975981B1ASN6PR11MB3408namp_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable
Acked-by: Kai Ji <kai.j= i@intel.com>
From: Power, Ciara <ciar= a.power@intel.com>
Sent: 15 November 2023 16:14
To: dev@dpdk.org <dev@dpdk.org>
Cc: Kusztal, ArkadiuszX <arkadiuszx.kusztal@intel.com>; Power,= Ciara <ciara.power@intel.com>; stable@dpdk.org <stable@dpdk.org&g= t;; Ji, Kai <kai.ji@intel.com>
Subject: [PATCH v2] crypto/qat: fix gen3 legacy capabilities
 
When the legacy capability flag was enabled for QA= T GEN3,
in the case of the last legacy capability in the list being SM3 or SM4,
when no slice is on the device, the loop continues instead of checking
if the end of the legacy capbilities list has been met.

To fix this, the check for the end of the legacy capabilities list is
moved to the top of the loop, so it is detected when the last legacy
element is SM and no SM slice exists.

Fixes: cffb726b7797 ("crypto/qat: enable insecure algorithms") Cc: stable@dpdk.org

Signed-off-by: Ciara Power <ciara.power@intel.com>

---
v2: updating sender email
---
 drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c b/drivers/crypto/= qat/dev/qat_crypto_pmd_gen3.c
index 0a939161f9..150f77ab0c 100644
--- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c
+++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c
@@ -232,6 +232,13 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_priva= te *internals,
         }
 
         for (i =3D 0; i < capa_= num; i++, iter++) {
+            &n= bsp;  if (unlikely(qat_legacy_capa) && (i =3D=3D legacy_capa_n= um)) {
+            &n= bsp;          capabilities =3D= qat_sym_crypto_caps_gen3;
+            &n= bsp;          addr +=3D curr_c= apa;
+            &n= bsp;          curr_capa =3D 0;=
+            &n= bsp;          iter =3D 0;
+            &n= bsp;  }
+
            &nb= sp;    if (slice_map & ICP_ACCEL_MASK_SM4_SLICE &&am= p; (
            &nb= sp;            check= _cipher_capa(&capabilities[iter],
            &nb= sp;            =         RTE_CRYPTO_CIPHER_SM4_ECB) || @@ -249,13 +256,6 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_priva= te *internals,
            &nb= sp;    memcpy(addr + curr_capa, capabilities + iter,
            &nb= sp;            sizeo= f(struct rte_cryptodev_capabilities));
            &nb= sp;    curr_capa++;
-
-            &n= bsp;  if (unlikely(qat_legacy_capa) && (i =3D=3D legacy_capa_n= um-1)) {
-            &n= bsp;          capabilities =3D= qat_sym_crypto_caps_gen3;
-            &n= bsp;          addr +=3D curr_c= apa;
-            &n= bsp;          curr_capa =3D 0;=
-            &n= bsp;          iter =3D -1;
-            &n= bsp;  }
         }
         internals->qat_dev_capa= bilities =3D internals->capa_mz->addr;
 
--
2.25.1

--_000_SN6PR11MB34084E09F19AD0C9F899975981B1ASN6PR11MB3408namp_--