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Wed, 25 Mar 2020 09:53:02 +0000 Received: from VE1PR04MB6639.eurprd04.prod.outlook.com ([fe80::8060:a35c:4858:c490]) by VE1PR04MB6639.eurprd04.prod.outlook.com ([fe80::8060:a35c:4858:c490%7]) with mapi id 15.20.2835.023; Wed, 25 Mar 2020 09:53:02 +0000 From: Akhil Goyal To: Nicolas Chautru , "thomas@monjalon.net" , "dev@dpdk.org" CC: "ferruh.yigit@intel.com" Thread-Topic: [PATCH v3 01/14] bbdev: add capability flag for filler bits inclusion in HARQ Thread-Index: AQHV8lZyISQj9bxoh02PdNFwCeFqyqhZMNpA Date: Wed, 25 Mar 2020 09:53:01 +0000 Message-ID: References: <1582778348-113547-15-git-send-email-nicolas.chautru@intel.com> <1583348102-13253-1-git-send-email-nicolas.chautru@intel.com> <1583348102-13253-2-git-send-email-nicolas.chautru@intel.com> In-Reply-To: <1583348102-13253-2-git-send-email-nicolas.chautru@intel.com> Accept-Language: en-IN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=akhil.goyal@nxp.com; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: d44884e3-5d47-4c3e-9de7-08d7d0a24ecd X-MS-Exchange-CrossTenant-originalarrivaltime: 25 Mar 2020 09:53:01.9823 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: nWtDlYr0CtT2vupDeiBO/YuJH3Uo70NSpNJ4xnKegQcCohXwzoYOQ1cSrra7XgqfeS2Pi7OSQX9w7FNhsxdDHg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR04MB6558 Subject: Re: [dpdk-dev] [PATCH v3 01/14] bbdev: add capability flag for filler bits inclusion in HARQ X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > From: Nic Chautru >=20 > Adding capability flag for device variants when HARQ buffer > may or may not include the filler bits. > Minor cosmetic changes in same file. >=20 > Signed-off-by: Nic Chautru > --- > lib/librte_bbdev/rte_bbdev.h | 2 ++ > lib/librte_bbdev/rte_bbdev_op.h | 12 ++++++++++-- > 2 files changed, 12 insertions(+), 2 deletions(-) >=20 > diff --git a/lib/librte_bbdev/rte_bbdev.h b/lib/librte_bbdev/rte_bbdev.h > index 591fb79..b2da190 100644 > --- a/lib/librte_bbdev/rte_bbdev.h > +++ b/lib/librte_bbdev/rte_bbdev.h > @@ -607,6 +607,7 @@ struct __rte_cache_aligned rte_bbdev { > * @param ops > * Pointer array where operations will be dequeued to. Must have at le= ast > * @p num_ops entries > + * ie. A pointer to a table of void * pointers (ops) that will be fill= ed. > * @param num_ops > * The maximum number of operations to dequeue. > * > @@ -638,6 +639,7 @@ struct __rte_cache_aligned rte_bbdev { > * @param ops > * Pointer array where operations will be dequeued to. Must have at le= ast > * @p num_ops entries > + * ie. A pointer to a table of void * pointers (ops) that will be fill= ed. > * @param num_ops > * The maximum number of operations to dequeue. > * > diff --git a/lib/librte_bbdev/rte_bbdev_op.h b/lib/librte_bbdev/rte_bbdev= _op.h > index 1e119a7..062f9ff 100644 > --- a/lib/librte_bbdev/rte_bbdev_op.h > +++ b/lib/librte_bbdev/rte_bbdev_op.h > @@ -31,8 +31,11 @@ > #define RTE_BBDEV_TURBO_MAX_TB_SIZE (391656) > /* Maximum size of Code Block (36.212, Table 5.1.3-3) */ > #define RTE_BBDEV_TURBO_MAX_CB_SIZE (6144) > -/* Maximum size of Code Block */ > +/* Maximum size of Code Block */ > #define RTE_BBDEV_LDPC_MAX_CB_SIZE (8448) > +/* Minimum size of Code Block */ > +#define RTE_BBDEV_LDPC_MIN_CB_SIZE (40) > + > /* Minimum size of Code Block (36.212, Table 5.1.3-3) */ > #define RTE_BBDEV_TURBO_MIN_CB_SIZE (40) > /* Maximum size of circular buffer */ > @@ -177,7 +180,12 @@ enum rte_bbdev_op_ldpcdec_flag_bitmasks { > /** Set if a device supports loop-back access to > * HARQ internal memory. Intended for troubleshooting. > */ > - RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_LOOPBACK =3D (1ULL << > 17) > + RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_LOOPBACK =3D (1ULL << > 17), > + /** Set if a device includes LLR filler bits in the circular buffer > + * for HARQ memory. If not set, it is assumed the filler are not in Filler bits are not > + * HARQ memory and handled directory by the LDPC decoder. Handled directly by the LDPC decoder > + */ > + RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS =3D (1ULL << 18) > }; >=20 > /** Flags for LDPC encoder operation and capability structure */ > -- > 1.8.3.1