From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR04-VI1-obe.outbound.protection.outlook.com (mail-eopbgr80055.outbound.protection.outlook.com [40.107.8.55]) by dpdk.org (Postfix) with ESMTP id 66B58B62 for ; Thu, 2 May 2019 06:13:13 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=yJdgmqsJo4cNegn1u2Np1SGpofTrXJfSqBhW2Al8s3o=; b=cj84xsXhDpA6xtq4IZXJTz0DERfcu/q7E/LBlWBWZ5223QKW4mTjBFIw8WMpkgaV/OKnyNG90e6Ef/Z8cxhzT2WEQjGn/zs3CNNghnk+FltOQfpFI3obUZ7OCsgOjBXRXg1lYEB86kYMI1LkA5r01goBYMRUaq0RSM4Ti2QI5XU= Received: from VE1PR08MB5149.eurprd08.prod.outlook.com (20.179.30.152) by VE1PR08MB5182.eurprd08.prod.outlook.com (20.179.31.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1856.11; Thu, 2 May 2019 04:13:12 +0000 Received: from VE1PR08MB5149.eurprd08.prod.outlook.com ([fe80::9b6:3403:4386:78]) by VE1PR08MB5149.eurprd08.prod.outlook.com ([fe80::9b6:3403:4386:78%2]) with mapi id 15.20.1835.018; Thu, 2 May 2019 04:13:12 +0000 From: Honnappa Nagarahalli To: "yskoh@mellanox.com" , "jerinj@marvell.com" , "shahafs@mellanox.com" , "thomas@monjalon.net" CC: "dev@dpdk.org" , "bruce.richardson@intel.com" , "pbhagavatula@marvell.com" , "Gavin Hu (Arm Technology China)" , Honnappa Nagarahalli , nd , nd Thread-Topic: [PATCH 1/2] build: add option for armv8 crypto extension Thread-Index: AQHVAIqJi6+tD8kKt0qrWwX0uZr+wKZXNayg Date: Thu, 2 May 2019 04:13:11 +0000 Message-ID: References: <20190502015806.41497-1-yskoh@mellanox.com> In-Reply-To: <20190502015806.41497-1-yskoh@mellanox.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Honnappa.Nagarahalli@arm.com; x-originating-ip: [217.140.111.135] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 0bf4ca17-601e-421e-585c-08d6ceb47de3 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600141)(711020)(4605104)(4618075)(2017052603328)(7193020); SRVR:VE1PR08MB5182; x-ms-traffictypediagnostic: VE1PR08MB5182: x-ld-processed: f34e5979-57d9-4aaa-ad4d-b122a662184d,ExtAddr nodisclaimer: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:10000; x-forefront-prvs: 0025434D2D x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(376002)(136003)(366004)(346002)(396003)(39860400002)(199004)(189003)(66946007)(73956011)(2201001)(256004)(76116006)(14454004)(229853002)(6246003)(6436002)(4326008)(53936002)(6506007)(72206003)(71200400001)(9686003)(71190400001)(102836004)(25786009)(66446008)(64756008)(66556008)(478600001)(66066001)(55016002)(66476007)(14444005)(5660300002)(86362001)(81166006)(7736002)(81156014)(2906002)(8676002)(99286004)(26005)(52536014)(2501003)(7696005)(305945005)(76176011)(74316002)(186003)(316002)(446003)(33656002)(110136005)(3846002)(8936002)(6116002)(486006)(476003)(54906003)(11346002)(68736007); DIR:OUT; SFP:1101; SCL:1; SRVR:VE1PR08MB5182; H:VE1PR08MB5149.eurprd08.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: /R9Loprercwfp0h7Edn/y5b+8yQbjEIOVr1eV+WWapwBa1FcPV8Ac6Zn/7sE47kIVMv8JORZpmI0Ys1jHHyeLdxXzp4o+LIY8UE+1no4hC/TTi3WM0qTMOsm90LLY2C361aa7HmcRHH74JokcZRFSjrs9DTE9ffokZjPaLaE7QO5fXNJLhIERNx5f0HS6yhj5w6d1osuEYjDJB9HNgtv6ahXOr304tSqUXBkotvoU/oqD3EeGdr9jIhPTzLD4rl9MUL7youp07x0ZDrc+7Q4N1bG19+J5rQocwWM7fwX6Gv4ewbDlRUmtnVB0JidVDtxI05h4WwzHCHYCybBYsYUV69cigd/A+tBF7cIn//VK20UN5+vpqsQ1iRcjgnRSpwG3MJISKgRWyGGVGl3isUU/psV320AzzZ9QwZY4f8ptSk= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0bf4ca17-601e-421e-585c-08d6ceb47de3 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 May 2019 04:13:11.9859 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR08MB5182 Subject: Re: [dpdk-dev] [PATCH 1/2] build: add option for armv8 crypto extension X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 02 May 2019 04:13:13 -0000 > Per armv8 crypto extension support, make build always enable it by defaul= t > as long as compiler supports the feature while meson build only enables i= t for > 'default' machine of generic armv8 architecture. For example, specifying = '- > mcpu=3Dcortex-a72' doesn't enable it but '+crypto' is required in order t= o > enable the feature. >=20 > It is also known that not all the armv8 platforms have the crypto extensi= on. > For example, Mellanox BlueField has a variant which doesn't have it. If c= rypto > enabled binary runs on such a platform, rte_eal_init() fails. >=20 > Therefore, an option to control this feature is necessary. It is still en= abled by > default but can be selectively disabled by vendors. The distro/binary portable image needs to be built without crypto. Only the= crypto drivers need to be built with crypto and at run time we need to hoo= k up the correct function pointers. So, IMO, by default crypto should be di= sabled and should be enabled in specific target machine configs.=20 >=20 > Signed-off-by: Yongseok Koh > --- > config/arm/meson.build | 16 +++++++++------- > config/common_armv8a_linux | 1 + > drivers/crypto/armv8/Makefile | 4 ++++ > meson_options.txt | 2 ++ > mk/machine/armv8a/rte.vars.mk | 4 ++++ > 5 files changed, 20 insertions(+), 7 deletions(-) >=20 > diff --git a/config/arm/meson.build b/config/arm/meson.build index > 7fa6ed3105..3b53842d08 100644 > --- a/config/arm/meson.build > +++ b/config/arm/meson.build > @@ -8,6 +8,8 @@ march_opt =3D '-march=3D@0@'.format(machine) > arm_force_native_march =3D false arm_force_default_march =3D (machine = =3D=3D > 'default') >=20 > +crypto_flag =3D get_option('enable_armv8_crypto') ? '+crypto' : '' > + > flags_common_default =3D [ > # Accelarate rte_memcpy. Be sure to run unit test > (memcpy_perf_autotest) > # to determine the best threshold in code. Refer to notes in source > file @@ -74,14 +76,14 @@ flags_octeontx2_extra =3D [ > ['RTE_USE_C11_MEM_MODEL', true]] >=20 > machine_args_generic =3D [ > - ['default', ['-march=3Darmv8-a+crc+crypto']], > + ['default', ['-march=3Darmv8-a+crc' + crypto_flag]], > ['native', ['-march=3Dnative']], > - ['0xd03', ['-mcpu=3Dcortex-a53']], > - ['0xd04', ['-mcpu=3Dcortex-a35']], > - ['0xd07', ['-mcpu=3Dcortex-a57']], > - ['0xd08', ['-mcpu=3Dcortex-a72']], > - ['0xd09', ['-mcpu=3Dcortex-a73']], > - ['0xd0a', ['-mcpu=3Dcortex-a75']]] > + ['0xd03', ['-mcpu=3Dcortex-a53' + crypto_flag]], > + ['0xd04', ['-mcpu=3Dcortex-a35' + crypto_flag]], > + ['0xd07', ['-mcpu=3Dcortex-a57' + crypto_flag]], > + ['0xd08', ['-mcpu=3Dcortex-a72' + crypto_flag]], > + ['0xd09', ['-mcpu=3Dcortex-a73' + crypto_flag]], > + ['0xd0a', ['-mcpu=3Dcortex-a75' + crypto_flag]]] >=20 > machine_args_cavium =3D [ > ['default', ['-march=3Darmv8-a+crc+crypto','-mcpu=3Dthunderx']], > diff --git a/config/common_armv8a_linux b/config/common_armv8a_linux > index 72091de1c7..0efa3e2eb2 100644 > --- a/config/common_armv8a_linux > +++ b/config/common_armv8a_linux > @@ -5,6 +5,7 @@ > #include "common_linux" >=20 > CONFIG_RTE_MACHINE=3D"armv8a" > +CONFIG_RTE_ENABLE_ARMV8_CRYPTO=3Dy >=20 > CONFIG_RTE_ARCH=3D"arm64" > CONFIG_RTE_ARCH_ARM64=3Dy > diff --git a/drivers/crypto/armv8/Makefile b/drivers/crypto/armv8/Makefil= e > index f71f6b14a4..867a5206cf 100644 > --- a/drivers/crypto/armv8/Makefile > +++ b/drivers/crypto/armv8/Makefile > @@ -4,6 +4,10 @@ >=20 > include $(RTE_SDK)/mk/rte.vars.mk >=20 > +ifneq ($(CONFIG_RTE_ENABLE_ARMV8_CRYPTO),y) > +$(error "Please enable CONFIG_RTE_ENABLE_ARMV8_CRYPTO") endif > + > ifneq ($(MAKECMDGOALS),clean) > ifneq ($(MAKECMDGOALS),config) > ifeq ($(ARMV8_CRYPTO_LIB_PATH),) > diff --git a/meson_options.txt b/meson_options.txt index > 16d9f92c65..4ca09771de 100644 > --- a/meson_options.txt > +++ b/meson_options.txt > @@ -4,6 +4,8 @@ option('allow_invalid_socket_id', type: 'boolean', value: > false, > description: 'allow out-of-range NUMA socket id\'s for platforms that > don\'t report the value correctly') option('drivers_install_subdir', typ= e: > 'string', value: 'dpdk/pmds-', > description: 'Subdirectory of libdir where to install PMDs. Defaults to > using a versioned subdirectory.') > +option('enable_armv8_crypto', type: 'boolean', value: true, > + description: 'enable armv8 crypto extension') > option('enable_docs', type: 'boolean', value: false, > description: 'build documentation') > option('enable_kmods', type: 'boolean', value: true, diff --git > a/mk/machine/armv8a/rte.vars.mk b/mk/machine/armv8a/rte.vars.mk index > 8252efbb7b..4893d01a2d 100644 > --- a/mk/machine/armv8a/rte.vars.mk > +++ b/mk/machine/armv8a/rte.vars.mk > @@ -28,4 +28,8 @@ > # CPU_LDFLAGS =3D > # CPU_ASFLAGS =3D >=20 > +ifeq ($(CONFIG_RTE_ENABLE_ARMV8_CRYPTO),y) > MACHINE_CFLAGS +=3D -march=3Darmv8-a+crc+crypto > +else > +MACHINE_CFLAGS +=3D -march=3Darmv8-a+crc > +endif > -- > 2.11.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id C2F8CA0AC5 for ; Thu, 2 May 2019 06:13:15 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 949E5DE3; Thu, 2 May 2019 06:13:15 +0200 (CEST) Received: from EUR04-VI1-obe.outbound.protection.outlook.com (mail-eopbgr80055.outbound.protection.outlook.com [40.107.8.55]) by dpdk.org (Postfix) with ESMTP id 66B58B62 for ; Thu, 2 May 2019 06:13:13 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=yJdgmqsJo4cNegn1u2Np1SGpofTrXJfSqBhW2Al8s3o=; b=cj84xsXhDpA6xtq4IZXJTz0DERfcu/q7E/LBlWBWZ5223QKW4mTjBFIw8WMpkgaV/OKnyNG90e6Ef/Z8cxhzT2WEQjGn/zs3CNNghnk+FltOQfpFI3obUZ7OCsgOjBXRXg1lYEB86kYMI1LkA5r01goBYMRUaq0RSM4Ti2QI5XU= Received: from VE1PR08MB5149.eurprd08.prod.outlook.com (20.179.30.152) by VE1PR08MB5182.eurprd08.prod.outlook.com (20.179.31.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1856.11; Thu, 2 May 2019 04:13:12 +0000 Received: from VE1PR08MB5149.eurprd08.prod.outlook.com ([fe80::9b6:3403:4386:78]) by VE1PR08MB5149.eurprd08.prod.outlook.com ([fe80::9b6:3403:4386:78%2]) with mapi id 15.20.1835.018; Thu, 2 May 2019 04:13:12 +0000 From: Honnappa Nagarahalli To: "yskoh@mellanox.com" , "jerinj@marvell.com" , "shahafs@mellanox.com" , "thomas@monjalon.net" CC: "dev@dpdk.org" , "bruce.richardson@intel.com" , "pbhagavatula@marvell.com" , "Gavin Hu (Arm Technology China)" , Honnappa Nagarahalli , nd , nd Thread-Topic: [PATCH 1/2] build: add option for armv8 crypto extension Thread-Index: AQHVAIqJi6+tD8kKt0qrWwX0uZr+wKZXNayg Date: Thu, 2 May 2019 04:13:11 +0000 Message-ID: References: <20190502015806.41497-1-yskoh@mellanox.com> In-Reply-To: <20190502015806.41497-1-yskoh@mellanox.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Honnappa.Nagarahalli@arm.com; x-originating-ip: [217.140.111.135] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 0bf4ca17-601e-421e-585c-08d6ceb47de3 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600141)(711020)(4605104)(4618075)(2017052603328)(7193020); SRVR:VE1PR08MB5182; x-ms-traffictypediagnostic: VE1PR08MB5182: x-ld-processed: f34e5979-57d9-4aaa-ad4d-b122a662184d,ExtAddr nodisclaimer: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:10000; x-forefront-prvs: 0025434D2D x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(376002)(136003)(366004)(346002)(396003)(39860400002)(199004)(189003)(66946007)(73956011)(2201001)(256004)(76116006)(14454004)(229853002)(6246003)(6436002)(4326008)(53936002)(6506007)(72206003)(71200400001)(9686003)(71190400001)(102836004)(25786009)(66446008)(64756008)(66556008)(478600001)(66066001)(55016002)(66476007)(14444005)(5660300002)(86362001)(81166006)(7736002)(81156014)(2906002)(8676002)(99286004)(26005)(52536014)(2501003)(7696005)(305945005)(76176011)(74316002)(186003)(316002)(446003)(33656002)(110136005)(3846002)(8936002)(6116002)(486006)(476003)(54906003)(11346002)(68736007); DIR:OUT; SFP:1101; SCL:1; SRVR:VE1PR08MB5182; H:VE1PR08MB5149.eurprd08.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: /R9Loprercwfp0h7Edn/y5b+8yQbjEIOVr1eV+WWapwBa1FcPV8Ac6Zn/7sE47kIVMv8JORZpmI0Ys1jHHyeLdxXzp4o+LIY8UE+1no4hC/TTi3WM0qTMOsm90LLY2C361aa7HmcRHH74JokcZRFSjrs9DTE9ffokZjPaLaE7QO5fXNJLhIERNx5f0HS6yhj5w6d1osuEYjDJB9HNgtv6ahXOr304tSqUXBkotvoU/oqD3EeGdr9jIhPTzLD4rl9MUL7youp07x0ZDrc+7Q4N1bG19+J5rQocwWM7fwX6Gv4ewbDlRUmtnVB0JidVDtxI05h4WwzHCHYCybBYsYUV69cigd/A+tBF7cIn//VK20UN5+vpqsQ1iRcjgnRSpwG3MJISKgRWyGGVGl3isUU/psV320AzzZ9QwZY4f8ptSk= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0bf4ca17-601e-421e-585c-08d6ceb47de3 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 May 2019 04:13:11.9859 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR08MB5182 Subject: Re: [dpdk-dev] [PATCH 1/2] build: add option for armv8 crypto extension X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190502041311.EZsCt172fnDnx_Ds0dMW-915FSL84nNYxnmrvEe9C6c@z> > Per armv8 crypto extension support, make build always enable it by defaul= t > as long as compiler supports the feature while meson build only enables i= t for > 'default' machine of generic armv8 architecture. For example, specifying = '- > mcpu=3Dcortex-a72' doesn't enable it but '+crypto' is required in order t= o > enable the feature. >=20 > It is also known that not all the armv8 platforms have the crypto extensi= on. > For example, Mellanox BlueField has a variant which doesn't have it. If c= rypto > enabled binary runs on such a platform, rte_eal_init() fails. >=20 > Therefore, an option to control this feature is necessary. It is still en= abled by > default but can be selectively disabled by vendors. The distro/binary portable image needs to be built without crypto. Only the= crypto drivers need to be built with crypto and at run time we need to hoo= k up the correct function pointers. So, IMO, by default crypto should be di= sabled and should be enabled in specific target machine configs.=20 >=20 > Signed-off-by: Yongseok Koh > --- > config/arm/meson.build | 16 +++++++++------- > config/common_armv8a_linux | 1 + > drivers/crypto/armv8/Makefile | 4 ++++ > meson_options.txt | 2 ++ > mk/machine/armv8a/rte.vars.mk | 4 ++++ > 5 files changed, 20 insertions(+), 7 deletions(-) >=20 > diff --git a/config/arm/meson.build b/config/arm/meson.build index > 7fa6ed3105..3b53842d08 100644 > --- a/config/arm/meson.build > +++ b/config/arm/meson.build > @@ -8,6 +8,8 @@ march_opt =3D '-march=3D@0@'.format(machine) > arm_force_native_march =3D false arm_force_default_march =3D (machine = =3D=3D > 'default') >=20 > +crypto_flag =3D get_option('enable_armv8_crypto') ? '+crypto' : '' > + > flags_common_default =3D [ > # Accelarate rte_memcpy. Be sure to run unit test > (memcpy_perf_autotest) > # to determine the best threshold in code. Refer to notes in source > file @@ -74,14 +76,14 @@ flags_octeontx2_extra =3D [ > ['RTE_USE_C11_MEM_MODEL', true]] >=20 > machine_args_generic =3D [ > - ['default', ['-march=3Darmv8-a+crc+crypto']], > + ['default', ['-march=3Darmv8-a+crc' + crypto_flag]], > ['native', ['-march=3Dnative']], > - ['0xd03', ['-mcpu=3Dcortex-a53']], > - ['0xd04', ['-mcpu=3Dcortex-a35']], > - ['0xd07', ['-mcpu=3Dcortex-a57']], > - ['0xd08', ['-mcpu=3Dcortex-a72']], > - ['0xd09', ['-mcpu=3Dcortex-a73']], > - ['0xd0a', ['-mcpu=3Dcortex-a75']]] > + ['0xd03', ['-mcpu=3Dcortex-a53' + crypto_flag]], > + ['0xd04', ['-mcpu=3Dcortex-a35' + crypto_flag]], > + ['0xd07', ['-mcpu=3Dcortex-a57' + crypto_flag]], > + ['0xd08', ['-mcpu=3Dcortex-a72' + crypto_flag]], > + ['0xd09', ['-mcpu=3Dcortex-a73' + crypto_flag]], > + ['0xd0a', ['-mcpu=3Dcortex-a75' + crypto_flag]]] >=20 > machine_args_cavium =3D [ > ['default', ['-march=3Darmv8-a+crc+crypto','-mcpu=3Dthunderx']], > diff --git a/config/common_armv8a_linux b/config/common_armv8a_linux > index 72091de1c7..0efa3e2eb2 100644 > --- a/config/common_armv8a_linux > +++ b/config/common_armv8a_linux > @@ -5,6 +5,7 @@ > #include "common_linux" >=20 > CONFIG_RTE_MACHINE=3D"armv8a" > +CONFIG_RTE_ENABLE_ARMV8_CRYPTO=3Dy >=20 > CONFIG_RTE_ARCH=3D"arm64" > CONFIG_RTE_ARCH_ARM64=3Dy > diff --git a/drivers/crypto/armv8/Makefile b/drivers/crypto/armv8/Makefil= e > index f71f6b14a4..867a5206cf 100644 > --- a/drivers/crypto/armv8/Makefile > +++ b/drivers/crypto/armv8/Makefile > @@ -4,6 +4,10 @@ >=20 > include $(RTE_SDK)/mk/rte.vars.mk >=20 > +ifneq ($(CONFIG_RTE_ENABLE_ARMV8_CRYPTO),y) > +$(error "Please enable CONFIG_RTE_ENABLE_ARMV8_CRYPTO") endif > + > ifneq ($(MAKECMDGOALS),clean) > ifneq ($(MAKECMDGOALS),config) > ifeq ($(ARMV8_CRYPTO_LIB_PATH),) > diff --git a/meson_options.txt b/meson_options.txt index > 16d9f92c65..4ca09771de 100644 > --- a/meson_options.txt > +++ b/meson_options.txt > @@ -4,6 +4,8 @@ option('allow_invalid_socket_id', type: 'boolean', value: > false, > description: 'allow out-of-range NUMA socket id\'s for platforms that > don\'t report the value correctly') option('drivers_install_subdir', typ= e: > 'string', value: 'dpdk/pmds-', > description: 'Subdirectory of libdir where to install PMDs. Defaults to > using a versioned subdirectory.') > +option('enable_armv8_crypto', type: 'boolean', value: true, > + description: 'enable armv8 crypto extension') > option('enable_docs', type: 'boolean', value: false, > description: 'build documentation') > option('enable_kmods', type: 'boolean', value: true, diff --git > a/mk/machine/armv8a/rte.vars.mk b/mk/machine/armv8a/rte.vars.mk index > 8252efbb7b..4893d01a2d 100644 > --- a/mk/machine/armv8a/rte.vars.mk > +++ b/mk/machine/armv8a/rte.vars.mk > @@ -28,4 +28,8 @@ > # CPU_LDFLAGS =3D > # CPU_ASFLAGS =3D >=20 > +ifeq ($(CONFIG_RTE_ENABLE_ARMV8_CRYPTO),y) > MACHINE_CFLAGS +=3D -march=3Darmv8-a+crc+crypto > +else > +MACHINE_CFLAGS +=3D -march=3Darmv8-a+crc > +endif > -- > 2.11.0