From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id EC6E2A0096 for ; Wed, 5 Jun 2019 23:06:01 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 11BFB1B9BB; Wed, 5 Jun 2019 23:06:01 +0200 (CEST) Received: from EUR01-DB5-obe.outbound.protection.outlook.com (mail-eopbgr150073.outbound.protection.outlook.com [40.107.15.73]) by dpdk.org (Postfix) with ESMTP id 48B9E1B957 for ; Wed, 5 Jun 2019 23:05:59 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=VnBRmPrBWD4m7q5NmSUytD/dBQuQplJGghuJRCPCqYs=; b=fGSzXL7aGzhgL3R0Ou79I0X0+Q3fWt2o78I2QvKH+VRniRf9qpcK72qKUThpiML7yFGXqEDL44jGb3jy2d3DICxUDYSR8OEOjvd8wyoBDrBxEOTS1i8VtFyFrFVunbOk8WsBZQ+xaD/ayF5FnUHGLT36zyL+fspRUIliGN54lqE= Received: from VE1PR08MB5149.eurprd08.prod.outlook.com (20.179.30.152) by VE1PR08MB5007.eurprd08.prod.outlook.com (10.255.159.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1943.22; Wed, 5 Jun 2019 21:05:57 +0000 Received: from VE1PR08MB5149.eurprd08.prod.outlook.com ([fe80::9983:2882:a24:c0b0]) by VE1PR08MB5149.eurprd08.prod.outlook.com ([fe80::9983:2882:a24:c0b0%5]) with mapi id 15.20.1965.011; Wed, 5 Jun 2019 21:05:57 +0000 From: Honnappa Nagarahalli To: Aaron Conole , "thomas@monjalon.net" CC: "Ruifeng Wang (Arm Technology China)" , "Gavin Hu (Arm Technology China)" , Dharmik Thakkar , "jerin.jacob@caviumnetworks.com" , "yskoh@mellanox.com" , "dev@dpdk.org" , "msantana@redhat.com" , "bruce.richardson@intel.com" , Honnappa Nagarahalli , nd , nd Thread-Topic: DPDK compilation on arm is failing in Travis Thread-Index: AQHVG8wkMMMcaZRnn0ybtprtxInSOKaNdbmHgAAGj4CAAA8jI4AAAJnA Date: Wed, 5 Jun 2019 21:05:56 +0000 Message-ID: References: <18576498.0Zn3BvHS7Y@xps> <74282465.H2CcKukIUE@xps> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ts-tracking-id: 884e69ce-611b-406a-bf73-ee338f505173.0 x-checkrecipientchecked: true authentication-results: spf=none (sender IP is ) smtp.mailfrom=Honnappa.Nagarahalli@arm.com; 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DIR:OUT; SFP:1101; SCL:1; SRVR:VE1PR08MB5007; H:VE1PR08MB5149.eurprd08.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: 8Ya2h1L4V1d9kvzc4mGWYXCG0tuifhNOHrWnl7K60/lJP37Y8dPFLB0rRG7IcLmMbNC0q+KAGkGkhyPkhDGKWfyTCb57jpBSiYECL+XUqJlZoGrCeIC50s5lCMzNhWgCfJ+kQmGcCOzCNzzWQjZBTHJTsNDp0ZuWfhhu86DUP5D1FfNuZ/vaxLw9RXxZGxZBqmyViLxGFAFTqUAMXy4Z7wBMBDAyul+LkJdtqTd+QFqWS8OICaRYFYyMix/Ipra90wLj5AJgfZZsSl14Nq4eQ0Sqjz7+oNnaT4cnX0uCCOR/NInNtsP8ddor7J9ieyumJermko+rrQW8Jl4s1v3ZTAAIoP1tgVdUBjhGdkCfhQtGK9AbC+eOsgy7BsEj3ElM/H0E/87ooSU8iLJLVQVh0NKcyvzEiUgF2gbiAjB3RIs= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: 50d9956a-19f3-4b41-4b07-08d6e9f99ab2 X-MS-Exchange-CrossTenant-originalarrivaltime: 05 Jun 2019 21:05:56.9029 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Honnappa.Nagarahalli@arm.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR08MB5007 Subject: Re: [dpdk-dev] DPDK compilation on arm is failing in Travis X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" >=20 > Thomas Monjalon writes: >=20 > > 05/06/2019 21:40, Aaron Conole: > >> Thomas Monjalon writes: > >> > >> > The compilation of the master branch is failing for aarch64: > >> > https://travis-ci.com/DPDK/dpdk > >> > The log is so much verbose that I am not able to understand what is > >> > really wrong. > >> > Please help to diagnose and fix, thanks. > >> > >> A discussion about this: > >> > >> http://mails.dpdk.org/archives/dev/2019-June/134012.html > > > > I see the error now. > > It is printing the full log after the error, so I missed the error at > > the top. > > > > I've read your comment about a possible error with the patch removing > > weak functions but neither me nor Bruce were able to reproduce it. > > What is the condition to see this compiler warning? >=20 > It is only on ARM, and only when the neon intrinsics are in use. I am not able to reproduce it from the tip of master. I am using: gcc (Ubuntu 8.3.0-6ubuntu1~18.04) 8.3.0 >From the log on Travis, looks like the compiler is: gcc (Ubuntu 5.4.0-6ubuntu1~16.04.11) 5.4.0 20160609 Is this the issue? Why are we seeing the error now? >=20 > The issue is the vector lane setting code looks like: >=20 > lval =3D lane_set(scalar, rval, lane id) >=20 > In this case, 'rval' is being used before it is ever set, but it really c= ould be just 0 > for the first lane setting code. Thereafter, we use the old value of inp= ut as the > rval, but each time a different lane is set. >=20 > It would be nice if there were an intrinsic that formatted correctly from= the > start (something we could call like lval =3D lane_set_from_array(scalar_a= rray)). > Then 'input' would never appear as an rval before it was set. >=20 > I thought Jerin Jacob (CC'd) would have some opinion on the right fix. > There are three 'fixes' I know exist - one is to squelch the warning (but= I don't > like it because it could hide future code that introduces this), one is t= o create a > static and use assignment, one is to replace the first call and pass in a= 0'd lane > for the first one. >=20 > Actually, I think I have a patch that could work to not introduce an assi= gnment, > but squelch the warning. Something like the following (not tested). >=20 > --- >=20 > diff --git a/lib/librte_acl/acl_run_neon.h b/lib/librte_acl/acl_run_neon.= h index > 01b9766d8..37c984fef 100644 > --- a/lib/librte_acl/acl_run_neon.h > +++ b/lib/librte_acl/acl_run_neon.h > @@ -165,6 +165,7 @@ search_neon_8(const struct rte_acl_ctx *ctx, const > uint8_t **data, > uint64_t index_array[8]; > struct completion cmplt[8]; > struct parms parms[8]; > + static int32x4_t ZEROVAL; > int32x4_t input0, input1; >=20 > acl_set_flow(&flows, cmplt, RTE_DIM(cmplt), data, results, @@ - > 181,8 +182,8 @@ search_neon_8(const struct rte_acl_ctx *ctx, const uint8_= t > **data, >=20 > while (flows.started > 0) { > /* Gather 4 bytes of input data for each stream. */ > - input0 =3D vsetq_lane_s32(GET_NEXT_4BYTES(parms, 0), input0, > 0); > - input1 =3D vsetq_lane_s32(GET_NEXT_4BYTES(parms, 4), input1, > 0); > + input0 =3D vsetq_lane_s32(GET_NEXT_4BYTES(parms, 0), > ZEROVAL, 0); > + input1 =3D vsetq_lane_s32(GET_NEXT_4BYTES(parms, 4), > ZEROVAL, 0); >=20 > input0 =3D vsetq_lane_s32(GET_NEXT_4BYTES(parms, 1), input0, > 1); > input1 =3D vsetq_lane_s32(GET_NEXT_4BYTES(parms, 5), input1, > 1); @@ -227,6 +228,7 @@ search_neon_4(const struct rte_acl_ctx *ctx, cons= t > uint8_t **data, > uint64_t index_array[4]; > struct completion cmplt[4]; > struct parms parms[4]; > + static int32x4_t ZEROVAL; > int32x4_t input; >=20 > acl_set_flow(&flows, cmplt, RTE_DIM(cmplt), data, results, @@ - > 242,7 +244,7 @@ search_neon_4(const struct rte_acl_ctx *ctx, const uint8_= t > **data, >=20 > while (flows.started > 0) { > /* Gather 4 bytes of input data for each stream. */ > - input =3D vsetq_lane_s32(GET_NEXT_4BYTES(parms, 0), input, 0); > + input =3D vsetq_lane_s32(GET_NEXT_4BYTES(parms, 0), > ZEROVAL, 0); > input =3D vsetq_lane_s32(GET_NEXT_4BYTES(parms, 1), input, 1); > input =3D vsetq_lane_s32(GET_NEXT_4BYTES(parms, 2), input, 2); > input =3D vsetq_lane_s32(GET_NEXT_4BYTES(parms, 3), input, 3); > -- > 2.21.0