From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR02-VE1-obe.outbound.protection.outlook.com (mail-eopbgr20050.outbound.protection.outlook.com [40.107.2.50]) by dpdk.org (Postfix) with ESMTP id 9C23D29CB for ; Fri, 3 May 2019 06:02:02 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=cwbmdwo2qqsvyIbyRBY7U5sf8TSUseUIEC2A979EC98=; b=XrqVbVFoUhsTPF3Moi57kyqzm09R3+coaihq5yB8YPuB4mqrPFICT7pECWf+HtIuNa8Y1J6KyxqZhJQmsBt723SA3IZ+T06EhU7EML4u/h5KC3WEsfm8HJqzt7QRd9wEcf65m6IbfF7sbm0MYIhI02xXilgibYqMevA8R7V9VTA= Received: from VE1PR08MB5149.eurprd08.prod.outlook.com (20.179.30.152) by VE1PR08MB5198.eurprd08.prod.outlook.com (20.179.31.85) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1835.13; Fri, 3 May 2019 04:02:00 +0000 Received: from VE1PR08MB5149.eurprd08.prod.outlook.com ([fe80::f5e3:39bc:e7d9:dfea]) by VE1PR08MB5149.eurprd08.prod.outlook.com ([fe80::f5e3:39bc:e7d9:dfea%5]) with mapi id 15.20.1856.012; Fri, 3 May 2019 04:02:00 +0000 From: Honnappa Nagarahalli To: "yskoh@mellanox.com" CC: "jerinj@marvell.com" , Shahaf Shuler , "thomas@monjalon.net" , "dev@dpdk.org" , "bruce.richardson@intel.com" , "pbhagavatula@marvell.com" , "Gavin Hu (Arm Technology China)" , Honnappa Nagarahalli , nd , nd Thread-Topic: [PATCH 2/2] mk: disable armv8 crypto extension for Mellanox BlueField Thread-Index: AQHVAIqLeeZwEbnsU0mTBw3Y8vLyd6ZXOP4ggAAZI4CAAXZlcA== Date: Fri, 3 May 2019 04:01:59 +0000 Message-ID: References: <20190502015806.41497-1-yskoh@mellanox.com> <20190502015806.41497-2-yskoh@mellanox.com> <21250682-EB2E-4F14-B75F-F09E1807C112@mellanox.com> In-Reply-To: <21250682-EB2E-4F14-B75F-F09E1807C112@mellanox.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Honnappa.Nagarahalli@arm.com; x-originating-ip: [217.140.111.135] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 2005ef05-15d4-41df-5472-08d6cf7c17fd x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600141)(711020)(4605104)(4618075)(2017052603328)(7193020); SRVR:VE1PR08MB5198; x-ms-traffictypediagnostic: VE1PR08MB5198: x-ld-processed: f34e5979-57d9-4aaa-ad4d-b122a662184d,ExtAddr nodisclaimer: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:8882; x-forefront-prvs: 0026334A56 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(136003)(39860400002)(396003)(346002)(376002)(366004)(189003)(199004)(2906002)(5660300002)(53936002)(4326008)(7696005)(14444005)(486006)(1730700003)(66066001)(86362001)(2501003)(305945005)(54906003)(66556008)(72206003)(11346002)(52536014)(74316002)(68736007)(476003)(446003)(99286004)(8676002)(81166006)(316002)(81156014)(76176011)(8936002)(14454004)(9686003)(102836004)(71190400001)(71200400001)(7736002)(66946007)(6506007)(6916009)(66446008)(64756008)(66476007)(25786009)(73956011)(33656002)(508600001)(2351001)(3846002)(6116002)(5640700003)(6436002)(256004)(55016002)(186003)(53546011)(6246003)(26005)(76116006)(229853002); DIR:OUT; SFP:1101; SCL:1; SRVR:VE1PR08MB5198; H:VE1PR08MB5149.eurprd08.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: l5T09irfOmjGdcBBSO44E9xYIHrLkPGgMBUZxYtgPl4RyV9Y0BTuh67javM2ws4cLZd4leQPSQzrXygSxDUdI1oeVYsoJ20l1bNm/LJkNGb1aeEUymi9kLDF+9dnY0Gt3+OZKoGPzjpWFqTPgEGS0GIGYudf5Jmi48Gu0fuoTDU5vzUPba1p/8bUeOvuDY0r3OLLg+nZbuQ++2l623B34JTjyLtSgnk6+Zhmu3s7btgXX2wvpOXGgZrvci+o7IoJP/tUPT/wadKVGX25wkdnxQl6cOWtNXM9Yu+vFoXUWDj60Z6bJZ/4VcOvVZ+ybo3dNP2McOI0LInyyFP0hnvsTT5thD1KuBoBRLt/DB/rC/i/+WlC8b2LhZEfl8VQxI/qB9KaS+/GU/c+0or3alOzyW/e0JkgScaPTz/1CYq/jhI= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: 2005ef05-15d4-41df-5472-08d6cf7c17fd X-MS-Exchange-CrossTenant-originalarrivaltime: 03 May 2019 04:02:00.2184 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR08MB5198 Subject: Re: [dpdk-dev] [PATCH 2/2] mk: disable armv8 crypto extension for Mellanox BlueField X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 03 May 2019 04:02:02 -0000 > > On May 1, 2019, at 9:12 PM, Honnappa Nagarahalli > wrote: > > > >> > >> Mellanox BlueField has a variant which doesn't have armv8 crypto > extension. > >> If crypto enabled binary runs on such a pltform, rte_eal_init() > >> fails. To have binary compatibility across multiple variants, it is > >> disabled by default and can be enabled for crypto enabled parts. > >> > >> Signed-off-by: Yongseok Koh > >> --- > >> config/defconfig_arm64-bluefield-linuxapp-gcc | 6 ++++++ > >> 1 file changed, 6 insertions(+) > >> > >> diff --git a/config/defconfig_arm64-bluefield-linuxapp-gcc > >> b/config/defconfig_arm64-bluefield-linuxapp-gcc > >> index b496538819..6da9c2026d 100644 > >> --- a/config/defconfig_arm64-bluefield-linuxapp-gcc > >> +++ b/config/defconfig_arm64-bluefield-linuxapp-gcc > >> @@ -10,6 +10,12 @@ CONFIG_RTE_ARCH_ARM_TUNE=3D"cortex-a72" > >> CONFIG_RTE_MAX_NUMA_NODES=3D1 > >> CONFIG_RTE_CACHE_LINE_SIZE=3D64 > >> > >> +# Crypto extension of armv8 > >> +# > >> +# Disabled by default for binary compatibility. > >> +# Can be enabled for crypto-enabled parts. > >> +CONFIG_RTE_ENABLE_ARMV8_CRYPTO=3Dn > > How do you plan to support the Bluefield devices with crypto enabled? D= o > you plan to add another config? >=20 > Nope, user will have to enable it by modifying this file or specifying it= in make > command line. Ok, I suggest documenting it somewhere. > This is just to provide the default which can make majority of cases work= well. > For example, by default, mlx4/5 are even disabled in default x86 build co= nfig > because not all users have drv/lib installed on their system. Users have = to > enable it if they want. >=20 > >> + > >> # UMA architecture > >> CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=3Dn > >> CONFIG_RTE_LIBRTE_VHOST_NUMA=3Dn > >> -- > >> 2.11.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 77833A0AC5 for ; Fri, 3 May 2019 06:02:05 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 74C9D29D2; Fri, 3 May 2019 06:02:04 +0200 (CEST) Received: from EUR02-VE1-obe.outbound.protection.outlook.com (mail-eopbgr20050.outbound.protection.outlook.com [40.107.2.50]) by dpdk.org (Postfix) with ESMTP id 9C23D29CB for ; Fri, 3 May 2019 06:02:02 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=cwbmdwo2qqsvyIbyRBY7U5sf8TSUseUIEC2A979EC98=; b=XrqVbVFoUhsTPF3Moi57kyqzm09R3+coaihq5yB8YPuB4mqrPFICT7pECWf+HtIuNa8Y1J6KyxqZhJQmsBt723SA3IZ+T06EhU7EML4u/h5KC3WEsfm8HJqzt7QRd9wEcf65m6IbfF7sbm0MYIhI02xXilgibYqMevA8R7V9VTA= Received: from VE1PR08MB5149.eurprd08.prod.outlook.com (20.179.30.152) by VE1PR08MB5198.eurprd08.prod.outlook.com (20.179.31.85) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1835.13; Fri, 3 May 2019 04:02:00 +0000 Received: from VE1PR08MB5149.eurprd08.prod.outlook.com ([fe80::f5e3:39bc:e7d9:dfea]) by VE1PR08MB5149.eurprd08.prod.outlook.com ([fe80::f5e3:39bc:e7d9:dfea%5]) with mapi id 15.20.1856.012; Fri, 3 May 2019 04:02:00 +0000 From: Honnappa Nagarahalli To: "yskoh@mellanox.com" CC: "jerinj@marvell.com" , Shahaf Shuler , "thomas@monjalon.net" , "dev@dpdk.org" , "bruce.richardson@intel.com" , "pbhagavatula@marvell.com" , "Gavin Hu (Arm Technology China)" , Honnappa Nagarahalli , nd , nd Thread-Topic: [PATCH 2/2] mk: disable armv8 crypto extension for Mellanox BlueField Thread-Index: AQHVAIqLeeZwEbnsU0mTBw3Y8vLyd6ZXOP4ggAAZI4CAAXZlcA== Date: Fri, 3 May 2019 04:01:59 +0000 Message-ID: References: <20190502015806.41497-1-yskoh@mellanox.com> <20190502015806.41497-2-yskoh@mellanox.com> <21250682-EB2E-4F14-B75F-F09E1807C112@mellanox.com> In-Reply-To: <21250682-EB2E-4F14-B75F-F09E1807C112@mellanox.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Honnappa.Nagarahalli@arm.com; x-originating-ip: [217.140.111.135] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 2005ef05-15d4-41df-5472-08d6cf7c17fd x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600141)(711020)(4605104)(4618075)(2017052603328)(7193020); SRVR:VE1PR08MB5198; x-ms-traffictypediagnostic: VE1PR08MB5198: x-ld-processed: f34e5979-57d9-4aaa-ad4d-b122a662184d,ExtAddr nodisclaimer: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:8882; x-forefront-prvs: 0026334A56 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(136003)(39860400002)(396003)(346002)(376002)(366004)(189003)(199004)(2906002)(5660300002)(53936002)(4326008)(7696005)(14444005)(486006)(1730700003)(66066001)(86362001)(2501003)(305945005)(54906003)(66556008)(72206003)(11346002)(52536014)(74316002)(68736007)(476003)(446003)(99286004)(8676002)(81166006)(316002)(81156014)(76176011)(8936002)(14454004)(9686003)(102836004)(71190400001)(71200400001)(7736002)(66946007)(6506007)(6916009)(66446008)(64756008)(66476007)(25786009)(73956011)(33656002)(508600001)(2351001)(3846002)(6116002)(5640700003)(6436002)(256004)(55016002)(186003)(53546011)(6246003)(26005)(76116006)(229853002); DIR:OUT; SFP:1101; SCL:1; SRVR:VE1PR08MB5198; H:VE1PR08MB5149.eurprd08.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: l5T09irfOmjGdcBBSO44E9xYIHrLkPGgMBUZxYtgPl4RyV9Y0BTuh67javM2ws4cLZd4leQPSQzrXygSxDUdI1oeVYsoJ20l1bNm/LJkNGb1aeEUymi9kLDF+9dnY0Gt3+OZKoGPzjpWFqTPgEGS0GIGYudf5Jmi48Gu0fuoTDU5vzUPba1p/8bUeOvuDY0r3OLLg+nZbuQ++2l623B34JTjyLtSgnk6+Zhmu3s7btgXX2wvpOXGgZrvci+o7IoJP/tUPT/wadKVGX25wkdnxQl6cOWtNXM9Yu+vFoXUWDj60Z6bJZ/4VcOvVZ+ybo3dNP2McOI0LInyyFP0hnvsTT5thD1KuBoBRLt/DB/rC/i/+WlC8b2LhZEfl8VQxI/qB9KaS+/GU/c+0or3alOzyW/e0JkgScaPTz/1CYq/jhI= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: 2005ef05-15d4-41df-5472-08d6cf7c17fd X-MS-Exchange-CrossTenant-originalarrivaltime: 03 May 2019 04:02:00.2184 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR08MB5198 Subject: Re: [dpdk-dev] [PATCH 2/2] mk: disable armv8 crypto extension for Mellanox BlueField X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190503040159.hZ4bEfocq80EwTPWulkggcM1wJQtDpoJnUeMj9Iw7MM@z> > > On May 1, 2019, at 9:12 PM, Honnappa Nagarahalli > wrote: > > > >> > >> Mellanox BlueField has a variant which doesn't have armv8 crypto > extension. > >> If crypto enabled binary runs on such a pltform, rte_eal_init() > >> fails. To have binary compatibility across multiple variants, it is > >> disabled by default and can be enabled for crypto enabled parts. > >> > >> Signed-off-by: Yongseok Koh > >> --- > >> config/defconfig_arm64-bluefield-linuxapp-gcc | 6 ++++++ > >> 1 file changed, 6 insertions(+) > >> > >> diff --git a/config/defconfig_arm64-bluefield-linuxapp-gcc > >> b/config/defconfig_arm64-bluefield-linuxapp-gcc > >> index b496538819..6da9c2026d 100644 > >> --- a/config/defconfig_arm64-bluefield-linuxapp-gcc > >> +++ b/config/defconfig_arm64-bluefield-linuxapp-gcc > >> @@ -10,6 +10,12 @@ CONFIG_RTE_ARCH_ARM_TUNE=3D"cortex-a72" > >> CONFIG_RTE_MAX_NUMA_NODES=3D1 > >> CONFIG_RTE_CACHE_LINE_SIZE=3D64 > >> > >> +# Crypto extension of armv8 > >> +# > >> +# Disabled by default for binary compatibility. > >> +# Can be enabled for crypto-enabled parts. > >> +CONFIG_RTE_ENABLE_ARMV8_CRYPTO=3Dn > > How do you plan to support the Bluefield devices with crypto enabled? D= o > you plan to add another config? >=20 > Nope, user will have to enable it by modifying this file or specifying it= in make > command line. Ok, I suggest documenting it somewhere. > This is just to provide the default which can make majority of cases work= well. > For example, by default, mlx4/5 are even disabled in default x86 build co= nfig > because not all users have drv/lib installed on their system. Users have = to > enable it if they want. >=20 > >> + > >> # UMA architecture > >> CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=3Dn > >> CONFIG_RTE_LIBRTE_VHOST_NUMA=3Dn > >> -- > >> 2.11.0