From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR01-VE1-obe.outbound.protection.outlook.com (mail-eopbgr140083.outbound.protection.outlook.com [40.107.14.83]) by dpdk.org (Postfix) with ESMTP id 1E2441B120 for ; Thu, 18 Apr 2019 16:25:40 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=DjMSGKmbzEIpp+4ARXotCdvU36ZG7QptHDGFyLvFpXA=; b=csJ/DypRbQ/SSsXshO9bxrCCQrv8C6uk96yplZ5S9Snl6AZD+HHw7O01qSWnzvEe8us5qz4YMLFZLPN7oYAcOLn1C/d1suWuoaplM6jjDZ5lwuWM2o/PLn6U2L1+xYEkuizz+qgLb9Qww9HwZxgC2nw6iM5B85aGyr+pgsECq/Q= Received: from VE1PR08MB5149.eurprd08.prod.outlook.com (20.179.30.152) by VE1PR08MB4766.eurprd08.prod.outlook.com (10.255.113.74) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1792.19; Thu, 18 Apr 2019 14:25:36 +0000 Received: from VE1PR08MB5149.eurprd08.prod.outlook.com ([fe80::e0ae:ecad:ec5:8177]) by VE1PR08MB5149.eurprd08.prod.outlook.com ([fe80::e0ae:ecad:ec5:8177%2]) with mapi id 15.20.1792.018; Thu, 18 Apr 2019 14:25:36 +0000 From: Honnappa Nagarahalli To: "yskoh@mellanox.com" , "bruce.richardson@intel.com" , "jerinj@marvell.com" , "pbhagavatula@marvell.com" , "shahafs@mellanox.com" CC: "dev@dpdk.org" , "thomas@monjalon.net" , "Gavin Hu (Arm Technology China)" , Honnappa Nagarahalli , nd , nd Thread-Topic: [PATCH v3 2/4] meson: change default config for armv8 Thread-Index: AQHU9dy/FwkUvnxHrkSsaU5r2eOBzqZB+PqA Date: Thu, 18 Apr 2019 14:25:36 +0000 Message-ID: References: <20190412232451.30197-1-yskoh@mellanox.com> <20190418114903.42231-1-yskoh@mellanox.com> <20190418114903.42231-2-yskoh@mellanox.com> In-Reply-To: <20190418114903.42231-2-yskoh@mellanox.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Honnappa.Nagarahalli@arm.com; x-originating-ip: [217.140.111.135] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 70cb464e-ec53-4fa4-cf76-08d6c409b9b2 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(5600141)(711020)(4605104)(4618075)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7193020); SRVR:VE1PR08MB4766; x-ms-traffictypediagnostic: VE1PR08MB4766: x-ld-processed: f34e5979-57d9-4aaa-ad4d-b122a662184d,ExtAddr nodisclaimer: True x-microsoft-antispam-prvs: x-forefront-prvs: 0011612A55 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(396003)(366004)(39860400002)(136003)(346002)(376002)(189003)(199004)(66066001)(478600001)(14444005)(2201001)(25786009)(4326008)(52536014)(9686003)(5660300002)(256004)(53936002)(55016002)(71200400001)(6246003)(3846002)(2501003)(71190400001)(26005)(6436002)(229853002)(86362001)(2906002)(11346002)(99286004)(186003)(476003)(76176011)(6116002)(486006)(33656002)(6506007)(68736007)(102836004)(305945005)(54906003)(97736004)(110136005)(72206003)(81156014)(316002)(7736002)(7696005)(74316002)(8676002)(8936002)(81166006)(446003)(14454004); DIR:OUT; SFP:1101; SCL:1; SRVR:VE1PR08MB4766; H:VE1PR08MB5149.eurprd08.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: yvNStNWGd7NG3W4DEINKGbvR57jsxfDpQ8drO+CXmNAC37g6q/lDB8X4A0fqZLzo+HSsNHpFzM2Y91wN3j2XJjo41j3GTaDtqiN9lA86K6wR5MXjQeqv6dxePVqwvOu77eey+xVGt/bBUI0zNsLqHEiMjIOKhT4AEA35D129CSZmqEu8MCj619Zm/ohpqKPBIV60PtLqk5qozY2QoBCzVcwSz168tteL43ju7cH0+S597eVeCfvdYpEHKNFRLQAutu8qqjZtJ0dWmGXFPPPkUWmS3rdn718AOmwEl/DGFPakFTac2rffN5//aymdfzSpxTabR9gJmEctsn8QCcxK3KKwp0htlLmPTIA5mdp17YHcelcjL4VuSoFes/PIFpzBTykLuEn2TN5EhwORbWm4R+yzZioCJBkG+O0SEOejId8= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: 70cb464e-ec53-4fa4-cf76-08d6c409b9b2 X-MS-Exchange-CrossTenant-originalarrivaltime: 18 Apr 2019 14:25:36.7836 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR08MB4766 Subject: Re: [dpdk-dev] [PATCH v3 2/4] meson: change default config for armv8 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Apr 2019 14:25:40 -0000 >=20 > Current default cache line size for armv8 CPUs having Implementor ID of > 0x41 is 128 bytes, changing it to 64 bytes. Also, the max number of lcore= s is > changed to 16 from 256. >=20 > Signed-off-by: Yongseok Koh > --- >=20 > v3: > * decrease RTE_MAX_LCORE to 16 from 256 > * change title and commit log >=20 > v2: > * introduce flags_arm replacing flags_generic instead of using the extra = flags >=20 > config/arm/meson.build | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) >=20 > diff --git a/config/arm/meson.build b/config/arm/meson.build index > 22a062bad9..a5cce51707 100644 > --- a/config/arm/meson.build > +++ b/config/arm/meson.build > @@ -32,6 +32,11 @@ flags_generic =3D [ > ['RTE_MAX_LCORE', 256], > ['RTE_USE_C11_MEM_MODEL', true], > ['RTE_CACHE_LINE_SIZE', 128]] > +flags_arm =3D [ > + ['RTE_MACHINE', '"armv8a"'], > + ['RTE_MAX_LCORE', 16], > + ['RTE_USE_C11_MEM_MODEL', true], > + ['RTE_CACHE_LINE_SIZE', 64]] > flags_cavium =3D [ > ['RTE_CACHE_LINE_SIZE', 128], > ['RTE_MAX_NUMA_NODES', 2], > @@ -88,7 +93,7 @@ machine_args_cavium =3D [ >=20 > ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) > impl_generic =3D ['Generic armv8', flags_generic, machine_args_generic] > -impl_0x41 =3D ['Arm', flags_generic, machine_args_generic] > +impl_0x41 =3D ['Arm', flags_arm, machine_args_generic] > impl_0x42 =3D ['Broadcom', flags_generic, machine_args_generic] > impl_0x43 =3D ['Cavium', flags_cavium, machine_args_cavium] > impl_0x44 =3D ['DEC', flags_generic, machine_args_generic] > -- Looks good. Reviewed-by: Honnappa Nagarahalli > 2.11.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 8CC1BA00E6 for ; Thu, 18 Apr 2019 16:25:42 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 826EC1B9C5; Thu, 18 Apr 2019 16:25:41 +0200 (CEST) Received: from EUR01-VE1-obe.outbound.protection.outlook.com (mail-eopbgr140083.outbound.protection.outlook.com [40.107.14.83]) by dpdk.org (Postfix) with ESMTP id 1E2441B120 for ; Thu, 18 Apr 2019 16:25:40 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=DjMSGKmbzEIpp+4ARXotCdvU36ZG7QptHDGFyLvFpXA=; b=csJ/DypRbQ/SSsXshO9bxrCCQrv8C6uk96yplZ5S9Snl6AZD+HHw7O01qSWnzvEe8us5qz4YMLFZLPN7oYAcOLn1C/d1suWuoaplM6jjDZ5lwuWM2o/PLn6U2L1+xYEkuizz+qgLb9Qww9HwZxgC2nw6iM5B85aGyr+pgsECq/Q= Received: from VE1PR08MB5149.eurprd08.prod.outlook.com (20.179.30.152) by VE1PR08MB4766.eurprd08.prod.outlook.com (10.255.113.74) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1792.19; Thu, 18 Apr 2019 14:25:36 +0000 Received: from VE1PR08MB5149.eurprd08.prod.outlook.com ([fe80::e0ae:ecad:ec5:8177]) by VE1PR08MB5149.eurprd08.prod.outlook.com ([fe80::e0ae:ecad:ec5:8177%2]) with mapi id 15.20.1792.018; Thu, 18 Apr 2019 14:25:36 +0000 From: Honnappa Nagarahalli To: "yskoh@mellanox.com" , "bruce.richardson@intel.com" , "jerinj@marvell.com" , "pbhagavatula@marvell.com" , "shahafs@mellanox.com" CC: "dev@dpdk.org" , "thomas@monjalon.net" , "Gavin Hu (Arm Technology China)" , Honnappa Nagarahalli , nd , nd Thread-Topic: [PATCH v3 2/4] meson: change default config for armv8 Thread-Index: AQHU9dy/FwkUvnxHrkSsaU5r2eOBzqZB+PqA Date: Thu, 18 Apr 2019 14:25:36 +0000 Message-ID: References: <20190412232451.30197-1-yskoh@mellanox.com> <20190418114903.42231-1-yskoh@mellanox.com> <20190418114903.42231-2-yskoh@mellanox.com> In-Reply-To: <20190418114903.42231-2-yskoh@mellanox.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Honnappa.Nagarahalli@arm.com; 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DIR:OUT; SFP:1101; SCL:1; SRVR:VE1PR08MB4766; H:VE1PR08MB5149.eurprd08.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: yvNStNWGd7NG3W4DEINKGbvR57jsxfDpQ8drO+CXmNAC37g6q/lDB8X4A0fqZLzo+HSsNHpFzM2Y91wN3j2XJjo41j3GTaDtqiN9lA86K6wR5MXjQeqv6dxePVqwvOu77eey+xVGt/bBUI0zNsLqHEiMjIOKhT4AEA35D129CSZmqEu8MCj619Zm/ohpqKPBIV60PtLqk5qozY2QoBCzVcwSz168tteL43ju7cH0+S597eVeCfvdYpEHKNFRLQAutu8qqjZtJ0dWmGXFPPPkUWmS3rdn718AOmwEl/DGFPakFTac2rffN5//aymdfzSpxTabR9gJmEctsn8QCcxK3KKwp0htlLmPTIA5mdp17YHcelcjL4VuSoFes/PIFpzBTykLuEn2TN5EhwORbWm4R+yzZioCJBkG+O0SEOejId8= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: 70cb464e-ec53-4fa4-cf76-08d6c409b9b2 X-MS-Exchange-CrossTenant-originalarrivaltime: 18 Apr 2019 14:25:36.7836 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR08MB4766 Subject: Re: [dpdk-dev] [PATCH v3 2/4] meson: change default config for armv8 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190418142536.YrAhFgGS_jCxs9lOqQzA0l9le441bKgJgdNVwcQ5YbY@z> >=20 > Current default cache line size for armv8 CPUs having Implementor ID of > 0x41 is 128 bytes, changing it to 64 bytes. Also, the max number of lcore= s is > changed to 16 from 256. >=20 > Signed-off-by: Yongseok Koh > --- >=20 > v3: > * decrease RTE_MAX_LCORE to 16 from 256 > * change title and commit log >=20 > v2: > * introduce flags_arm replacing flags_generic instead of using the extra = flags >=20 > config/arm/meson.build | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) >=20 > diff --git a/config/arm/meson.build b/config/arm/meson.build index > 22a062bad9..a5cce51707 100644 > --- a/config/arm/meson.build > +++ b/config/arm/meson.build > @@ -32,6 +32,11 @@ flags_generic =3D [ > ['RTE_MAX_LCORE', 256], > ['RTE_USE_C11_MEM_MODEL', true], > ['RTE_CACHE_LINE_SIZE', 128]] > +flags_arm =3D [ > + ['RTE_MACHINE', '"armv8a"'], > + ['RTE_MAX_LCORE', 16], > + ['RTE_USE_C11_MEM_MODEL', true], > + ['RTE_CACHE_LINE_SIZE', 64]] > flags_cavium =3D [ > ['RTE_CACHE_LINE_SIZE', 128], > ['RTE_MAX_NUMA_NODES', 2], > @@ -88,7 +93,7 @@ machine_args_cavium =3D [ >=20 > ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) > impl_generic =3D ['Generic armv8', flags_generic, machine_args_generic] > -impl_0x41 =3D ['Arm', flags_generic, machine_args_generic] > +impl_0x41 =3D ['Arm', flags_arm, machine_args_generic] > impl_0x42 =3D ['Broadcom', flags_generic, machine_args_generic] > impl_0x43 =3D ['Cavium', flags_cavium, machine_args_cavium] > impl_0x44 =3D ['DEC', flags_generic, machine_args_generic] > -- Looks good. Reviewed-by: Honnappa Nagarahalli > 2.11.0