From: Akhil Goyal <akhil.goyal@nxp.com>
To: Nicolas Chautru <nicolas.chautru@intel.com>,
"dev@dpdk.org" <dev@dpdk.org>
Cc: "bruce.richardson@intel.com" <bruce.richardson@intel.com>
Subject: Re: [dpdk-dev] [PATCH v2 12/13] baseband/fpga_5gnr_fec: add interrupt support
Date: Thu, 16 Apr 2020 18:43:38 +0000 [thread overview]
Message-ID: <VI1PR04MB31686B4BC80E4DE11CFA22D0E6D80@VI1PR04MB3168.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <1585526580-113508-13-git-send-email-nicolas.chautru@intel.com>
>
> Adding support for interrupt capability in the PMD
> and the related operations.
>
> Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
> ---
> drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c | 156
> +++++++++++++++++++++
> 1 file changed, 156 insertions(+)
>
> diff --git a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c
> b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c
> index b8cad1a..45a3126 100644
> --- a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c
> +++ b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c
> @@ -110,6 +110,23 @@
> return rte_le_to_cpu_32(ret);
> }
>
> +/* Read a register of FPGA 5GNR FEC device */
> +static uint8_t
> +fpga_reg_read_8(void *mmio_base, uint32_t offset)
> +{
> + void *reg_addr = RTE_PTR_ADD(mmio_base, offset);
> + return *((volatile uint8_t *)(reg_addr));
> +}
> +
> +/* Read a register of FPGA 5GNR FEC device */
> +static uint64_t
> +fpga_reg_read_64(void *mmio_base, uint32_t offset)
> +{
> + void *reg_addr = RTE_PTR_ADD(mmio_base, offset);
> + uint64_t ret = *((volatile uint64_t *)(reg_addr));
> + return rte_le_to_cpu_64(ret);
> +}
> +
Above reg_read APIs should be moved in the header file and made as inline along with all others in your 6/13 patch.
next prev parent reply other threads:[~2020-04-16 18:43 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-30 0:02 [dpdk-dev] [PATCH v2 00/13] drivers/baseband: add PMD for FPGA 5GNR FEC Nicolas Chautru
2020-03-30 0:02 ` [dpdk-dev] [PATCH v2 01/13] bbdev: add capability flag for filler bits inclusion in HARQ Nicolas Chautru
2020-03-30 0:02 ` [dpdk-dev] [PATCH v2 02/13] bbdev: expose device HARQ buffer size at device level Nicolas Chautru
2020-03-30 0:02 ` [dpdk-dev] [PATCH v2 03/13] drivers/baseband: add PMD for FPGA 5GNR FEC Nicolas Chautru
2020-03-30 0:02 ` [dpdk-dev] [PATCH v2 04/13] baseband/fpga_5gnr_fec: add register definition file Nicolas Chautru
2020-03-30 0:02 ` [dpdk-dev] [PATCH v2 05/13] baseband/fpga_5gnr_fec: add device info_get function Nicolas Chautru
2020-04-16 18:15 ` Akhil Goyal
2020-04-16 21:20 ` Chautru, Nicolas
2020-03-30 0:02 ` [dpdk-dev] [PATCH v2 06/13] baseband/fpga_5gnr_fec: add queue configuration Nicolas Chautru
2020-04-11 3:13 ` Xu, Rosen
2020-04-14 0:16 ` Chautru, Nicolas
2020-04-15 6:13 ` Xu, Rosen
2020-04-15 15:51 ` Chautru, Nicolas
2020-04-16 1:09 ` Xu, Rosen
2020-03-30 0:02 ` [dpdk-dev] [PATCH v2 07/13] baseband/fpga_5gnr_fec: add LDPC processing functions Nicolas Chautru
2020-03-30 0:02 ` [dpdk-dev] [PATCH v2 08/13] baseband/fpga_5gnr_fec: add HW error capture Nicolas Chautru
2020-03-30 0:02 ` [dpdk-dev] [PATCH v2 09/13] baseband/fpga_5gnr_fec: add debug functionality Nicolas Chautru
2020-03-30 0:02 ` [dpdk-dev] [PATCH v2 10/13] baseband/fpga_5gnr_fec: add configure function Nicolas Chautru
2020-04-15 15:40 ` Power, Niall
2020-04-16 19:30 ` Akhil Goyal
2020-04-16 21:45 ` Chautru, Nicolas
2020-05-01 23:15 ` Chautru, Nicolas
2020-05-04 17:19 ` Thomas Monjalon
2020-06-25 0:30 ` Chautru, Nicolas
2020-06-25 8:13 ` Thomas Monjalon
2020-06-26 1:14 ` Chautru, Nicolas
2020-06-26 10:08 ` Thomas Monjalon
2020-07-10 22:48 ` Chautru, Nicolas
2020-03-30 0:02 ` [dpdk-dev] [PATCH v2 11/13] baseband/fpga_5gnr_fec: add harq loopback capability Nicolas Chautru
2020-03-30 0:02 ` [dpdk-dev] [PATCH v2 12/13] baseband/fpga_5gnr_fec: add interrupt support Nicolas Chautru
2020-04-16 18:43 ` Akhil Goyal [this message]
2020-03-30 0:03 ` [dpdk-dev] [PATCH v2 13/13] doc: add feature matrix table for bbdev devices Nicolas Chautru
2020-04-15 15:40 ` [dpdk-dev] [PATCH v2 00/13] drivers/baseband: add PMD for FPGA 5GNR FEC Power, Niall
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