From: "Xueming(Steven) Li" <xuemingl@mellanox.com>
To: "Nélio Laranjeiro" <nelio.laranjeiro@6wind.com>
Cc: Shahaf Shuler <shahafs@mellanox.com>, "dev@dpdk.org" <dev@dpdk.org>
Subject: Re: [dpdk-dev] [PATCH v2 05/15] net/mlx5: support tunnel inner checksum offloads
Date: Wed, 11 Apr 2018 08:46:49 +0000 [thread overview]
Message-ID: <VI1PR05MB167800C326ECC6CDF61273EAACBD0@VI1PR05MB1678.eurprd05.prod.outlook.com> (raw)
In-Reply-To: <20180410152750.sgm6qqftzj3vqxiq@laranjeiro-vm.dev.6wind.com>
Hi Nelio,
> -----Original Message-----
> From: Nélio Laranjeiro <nelio.laranjeiro@6wind.com>
> Sent: Tuesday, April 10, 2018 11:28 PM
> To: Xueming(Steven) Li <xuemingl@mellanox.com>
> Cc: Shahaf Shuler <shahafs@mellanox.com>; dev@dpdk.org
> Subject: Re: [PATCH v2 05/15] net/mlx5: support tunnel inner checksum
> offloads
>
> On Tue, Apr 10, 2018 at 09:34:05PM +0800, Xueming Li wrote:
> > This patch support tunnel inner checksum offloads. By creating tunnel
> > flow, once tunnel packet type(RTE_PTYPE_TUNNEL_xxx) identified,
>
> Where is the code creating the tunnel flow?
Literal issue, I'll remove "By creating tunnel flow". Also, this patch set
actually a cleanup of tunnel checksum, I'll update.
>
> > PKT_RX_IP_CKSUM_XXX and PKT_RX_L4_CKSUM_XXX represent checksum result
> > of inner headers, outer L3 and L4 header checksum are always valid as
> > soon as tunnel identified. If no tunnel identified,
> > PKT_RX_IP_CKSUM_XXX and PKT_RX_L4_CKSUM_XXX represent checksum result
> > of outer L3 and L4 headers.
> >
> > Signed-off-by: Xueming Li <xuemingl@mellanox.com>
> > ---
> > drivers/net/mlx5/mlx5_flow.c | 7 +++++--
> > drivers/net/mlx5/mlx5_rxq.c | 2 -- drivers/net/mlx5/mlx5_rxtx.c |
> > 18 ++++-------------- drivers/net/mlx5/mlx5_rxtx.h | 1 -
> > 4 files changed, 9 insertions(+), 19 deletions(-)
> >
> > diff --git a/drivers/net/mlx5/mlx5_flow.c
> > b/drivers/net/mlx5/mlx5_flow.c index 65d7a9b62..b3ad6dc85 100644
> > --- a/drivers/net/mlx5/mlx5_flow.c
> > +++ b/drivers/net/mlx5/mlx5_flow.c
> > @@ -829,6 +829,8 @@ mlx5_flow_convert_actions(struct rte_eth_dev *dev,
> > /**
> > * Validate items.
> > *
> > + * @param dev
> > + * Pointer to Ethernet device.
> > * @param[in] items
> > * Pattern specification (list terminated by the END pattern item).
> > * @param[out] error
> > @@ -840,7 +842,8 @@ mlx5_flow_convert_actions(struct rte_eth_dev *dev,
> > * 0 on success, a negative errno value otherwise and rte_errno is
> set.
> > */
> > static int
> > -mlx5_flow_convert_items_validate(const struct rte_flow_item items[],
> > +mlx5_flow_convert_items_validate(struct rte_eth_dev *dev __rte_unused,
> > + const struct rte_flow_item items[],
> > struct rte_flow_error *error,
> > struct mlx5_flow_parse *parser)
> > {
> > @@ -1146,7 +1149,7 @@ mlx5_flow_convert(struct rte_eth_dev *dev,
> > ret = mlx5_flow_convert_actions(dev, actions, error, parser);
> > if (ret)
> > return ret;
> > - ret = mlx5_flow_convert_items_validate(items, error, parser);
> > + ret = mlx5_flow_convert_items_validate(dev, items, error, parser);
> > if (ret)
> > return ret;
> > mlx5_flow_convert_finalise(parser);
>
> I don't understand the necessity of the two hunks above.
>
> > diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
> > index 351acfc0f..073732e16 100644
> > --- a/drivers/net/mlx5/mlx5_rxq.c
> > +++ b/drivers/net/mlx5/mlx5_rxq.c
> > @@ -1045,8 +1045,6 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx,
> uint16_t desc,
> > }
> > /* Toggle RX checksum offload if hardware supports it. */
> > tmpl->rxq.csum = !!(conf->offloads & DEV_RX_OFFLOAD_CHECKSUM);
> > - tmpl->rxq.csum_l2tun = (!!(conf->offloads & DEV_RX_OFFLOAD_CHECKSUM)
> &&
> > - priv->config.tunnel_en);
> > tmpl->rxq.hw_timestamp = !!(conf->offloads &
> DEV_RX_OFFLOAD_TIMESTAMP);
> > /* Configure VLAN stripping. */
> > tmpl->rxq.vlan_strip = !!(conf->offloads &
> > DEV_RX_OFFLOAD_VLAN_STRIP); diff --git a/drivers/net/mlx5/mlx5_rxtx.c
> > b/drivers/net/mlx5/mlx5_rxtx.c index d061dfc8a..285b2dbf0 100644
> > --- a/drivers/net/mlx5/mlx5_rxtx.c
> > +++ b/drivers/net/mlx5/mlx5_rxtx.c
> > @@ -41,7 +41,7 @@ mlx5_rx_poll_len(struct mlx5_rxq_data *rxq, volatile
> struct mlx5_cqe *cqe,
> > uint16_t cqe_cnt, uint32_t *rss_hash);
> >
> > static __rte_always_inline uint32_t
> > -rxq_cq_to_ol_flags(struct mlx5_rxq_data *rxq, volatile struct
> > mlx5_cqe *cqe);
> > +rxq_cq_to_ol_flags(volatile struct mlx5_cqe *cqe);
> >
> > uint32_t mlx5_ptype_table[] __rte_cache_aligned = {
> > [0xff] = RTE_PTYPE_ALL_MASK, /* Last entry for errored packet. */ @@
> > -1728,8 +1728,6 @@ mlx5_rx_poll_len(struct mlx5_rxq_data *rxq,
> > volatile struct mlx5_cqe *cqe,
> > /**
> > * Translate RX completion flags to offload flags.
> > *
> > - * @param[in] rxq
> > - * Pointer to RX queue structure.
> > * @param[in] cqe
> > * Pointer to CQE.
> > *
> > @@ -1737,7 +1735,7 @@ mlx5_rx_poll_len(struct mlx5_rxq_data *rxq,
> volatile struct mlx5_cqe *cqe,
> > * Offload flags (ol_flags) for struct rte_mbuf.
> > */
> > static inline uint32_t
> > -rxq_cq_to_ol_flags(struct mlx5_rxq_data *rxq, volatile struct
> > mlx5_cqe *cqe)
> > +rxq_cq_to_ol_flags(volatile struct mlx5_cqe *cqe)
> > {
> > uint32_t ol_flags = 0;
> > uint16_t flags = rte_be_to_cpu_16(cqe->hdr_type_etc);
> > @@ -1749,14 +1747,6 @@ rxq_cq_to_ol_flags(struct mlx5_rxq_data *rxq,
> volatile struct mlx5_cqe *cqe)
> > TRANSPOSE(flags,
> > MLX5_CQE_RX_L4_HDR_VALID,
> > PKT_RX_L4_CKSUM_GOOD);
> > - if ((cqe->pkt_info & MLX5_CQE_RX_TUNNEL_PACKET) && (rxq->csum_l2tun))
> > - ol_flags |=
> > - TRANSPOSE(flags,
> > - MLX5_CQE_RX_L3_HDR_VALID,
> > - PKT_RX_IP_CKSUM_GOOD) |
> > - TRANSPOSE(flags,
> > - MLX5_CQE_RX_L4_HDR_VALID,
> > - PKT_RX_L4_CKSUM_GOOD);
> > return ol_flags;
> > }
> >
> > @@ -1855,8 +1845,8 @@ mlx5_rx_burst(void *dpdk_rxq, struct rte_mbuf
> **pkts, uint16_t pkts_n)
> > mlx5_flow_mark_get(mark);
> > }
> > }
> > - if (rxq->csum | rxq->csum_l2tun)
> > - pkt->ol_flags |= rxq_cq_to_ol_flags(rxq, cqe);
> > + if (rxq->csum)
> > + pkt->ol_flags |= rxq_cq_to_ol_flags(cqe);
> > if (rxq->vlan_strip &&
> > (cqe->hdr_type_etc &
> > rte_cpu_to_be_16(MLX5_CQE_VLAN_STRIPPED))) { diff -
> -git
> > a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h index
> > 6866f6818..d35605b55 100644
> > --- a/drivers/net/mlx5/mlx5_rxtx.h
> > +++ b/drivers/net/mlx5/mlx5_rxtx.h
> > @@ -77,7 +77,6 @@ struct rxq_zip {
> > /* RX queue descriptor. */
> > struct mlx5_rxq_data {
> > unsigned int csum:1; /* Enable checksum offloading. */
> > - unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
> > unsigned int hw_timestamp:1; /* Enable HW timestamp. */
> > unsigned int vlan_strip:1; /* Enable VLAN stripping. */
> > unsigned int crc_present:1; /* CRC must be subtracted. */
> > --
> > 2.13.3
>
> This last part seems to introduce a regression by removing the support for
> the tunnel checksum offload.
Csum_l2tun is unused, checksum for tunnel and normal packet can't be enabled
separately, so only leave csum field. The code that using csum_l2tun is
duplicated code, that's why I removed it in rxq_cq_to_ol_flags().
>
> Seems this patch is incomplete or wrongly explained.
>
> --
> Nélio Laranjeiro
> 6WIND
next prev parent reply other threads:[~2018-04-11 8:46 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-10 13:34 [dpdk-dev] [PATCH v2 00/15] mlx5 Rx tunnel offloading Xueming Li
2018-04-10 13:34 ` [dpdk-dev] [PATCH v2 01/15] net/mlx5: support 16 hardware priorities Xueming Li
2018-04-10 14:41 ` Nélio Laranjeiro
2018-04-10 15:22 ` Xueming(Steven) Li
2018-04-12 9:09 ` Nélio Laranjeiro
2018-04-12 13:43 ` Xueming(Steven) Li
2018-04-12 14:02 ` Nélio Laranjeiro
2018-04-12 14:46 ` Xueming(Steven) Li
2018-04-10 13:34 ` [dpdk-dev] [PATCH v2 02/15] net/mlx5: support GRE tunnel flow Xueming Li
2018-04-10 13:34 ` [dpdk-dev] [PATCH v2 03/15] net/mlx5: support L3 vxlan flow Xueming Li
2018-04-10 14:53 ` Nélio Laranjeiro
2018-04-10 13:34 ` [dpdk-dev] [PATCH v2 04/15] net/mlx5: support Rx tunnel type identification Xueming Li
2018-04-10 15:17 ` Nélio Laranjeiro
2018-04-11 8:11 ` Xueming(Steven) Li
2018-04-12 9:50 ` Nélio Laranjeiro
2018-04-12 14:27 ` Xueming(Steven) Li
2018-04-13 8:37 ` Nélio Laranjeiro
2018-04-13 12:09 ` Xueming(Steven) Li
2018-04-10 13:34 ` [dpdk-dev] [PATCH v2 05/15] net/mlx5: support tunnel inner checksum offloads Xueming Li
2018-04-10 15:27 ` Nélio Laranjeiro
2018-04-11 8:46 ` Xueming(Steven) Li [this message]
2018-04-10 13:34 ` [dpdk-dev] [PATCH v2 06/15] net/mlx5: split flow RSS handling logic Xueming Li
2018-04-10 15:28 ` Nélio Laranjeiro
2018-04-10 13:34 ` [dpdk-dev] [PATCH v2 07/15] net/mlx5: support tunnel RSS level Xueming Li
2018-04-11 8:55 ` Nélio Laranjeiro
2018-04-14 12:25 ` Xueming(Steven) Li
2018-04-16 7:14 ` Nélio Laranjeiro
2018-04-16 7:46 ` Xueming(Steven) Li
2018-04-16 8:09 ` Nélio Laranjeiro
2018-04-16 10:06 ` Xueming(Steven) Li
2018-04-16 12:27 ` Nélio Laranjeiro
2018-04-10 13:34 ` [dpdk-dev] [PATCH v2 08/15] net/mlx5: add hardware flow debug dump Xueming Li
2018-04-10 13:34 ` [dpdk-dev] [PATCH v2 09/15] net/mlx5: introduce VXLAN-GPE tunnel type Xueming Li
2018-04-10 13:34 ` [dpdk-dev] [PATCH v2 10/15] net/mlx5: allow flow tunnel ID 0 with outer pattern Xueming Li
2018-04-11 12:25 ` Nélio Laranjeiro
2018-04-10 13:34 ` [dpdk-dev] [PATCH v2 11/15] net/mlx5: support MPLS-in-GRE and MPLS-in-UDP Xueming Li
2018-04-10 13:34 ` [dpdk-dev] [PATCH v2 12/15] doc: update mlx5 guide on tunnel offloading Xueming Li
2018-04-11 12:32 ` Nélio Laranjeiro
2018-04-11 12:43 ` Thomas Monjalon
2018-04-10 13:34 ` [dpdk-dev] [PATCH v2 13/15] net/mlx5: setup RSS flow regardless of queue count Xueming Li
2018-04-11 12:37 ` Nélio Laranjeiro
2018-04-11 13:01 ` Xueming(Steven) Li
2018-04-10 13:34 ` [dpdk-dev] [PATCH v2 14/15] net/mlx5: fix invalid flow item check Xueming Li
2018-04-10 13:34 ` [dpdk-dev] [PATCH v2 15/15] net/mlx5: support RSS configuration in isolated mode Xueming Li
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