[dpdk-dev] [PATCH] doc: update hairpin data buffer size config

[dpdk-dev] [PATCH] doc: update hairpin data buffer size config

[Bing Zhao]

This patch updates the MLX5 PMD and release notes documentations.
Adding the guideline for hairpin data buffer size configuration.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
---
 doc/guides/nics/mlx5.rst               | 11 +++++++++++
 doc/guides/rel_notes/release_20_05.rst |  1 +
 2 files changed, 12 insertions(+)

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index e13c07d..c3cde30 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -99,6 +99,7 @@ Features
 - Support for multiple rte_flow groups.
 - Per packet no-inline hint flag to disable packet data copying into Tx descriptors.
 - Hardware LRO.
+- Hairpin.
 
 Limitations
 -----------
@@ -773,6 +774,16 @@ Run-time configuration
   If this parameter is not specified, by default PMD will set
   the smallest value supported by HW.
 
+- ``hp_buf_log_sz`` parameter [int]
+
+  The total data buffer size of a hairpin queue (logarithmic form), in bytes.
+  PMD will set the data buffer size to 2 ** ``hp_buf_log_sz``, both for RX & TX.
+  The capacity of the value is sepcified by the Firmware, and the initialization
+  will get a failure if it is out of scope.
+  A larger value is needed to support larger frame.
+  If this parameter is not specified, by default PMD will set it to 16 and 9KB
+  jumbo frames are supported.
+
 .. _mlx5_firmware_config:
 
 Firmware configuration
diff --git a/doc/guides/rel_notes/release_20_05.rst b/doc/guides/rel_notes/release_20_05.rst
index 2596269..7128f26 100644
--- a/doc/guides/rel_notes/release_20_05.rst
+++ b/doc/guides/rel_notes/release_20_05.rst
@@ -62,6 +62,7 @@ New Features
 
   * Added support for matching on IPv4 Time To Live and IPv6 Hop Limit.
   * Added support for creating Relaxed Ordering Memory Regions.
+  * Added support for configuring Haripin queue data buffer size.
 
 * **Updated the Intel ice driver.**
 
-- 
2.5.5

Re: [dpdk-dev] [PATCH] doc: update hairpin data buffer size config

[Ori Kam]

> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Bing Zhao
> Sent: Thursday, April 9, 2020 6:51 PM
> To: john.mcnamara@intel.com; marko.kovacevic@intel.com; Slava Ovsiienko
> <viacheslavo@mellanox.com>; Matan Azrad <matan@mellanox.com>
> Cc: Shahaf Shuler <shahafs@mellanox.com>; Raslan Darawsheh
> <rasland@mellanox.com>; dev@dpdk.org
> Subject: [dpdk-dev] [PATCH] doc: update hairpin data buffer size config
> 
> This patch updates the MLX5 PMD and release notes documentations.
> Adding the guideline for hairpin data buffer size configuration.
> 
> Signed-off-by: Bing Zhao <bingz@mellanox.com>
> ---
>  doc/guides/nics/mlx5.rst               | 11 +++++++++++
>  doc/guides/rel_notes/release_20_05.rst |  1 +
>  2 files changed, 12 insertions(+)
> 
> diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
> index e13c07d..c3cde30 100644
> --- a/doc/guides/nics/mlx5.rst
> +++ b/doc/guides/nics/mlx5.rst
> @@ -99,6 +99,7 @@ Features
>  - Support for multiple rte_flow groups.
>  - Per packet no-inline hint flag to disable packet data copying into Tx
> descriptors.
>  - Hardware LRO.
> +- Hairpin.
> 
>  Limitations
>  -----------
> @@ -773,6 +774,16 @@ Run-time configuration
>    If this parameter is not specified, by default PMD will set
>    the smallest value supported by HW.
> 
> +- ``hp_buf_log_sz`` parameter [int]
> +
> +  The total data buffer size of a hairpin queue (logarithmic form), in bytes.
> +  PMD will set the data buffer size to 2 ** ``hp_buf_log_sz``, both for RX & TX.
> +  The capacity of the value is sepcified by the Firmware, and the initialization
> +  will get a failure if it is out of scope.
> +  A larger value is needed to support larger frame.
> +  If this parameter is not specified, by default PMD will set it to 16 and 9KB
> +  jumbo frames are supported.
> +

I think we need more clear  description what is the size range
and why not set to max or min.
In addition I think that the last line should be something like this:
By default PMD will set this value to 16, which mean that 9KB jumbo
frames will be supported.

>  .. _mlx5_firmware_config:
> 
>  Firmware configuration
> diff --git a/doc/guides/rel_notes/release_20_05.rst
> b/doc/guides/rel_notes/release_20_05.rst
> index 2596269..7128f26 100644
> --- a/doc/guides/rel_notes/release_20_05.rst
> +++ b/doc/guides/rel_notes/release_20_05.rst
> @@ -62,6 +62,7 @@ New Features
> 
>    * Added support for matching on IPv4 Time To Live and IPv6 Hop Limit.
>    * Added support for creating Relaxed Ordering Memory Regions.
> +  * Added support for configuring Haripin queue data buffer size.
> 
>  * **Updated the Intel ice driver.**
> 
> --
> 2.5.5

[dpdk-dev] [PATCH v2] doc: update hairpin data buffer size config

[Bing Zhao]

This patch updates the MLX5 PMD and release notes documentations.
Adding the guideline for hairpin data buffer size configuration.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
---
v2: update the range description of hairpin data buffer size
---
 doc/guides/nics/mlx5.rst               | 16 ++++++++++++++++
 doc/guides/rel_notes/release_20_05.rst |  1 +
 2 files changed, 17 insertions(+)

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 759d0ac..74ab28b 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -99,6 +99,7 @@ Features
 - Support for multiple rte_flow groups.
 - Per packet no-inline hint flag to disable packet data copying into Tx descriptors.
 - Hardware LRO.
+- Hairpin.
 
 Limitations
 -----------
@@ -786,6 +787,21 @@ Run-time configuration
   If this parameter is not specified, by default PMD will set
   the smallest value supported by HW.
 
+- ``hp_buf_log_sz`` parameter [int]
+
+  The total data buffer size of a hairpin queue (logarithmic form), in bytes.
+  PMD will set the data buffer size to 2 ** ``hp_buf_log_sz``, both for RX & TX.
+  The capacity of the value is sepcified by the Firmware, and the initialization
+  will get a failure if it is out of scope.
+  The range of the value is from 10 to 19 right now, and the supported frame
+  size of a single packet for hairpin is from 256B to 128KB. It might change if
+  different Firmware release is being used. By using a small value, it could
+  reduce the memory consumption but not work with large frame. If the value is
+  too large, the memory consumption will be high and some potential performance
+  degradation will be introduced.
+  By default PMD will set this value to 16, which mean that 9KB jumbo frames
+  will be supported.
+
 .. _mlx5_firmware_config:
 
 Firmware configuration
diff --git a/doc/guides/rel_notes/release_20_05.rst b/doc/guides/rel_notes/release_20_05.rst
index bacd4c6..3cb3342 100644
--- a/doc/guides/rel_notes/release_20_05.rst
+++ b/doc/guides/rel_notes/release_20_05.rst
@@ -62,6 +62,7 @@ New Features
 
   * Added support for matching on IPv4 Time To Live and IPv6 Hop Limit.
   * Added support for creating Relaxed Ordering Memory Regions.
+  * Added support for configuring Haripin queue data buffer size.
   * Added support for jumbo frame size (9K MTU) in Multi-Packet RQ mode.
   * Optimized the memory consumption of flow.
 
-- 
1.8.3.1

Re: [dpdk-dev] [PATCH v2] doc: update hairpin data buffer size config

[Ori Kam]

> -----Original Message-----
> From: Bing Zhao <bingz@mellanox.com>
> Sent: Tuesday, April 21, 2020 8:33 AM
> To: john.mcnamara@intel.com; marko.kovacevic@intel.com; Slava Ovsiienko
> <viacheslavo@mellanox.com>; Matan Azrad <matan@mellanox.com>; Ori Kam
> <orika@mellanox.com>
> Cc: Shahaf Shuler <shahafs@mellanox.com>; Raslan Darawsheh
> <rasland@mellanox.com>; dev@dpdk.org; Thomas Monjalon
> <thomas@monjalon.net>
> Subject: [PATCH v2] doc: update hairpin data buffer size config
> 
> This patch updates the MLX5 PMD and release notes documentations.
> Adding the guideline for hairpin data buffer size configuration.
> 
> Signed-off-by: Bing Zhao <bingz@mellanox.com>
> ---
> v2: update the range description of hairpin data buffer size
> ---

Acked-by: Ori Kam <orika@mellanox.com>
Thanks,
Ori

>  doc/guides/nics/mlx5.rst               | 16 ++++++++++++++++
>  doc/guides/rel_notes/release_20_05.rst |  1 +
>  2 files changed, 17 insertions(+)
> 
> diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
> index 759d0ac..74ab28b 100644
> --- a/doc/guides/nics/mlx5.rst
> +++ b/doc/guides/nics/mlx5.rst
> @@ -99,6 +99,7 @@ Features
>  - Support for multiple rte_flow groups.
>  - Per packet no-inline hint flag to disable packet data copying into Tx
> descriptors.
>  - Hardware LRO.
> +- Hairpin.
> 
>  Limitations
>  -----------
> @@ -786,6 +787,21 @@ Run-time configuration
>    If this parameter is not specified, by default PMD will set
>    the smallest value supported by HW.
> 
> +- ``hp_buf_log_sz`` parameter [int]
> +
> +  The total data buffer size of a hairpin queue (logarithmic form), in bytes.
> +  PMD will set the data buffer size to 2 ** ``hp_buf_log_sz``, both for RX & TX.
> +  The capacity of the value is sepcified by the Firmware, and the initialization
> +  will get a failure if it is out of scope.
> +  The range of the value is from 10 to 19 right now, and the supported frame
> +  size of a single packet for hairpin is from 256B to 128KB. It might change if
> +  different Firmware release is being used. By using a small value, it could
> +  reduce the memory consumption but not work with large frame. If the value
> is
> +  too large, the memory consumption will be high and some potential
> performance
> +  degradation will be introduced.
> +  By default PMD will set this value to 16, which mean that 9KB jumbo frames
> +  will be supported.
> +
>  .. _mlx5_firmware_config:
> 
>  Firmware configuration
> diff --git a/doc/guides/rel_notes/release_20_05.rst
> b/doc/guides/rel_notes/release_20_05.rst
> index bacd4c6..3cb3342 100644
> --- a/doc/guides/rel_notes/release_20_05.rst
> +++ b/doc/guides/rel_notes/release_20_05.rst
> @@ -62,6 +62,7 @@ New Features
> 
>    * Added support for matching on IPv4 Time To Live and IPv6 Hop Limit.
>    * Added support for creating Relaxed Ordering Memory Regions.
> +  * Added support for configuring Haripin queue data buffer size.
>    * Added support for jumbo frame size (9K MTU) in Multi-Packet RQ mode.
>    * Optimized the memory consumption of flow.
> 
> --
> 1.8.3.1

[dpdk-dev] [PATCH v3] doc: update hairpin data buffer size config

[Bing Zhao]

This patch updates the MLX5 PMD and release notes documentations.
Adding the guideline for hairpin data buffer size configuration.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
---
v2: update the range description of hairpin data buffer size
v3: correct the minimum value of the range
---
 doc/guides/nics/mlx5.rst               | 16 ++++++++++++++++
 doc/guides/rel_notes/release_20_05.rst |  1 +
 2 files changed, 17 insertions(+)

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 759d0ac..91c0a04 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -99,6 +99,7 @@ Features
 - Support for multiple rte_flow groups.
 - Per packet no-inline hint flag to disable packet data copying into Tx descriptors.
 - Hardware LRO.
+- Hairpin.
 
 Limitations
 -----------
@@ -786,6 +787,21 @@ Run-time configuration
   If this parameter is not specified, by default PMD will set
   the smallest value supported by HW.
 
+- ``hp_buf_log_sz`` parameter [int]
+
+  The total data buffer size of a hairpin queue (logarithmic form), in bytes.
+  PMD will set the data buffer size to 2 ** ``hp_buf_log_sz``, both for RX & TX.
+  The capacity of the value is sepcified by the Firmware, and the initialization
+  will get a failure if it is out of scope.
+  The range of the value is from 11 to 19 right now, and the supported frame
+  size of a single packet for hairpin is from 512B to 128KB. It might change if
+  different Firmware release is being used. By using a small value, it could
+  reduce the memory consumption but not work with large frame. If the value is
+  too large, the memory consumption will be high and some potential performance
+  degradation will be introduced.
+  By default PMD will set this value to 16, which mean that 9KB jumbo frames
+  will be supported.
+
 .. _mlx5_firmware_config:
 
 Firmware configuration
diff --git a/doc/guides/rel_notes/release_20_05.rst b/doc/guides/rel_notes/release_20_05.rst
index bacd4c6..3cb3342 100644
--- a/doc/guides/rel_notes/release_20_05.rst
+++ b/doc/guides/rel_notes/release_20_05.rst
@@ -62,6 +62,7 @@ New Features
 
   * Added support for matching on IPv4 Time To Live and IPv6 Hop Limit.
   * Added support for creating Relaxed Ordering Memory Regions.
+  * Added support for configuring Haripin queue data buffer size.
   * Added support for jumbo frame size (9K MTU) in Multi-Packet RQ mode.
   * Optimized the memory consumption of flow.
 
-- 
1.8.3.1

Re: [dpdk-dev] [PATCH v3] doc: update hairpin data buffer size config

[Thomas Monjalon]

21/04/2020 09:29, Bing Zhao:
> This patch updates the MLX5 PMD and release notes documentations.
> Adding the guideline for hairpin data buffer size configuration.
> 
> Signed-off-by: Bing Zhao <bingz@mellanox.com>
> Acked-by: Ori Kam <orika@mellanox.com>
> ---
> --- a/doc/guides/nics/mlx5.rst
> +++ b/doc/guides/nics/mlx5.rst
> +- ``hp_buf_log_sz`` parameter [int]
> +
> +  The total data buffer size of a hairpin queue (logarithmic form), in bytes.
> +  PMD will set the data buffer size to 2 ** ``hp_buf_log_sz``, both for RX & TX.
> +  The capacity of the value is sepcified by the Firmware, and the initialization

sepcified -> specified
Firmware -> firmware

> +  will get a failure if it is out of scope.
> +  The range of the value is from 11 to 19 right now, and the supported frame
> +  size of a single packet for hairpin is from 512B to 128KB. It might change if
> +  different Firmware release is being used. By using a small value, it could

Firmware -> firmware

> +  reduce the memory consumption but not work with large frame. If the value is
> +  too large, the memory consumption will be high and some potential performance
> +  degradation will be introduced.
> +  By default PMD will set this value to 16, which mean that 9KB jumbo frames

By default, the PMD

> +  will be supported.
> +

> --- a/doc/guides/rel_notes/release_20_05.rst
> +++ b/doc/guides/rel_notes/release_20_05.rst
> @@ -62,6 +62,7 @@ New Features
>  
>    * Added support for matching on IPv4 Time To Live and IPv6 Hop Limit.
>    * Added support for creating Relaxed Ordering Memory Regions.
> +  * Added support for configuring Haripin queue data buffer size.

Haripin -> Hairpin

[dpdk-dev] [PATCH v4] doc: update hairpin data buffer size config

[Bing Zhao]

This patch updates the MLX5 PMD and release notes documentations.
Adding the guideline for hairpin data buffer size configuration.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
---
v2: update the range description of hairpin data buffer size
v3: correct the minimum value of the range
v4: correct some typos and grammatical errors
---
 doc/guides/nics/mlx5.rst               | 16 ++++++++++++++++
 doc/guides/rel_notes/release_20_05.rst |  1 +
 2 files changed, 17 insertions(+)

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 759d0ac..51b5d47 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -99,6 +99,7 @@ Features
 - Support for multiple rte_flow groups.
 - Per packet no-inline hint flag to disable packet data copying into Tx descriptors.
 - Hardware LRO.
+- Hairpin.
 
 Limitations
 -----------
@@ -786,6 +787,21 @@ Run-time configuration
   If this parameter is not specified, by default PMD will set
   the smallest value supported by HW.
 
+- ``hp_buf_log_sz`` parameter [int]
+
+  The total data buffer size of a hairpin queue (logarithmic form), in bytes.
+  PMD will set the data buffer size to 2 ** ``hp_buf_log_sz``, both for RX & TX.
+  The capacity of the value is specified by the firmware and the initialization
+  will get a failure if it is out of scope.
+  The range of the value is from 11 to 19 right now, and the supported frame
+  size of a single packet for hairpin is from 512B to 128KB. It might change if
+  different firmware release is being used. By using a small value, it could
+  reduce memory consumption but not work with a large frame. If the value is
+  too large, the memory consumption will be high and some potential performance
+  degradation will be introduced.
+  By default, the PMD will set this value to 16, which means that 9KB jumbo
+  frames will be supported.
+
 .. _mlx5_firmware_config:
 
 Firmware configuration
diff --git a/doc/guides/rel_notes/release_20_05.rst b/doc/guides/rel_notes/release_20_05.rst
index 1e5304d..d43aa2e 100644
--- a/doc/guides/rel_notes/release_20_05.rst
+++ b/doc/guides/rel_notes/release_20_05.rst
@@ -78,6 +78,7 @@ New Features
 
   * Added support for matching on IPv4 Time To Live and IPv6 Hop Limit.
   * Added support for creating Relaxed Ordering Memory Regions.
+  * Added support for configuring Hairpin queue data buffer size.
   * Added support for jumbo frame size (9K MTU) in Multi-Packet RQ mode.
   * Optimized the memory consumption of flow.
 
-- 
1.8.3.1

Re: [dpdk-dev] [PATCH v3] doc: update hairpin data buffer size config

[Bing Zhao]

> -----Original Message-----
> From: Thomas Monjalon <thomas@monjalon.net>
> Sent: Wednesday, April 22, 2020 10:13 AM
> To: Bing Zhao <bingz@mellanox.com>
> Cc: john.mcnamara@intel.com; marko.kovacevic@intel.com; Slava
> Ovsiienko <viacheslavo@mellanox.com>; Ori Kam
> <orika@mellanox.com>; Matan Azrad <matan@mellanox.com>;
> Shahaf Shuler <shahafs@mellanox.com>; Raslan Darawsheh
> <rasland@mellanox.com>; dev@dpdk.org
> Subject: Re: [PATCH v3] doc: update hairpin data buffer size config
> 
> 21/04/2020 09:29, Bing Zhao:
> > This patch updates the MLX5 PMD and release notes
> documentations.
> > Adding the guideline for hairpin data buffer size configuration.
> >
> > Signed-off-by: Bing Zhao <bingz@mellanox.com>
> > Acked-by: Ori Kam <orika@mellanox.com>
> > ---
> > --- a/doc/guides/nics/mlx5.rst
> > +++ b/doc/guides/nics/mlx5.rst
> > +- ``hp_buf_log_sz`` parameter [int]
> > +
> > +  The total data buffer size of a hairpin queue (logarithmic form), in
> bytes.
> > +  PMD will set the data buffer size to 2 ** ``hp_buf_log_sz``, both
> for RX & TX.
> > +  The capacity of the value is sepcified by the Firmware, and the
> > + initialization
> 
> sepcified -> specified
> Firmware -> firmware
> 
> > +  will get a failure if it is out of scope.
> > +  The range of the value is from 11 to 19 right now, and the
> > + supported frame  size of a single packet for hairpin is from 512B to
> > + 128KB. It might change if  different Firmware release is being used.
> > + By using a small value, it could
> 
> Firmware -> firmware
> 
> > +  reduce the memory consumption but not work with large frame. If
> the
> > + value is  too large, the memory consumption will be high and some
> > + potential performance  degradation will be introduced.
> > +  By default PMD will set this value to 16, which mean that 9KB
> jumbo
> > + frames
> 
> By default, the PMD
> 
> > +  will be supported.
> > +
> 
> > --- a/doc/guides/rel_notes/release_20_05.rst
> > +++ b/doc/guides/rel_notes/release_20_05.rst
> > @@ -62,6 +62,7 @@ New Features
> >
> >    * Added support for matching on IPv4 Time To Live and IPv6 Hop
> Limit.
> >    * Added support for creating Relaxed Ordering Memory Regions.
> > +  * Added support for configuring Haripin queue data buffer size.
> 
> Haripin -> Hairpin
> 
> 

Many thanks, Thomas. I corrected them and sent the v4.

Re: [dpdk-dev] [PATCH v4] doc: update hairpin data buffer size config

[Raslan Darawsheh]

Hi,

> -----Original Message-----
> From: Bing Zhao <bingz@mellanox.com>
> Sent: Wednesday, April 22, 2020 6:11 AM
> To: john.mcnamara@intel.com; marko.kovacevic@intel.com; Slava Ovsiienko
> <viacheslavo@mellanox.com>; Ori Kam <orika@mellanox.com>; Matan
> Azrad <matan@mellanox.com>
> Cc: Shahaf Shuler <shahafs@mellanox.com>; Raslan Darawsheh
> <rasland@mellanox.com>; dev@dpdk.org; Thomas Monjalon
> <thomas@monjalon.net>
> Subject: [PATCH v4] doc: update hairpin data buffer size config
> 
> This patch updates the MLX5 PMD and release notes documentations.
> Adding the guideline for hairpin data buffer size configuration.
> 
> Signed-off-by: Bing Zhao <bingz@mellanox.com>
> Acked-by: Ori Kam <orika@mellanox.com>
> ---
> v2: update the range description of hairpin data buffer size
> v3: correct the minimum value of the range
> v4: correct some typos and grammatical errors
> ---
>  doc/guides/nics/mlx5.rst               | 16 ++++++++++++++++
>  doc/guides/rel_notes/release_20_05.rst |  1 +
>  2 files changed, 17 insertions(+)
> 
> diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
> index 759d0ac..51b5d47 100644
> --- a/doc/guides/nics/mlx5.rst
> +++ b/doc/guides/nics/mlx5.rst
> @@ -99,6 +99,7 @@ Features
>  - Support for multiple rte_flow groups.
>  - Per packet no-inline hint flag to disable packet data copying into Tx
> descriptors.
>  - Hardware LRO.
> +- Hairpin.
> 
>  Limitations
>  -----------
> @@ -786,6 +787,21 @@ Run-time configuration
>    If this parameter is not specified, by default PMD will set
>    the smallest value supported by HW.
> 
> +- ``hp_buf_log_sz`` parameter [int]
> +
> +  The total data buffer size of a hairpin queue (logarithmic form), in bytes.
> +  PMD will set the data buffer size to 2 ** ``hp_buf_log_sz``, both for RX &
> TX.
> +  The capacity of the value is specified by the firmware and the initialization
> +  will get a failure if it is out of scope.
> +  The range of the value is from 11 to 19 right now, and the supported frame
> +  size of a single packet for hairpin is from 512B to 128KB. It might change if
> +  different firmware release is being used. By using a small value, it could
> +  reduce memory consumption but not work with a large frame. If the value
> is
> +  too large, the memory consumption will be high and some potential
> performance
> +  degradation will be introduced.
> +  By default, the PMD will set this value to 16, which means that 9KB jumbo
> +  frames will be supported.
> +
>  .. _mlx5_firmware_config:
> 
>  Firmware configuration
> diff --git a/doc/guides/rel_notes/release_20_05.rst
> b/doc/guides/rel_notes/release_20_05.rst
> index 1e5304d..d43aa2e 100644
> --- a/doc/guides/rel_notes/release_20_05.rst
> +++ b/doc/guides/rel_notes/release_20_05.rst
> @@ -78,6 +78,7 @@ New Features
> 
>    * Added support for matching on IPv4 Time To Live and IPv6 Hop Limit.
>    * Added support for creating Relaxed Ordering Memory Regions.
> +  * Added support for configuring Hairpin queue data buffer size.
>    * Added support for jumbo frame size (9K MTU) in Multi-Packet RQ mode.
>    * Optimized the memory consumption of flow.
> 
> --
> 1.8.3.1


Patch rebased and applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh