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CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(4636009)(136003)(346002)(376002)(396003)(39860400002)(46966005)(26005)(6506007)(316002)(110136005)(356005)(8676002)(33656002)(54906003)(8936002)(52536014)(2906002)(55016002)(70586007)(336012)(186003)(47076004)(53546011)(4326008)(82310400003)(7696005)(86362001)(5660300002)(9686003)(478600001)(45080400002)(82740400003)(81166007)(83380400001)(30864003)(70206006); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Oct 2020 08:50:50.1949 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1fca7730-1c2a-4b6b-b051-08d8701e403d X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DB5EUR03FT011.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR08MB4458 Subject: Re: [dpdk-dev] [PATCH v5 01/17] eal: add max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Ciara Power > Sent: Tuesday, October 13, 2020 7:04 PM > To: dev@dpdk.org > Cc: viktorin@rehivetech.com; Ruifeng Wang ; > jerinj@marvell.com; drc@linux.vnet.ibm.com; bruce.richardson@intel.com; > konstantin.ananyev@intel.com; Ciara Power ; > Honnappa Nagarahalli ; Dmitry Kozlyuk > ; Narcisa Ana Maria Vasile > ; Dmitry Malloy ; > Pallavi Kadam ; Ray Kinsella ; > Neil Horman > Subject: [PATCH v5 01/17] eal: add max SIMD bitwidth >=20 > This patch adds a max SIMD bitwidth EAL configuration. The API allows for= an > app to set this value. It can also be set using EAL argument --force-max-= simd- > bitwidth, which will lock the value and override any modifications made b= y > the app. >=20 > Each arch has a define for the default SIMD bitwidth value, this is used = on EAL > init to set the config max SIMD bitwidth. >=20 > Cc: Ruifeng Wang > Cc: Jerin Jacob > Cc: Honnappa Nagarahalli > Cc: David Christensen >=20 > Signed-off-by: Ciara Power >=20 > --- > v4: > - Used RTE_SIMD_MAX instead of UINT16_MAX. > - Renamed enums to better reflect usage. > - Added functions to windows symbol export file. > - Modified Doxygen comments. > - Modified enum name. > - Changed RTE_SIMD_MAX value to a power of 2. > - Merged patch 2 into this patch. > - Enum now used for default value defines. > - Fixed some small comments on v3. > v3: > - Added enum value to essentially disable using max SIMD to choose > paths, intended for use by ARM SVE. > - Fixed parsing bitwidth argument to return an error for values > greater than uint16_t. > - Removed unnecessary define in generic rte_vect.h > - Changed default bitwidth for ARM to UINT16_MAX, to allow for SVE. > v2: > - Added to Doxygen comment for API. > - Changed default bitwidth for Arm to 128. > --- > lib/librte_eal/arm/include/rte_vect.h | 2 + > lib/librte_eal/common/eal_common_options.c | 66 > ++++++++++++++++++++++ > lib/librte_eal/common/eal_internal_cfg.h | 8 +++ > lib/librte_eal/common/eal_options.h | 2 + > lib/librte_eal/include/rte_eal.h | 40 +++++++++++++ > lib/librte_eal/ppc/include/rte_vect.h | 2 + > lib/librte_eal/rte_eal_exports.def | 2 + > lib/librte_eal/rte_eal_version.map | 2 + > lib/librte_eal/x86/include/rte_vect.h | 2 + > 9 files changed, 126 insertions(+) >=20 > diff --git a/lib/librte_eal/arm/include/rte_vect.h > b/lib/librte_eal/arm/include/rte_vect.h > index 01c51712a1..f53c89be97 100644 > --- a/lib/librte_eal/arm/include/rte_vect.h > +++ b/lib/librte_eal/arm/include/rte_vect.h > @@ -14,6 +14,8 @@ > extern "C" { > #endif >=20 > +#define RTE_DEFAULT_SIMD_BITWIDTH RTE_SIMD_MAX > + > typedef int32x4_t xmm_t; >=20 > #define XMM_SIZE (sizeof(xmm_t)) > diff --git a/lib/librte_eal/common/eal_common_options.c > b/lib/librte_eal/common/eal_common_options.c > index a5426e1234..8c79f1b2fc 100644 > --- a/lib/librte_eal/common/eal_common_options.c > +++ b/lib/librte_eal/common/eal_common_options.c > @@ -35,6 +35,7 @@ > #ifndef RTE_EXEC_ENV_WINDOWS > #include > #endif > +#include >=20 > #include "eal_internal_cfg.h" > #include "eal_options.h" > @@ -102,6 +103,7 @@ eal_long_options[] =3D { > {OPT_MATCH_ALLOCATIONS, 0, NULL, > OPT_MATCH_ALLOCATIONS_NUM}, > {OPT_TELEMETRY, 0, NULL, OPT_TELEMETRY_NUM }, > {OPT_NO_TELEMETRY, 0, NULL, OPT_NO_TELEMETRY_NUM }, > + {OPT_FORCE_MAX_SIMD_BITWIDTH, 1, NULL, > +OPT_FORCE_MAX_SIMD_BITWIDTH_NUM}, > {0, 0, NULL, 0 } > }; >=20 > @@ -343,6 +345,8 @@ eal_reset_internal_config(struct internal_config > *internal_cfg) > internal_cfg->user_mbuf_pool_ops_name =3D NULL; > CPU_ZERO(&internal_cfg->ctrl_cpuset); > internal_cfg->init_complete =3D 0; > + internal_cfg->max_simd_bitwidth.bitwidth =3D > RTE_DEFAULT_SIMD_BITWIDTH; > + internal_cfg->max_simd_bitwidth.forced =3D 0; > } >=20 > static int > @@ -1309,6 +1313,34 @@ eal_parse_iova_mode(const char *name) > return 0; > } >=20 > +static int > +eal_parse_simd_bitwidth(const char *arg) { > + char *end; > + unsigned long bitwidth; > + int ret; > + struct internal_config *internal_conf =3D > + eal_get_internal_configuration(); > + > + if (arg =3D=3D NULL || arg[0] =3D=3D '\0') > + return -1; > + > + errno =3D 0; > + bitwidth =3D strtoul(arg, &end, 0); > + > + /* check for errors */ > + if (errno !=3D 0 || end =3D=3D NULL || *end !=3D '\0' || bitwidth > > RTE_SIMD_MAX) > + return -1; > + > + if (bitwidth =3D=3D 0) > + bitwidth =3D (unsigned long) RTE_SIMD_MAX; > + ret =3D rte_set_max_simd_bitwidth(bitwidth); > + if (ret < 0) > + return -1; > + internal_conf->max_simd_bitwidth.forced =3D 1; > + return 0; > +} > + > static int > eal_parse_base_virtaddr(const char *arg) { @@ -1707,6 +1739,13 @@ > eal_parse_common_option(int opt, const char *optarg, > case OPT_NO_TELEMETRY_NUM: > conf->no_telemetry =3D 1; > break; > + case OPT_FORCE_MAX_SIMD_BITWIDTH_NUM: > + if (eal_parse_simd_bitwidth(optarg) < 0) { > + RTE_LOG(ERR, EAL, "invalid parameter for --" > + OPT_FORCE_MAX_SIMD_BITWIDTH > "\n"); > + return -1; > + } > + break; >=20 > /* don't know what to do, leave this to caller */ > default: > @@ -1903,6 +1942,32 @@ eal_check_common_options(struct > internal_config *internal_cfg) > return 0; > } >=20 > +uint16_t > +rte_get_max_simd_bitwidth(void) > +{ > + const struct internal_config *internal_conf =3D > + eal_get_internal_configuration(); > + return internal_conf->max_simd_bitwidth.bitwidth; > +} > + > +int > +rte_set_max_simd_bitwidth(uint16_t bitwidth) { > + struct internal_config *internal_conf =3D > + eal_get_internal_configuration(); > + if (internal_conf->max_simd_bitwidth.forced) { > + RTE_LOG(NOTICE, EAL, "Cannot set max SIMD bitwidth - user > runtime override enabled"); > + return -EPERM; > + } > + > + if (bitwidth < RTE_SIMD_DISABLED || !rte_is_power_of_2(bitwidth)) > { > + RTE_LOG(ERR, EAL, "Invalid bitwidth value!\n"); > + return -EINVAL; > + } > + internal_conf->max_simd_bitwidth.bitwidth =3D bitwidth; > + return 0; > +} > + > void > eal_common_usage(void) > { > @@ -1981,6 +2046,7 @@ eal_common_usage(void) > " --"OPT_BASE_VIRTADDR" Base virtual address\n" > " --"OPT_TELEMETRY" Enable telemetry support (on by > default)\n" > " --"OPT_NO_TELEMETRY" Disable telemetry support\n" > + " --"OPT_FORCE_MAX_SIMD_BITWIDTH" Force the max SIMD > bitwidth\n" > "\nEAL options for DEBUG use only:\n" > " --"OPT_HUGE_UNLINK" Unlink hugepage files after init\n" > " --"OPT_NO_HUGE" Use malloc instead of hugetlbfs\n" > diff --git a/lib/librte_eal/common/eal_internal_cfg.h > b/lib/librte_eal/common/eal_internal_cfg.h > index 13f93388a7..0c880cbe17 100644 > --- a/lib/librte_eal/common/eal_internal_cfg.h > +++ b/lib/librte_eal/common/eal_internal_cfg.h > @@ -33,6 +33,12 @@ struct hugepage_info { > int lock_descriptor; /**< file descriptor for hugepage dir */ > }; >=20 > +struct simd_bitwidth { > + bool forced; > + /**< flag indicating if bitwidth is forced and can't be modified */ > + uint16_t bitwidth; /**< bitwidth value */ }; > + > /** > * internal configuration > */ > @@ -85,6 +91,8 @@ struct internal_config { > volatile unsigned int init_complete; > /**< indicates whether EAL has completed initialization */ > unsigned int no_telemetry; /**< true to disable Telemetry */ > + struct simd_bitwidth max_simd_bitwidth; > + /**< max simd bitwidth path to use */ > }; >=20 > void eal_reset_internal_config(struct internal_config *internal_cfg); di= ff --git > a/lib/librte_eal/common/eal_options.h > b/lib/librte_eal/common/eal_options.h > index 89769d48b4..ef33979664 100644 > --- a/lib/librte_eal/common/eal_options.h > +++ b/lib/librte_eal/common/eal_options.h > @@ -85,6 +85,8 @@ enum { > OPT_TELEMETRY_NUM, > #define OPT_NO_TELEMETRY "no-telemetry" > OPT_NO_TELEMETRY_NUM, > +#define OPT_FORCE_MAX_SIMD_BITWIDTH "force-max-simd-bitwidth" > + OPT_FORCE_MAX_SIMD_BITWIDTH_NUM, > OPT_LONG_MAX_NUM > }; >=20 > diff --git a/lib/librte_eal/include/rte_eal.h b/lib/librte_eal/include/rt= e_eal.h > index e3c2ef185e..706d3cca5a 100644 > --- a/lib/librte_eal/include/rte_eal.h > +++ b/lib/librte_eal/include/rte_eal.h > @@ -43,6 +43,23 @@ enum rte_proc_type_t { > RTE_PROC_INVALID > }; >=20 > +/** > + * The max SIMD bitwidth value to limit vector path selection. > + */ > +enum rte_max_simd { > + RTE_SIMD_DISABLED =3D 64, > + /**< Limits path selection to scalar, disables all vector paths. */ > + RTE_SIMD_128 =3D 128, > + /**< Limits path selection to SSE/NEON/Altivec or below. */ > + RTE_SIMD_256 =3D 256, /**< Limits path selection to AVX2 or below. */ > + RTE_SIMD_512 =3D 512, /**< Limits path selection to AVX512 or below. > */ > + RTE_SIMD_MAX =3D INT16_MAX + 1, > + /**< > + * Disables limiting by max SIMD bitwidth, allows all suitable paths. > + * This value is used as it is a large number and a power of 2. > + */ > +}; > + > /** > * Get the process type in a multi-process setup > * > @@ -51,6 +68,29 @@ enum rte_proc_type_t { > */ > enum rte_proc_type_t rte_eal_process_type(void); >=20 > +/** > + * Get the supported SIMD bitwidth. > + * > + * @return > + * uint16_t bitwidth. > + */ > +__rte_experimental > +uint16_t rte_get_max_simd_bitwidth(void); > + > +/** > + * Set the supported SIMD bitwidth. > + * This API should only be called once at initialization, before EAL ini= t. > + * > + * @param bitwidth > + * uint16_t bitwidth. > + * @return > + * - 0 on success. > + * - -EINVAL on invalid bitwidth parameter. > + * - -EPERM if bitwidth is forced. > + */ > +__rte_experimental > +int rte_set_max_simd_bitwidth(uint16_t bitwidth); > + > /** > * Request iopl privilege for all RPL. > * > diff --git a/lib/librte_eal/ppc/include/rte_vect.h > b/lib/librte_eal/ppc/include/rte_vect.h > index b0545c878c..a69aabc568 100644 > --- a/lib/librte_eal/ppc/include/rte_vect.h > +++ b/lib/librte_eal/ppc/include/rte_vect.h > @@ -15,6 +15,8 @@ > extern "C" { > #endif >=20 > +#define RTE_DEFAULT_SIMD_BITWIDTH RTE_SIMD_256 > + > typedef vector signed int xmm_t; >=20 > #define XMM_SIZE (sizeof(xmm_t)) > diff --git a/lib/librte_eal/rte_eal_exports.def > b/lib/librte_eal/rte_eal_exports.def > index 7b35beb702..81e99b00d9 100644 > --- a/lib/librte_eal/rte_eal_exports.def > +++ b/lib/librte_eal/rte_eal_exports.def > @@ -26,6 +26,7 @@ EXPORTS > rte_eal_tailq_register > rte_eal_using_phys_addrs > rte_free > + rte_get_max_simd_bitwidth > rte_get_tsc_hz > rte_hexdump > rte_intr_rx_ctl > @@ -62,6 +63,7 @@ EXPORTS > rte_memzone_reserve_aligned > rte_memzone_reserve_bounded > rte_memzone_walk > + rte_set_max_simd_bitwidth > rte_socket_id > rte_strerror > rte_strsplit > diff --git a/lib/librte_eal/rte_eal_version.map > b/lib/librte_eal/rte_eal_version.map > index a93dea9fe6..714be49377 100644 > --- a/lib/librte_eal/rte_eal_version.map > +++ b/lib/librte_eal/rte_eal_version.map > @@ -400,6 +400,8 @@ EXPERIMENTAL { > # added in 20.11 > __rte_eal_trace_generic_size_t; > rte_service_lcore_may_be_active; > + rte_get_max_simd_bitwidth; > + rte_set_max_simd_bitwidth; > }; >=20 > INTERNAL { > diff --git a/lib/librte_eal/x86/include/rte_vect.h > b/lib/librte_eal/x86/include/rte_vect.h > index df5a607623..a00d3d5a62 100644 > --- a/lib/librte_eal/x86/include/rte_vect.h > +++ b/lib/librte_eal/x86/include/rte_vect.h > @@ -35,6 +35,8 @@ > extern "C" { > #endif >=20 > +#define RTE_DEFAULT_SIMD_BITWIDTH RTE_SIMD_256 > + > typedef __m128i xmm_t; >=20 > #define XMM_SIZE (sizeof(xmm_t)) > -- > 2.22.0 Arm SVE may not perfectly fit into this. Because SIMD bitwidth is unknown /= unconcerned by application.=20 I think vector path will be taken when max SIMD bitwidth is not set to RTE_= SIMD_DISABLED. Reviewed-by: Ruifeng Wang