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Tue, 2 Jul 2019 14:08:29 +0000 Received: from VI1PR08MB3167.eurprd08.prod.outlook.com ([fe80::f1a9:e870:d495:8d31]) by VI1PR08MB3167.eurprd08.prod.outlook.com ([fe80::f1a9:e870:d495:8d31%5]) with mapi id 15.20.2032.019; Tue, 2 Jul 2019 14:08:29 +0000 From: "Gavin Hu (Arm Technology China)" To: Pavan Nikhilesh Bhagavatula , "dev@dpdk.org" CC: "thomas@monjalon.net" , "jerinj@marvell.com" , "hemant.agrawal@nxp.com" , "bruce.richardson@intel.com" , "chaozhu@linux.vnet.ibm.com" , Honnappa Nagarahalli , nd Thread-Topic: [dpdk-dev] [RFC 1/5] eal: add the APIs to wait until equal Thread-Index: AQHVL1/p6I9OLSsAOECZ0PPDfKo2XKa1iGIAgAHX+TA= Date: Tue, 2 Jul 2019 14:08:29 +0000 Message-ID: References: <1561911676-37718-1-git-send-email-gavin.hu@arm.com> <1561911676-37718-2-git-send-email-gavin.hu@arm.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ts-tracking-id: 1f4fa2a5-82e7-47c1-b185-f912976d83d9.0 x-checkrecipientchecked: true authentication-results: spf=none (sender IP is ) smtp.mailfrom=Gavin.Hu@arm.com; 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DIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR08MB3055; H:VI1PR08MB3167.eurprd08.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: AI0wyzsmX0eeC6wI9EByzD40j0F3vg/OM7JIBdM2Bq5Ez6wU9g+IOLtCcQg3DrlBifYWvnhQKMY2pyStc+S728BMIWWYoNY/OjLMpQxxHBILrVlWkf9ddihwY9OgW7zeUQX/M703UcnylfVM3jLNBkgqROzPbeoxuhqlJIhgIht/lcbbmn+PuuKdFNZWcEJTqdh9Nm9otxqfRJPai+n8CPDCJ+I9hwyOebgpoqiMpcO85+hyyt4RQik03CtHgUvioEUSynYOEs6bgKr4lfSCu3bjXjXptqIvNFGBwf2X3bxTAA1L4IeWauzkjixAtW0aiiN6Ckzcb56I/1ny1l7YCZjsQAH32mYf7eKA4x52T1uKcOFum/nJrjIEwy2rSybUcrM5vdv9CQodzSnSiPRPw6ngPVRS46nAghmkyT08KYU= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: 33fee7f5-f296-40e4-1823-08d6fef6c246 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Jul 2019 14:08:29.2878 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Gavin.Hu@arm.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR08MB3055 Subject: Re: [dpdk-dev] [RFC 1/5] eal: add the APIs to wait until equal X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Pavan, > -----Original Message----- > From: Pavan Nikhilesh Bhagavatula > Sent: Monday, July 1, 2019 5:59 PM > To: Gavin Hu (Arm Technology China) ; dev@dpdk.org > Cc: thomas@monjalon.net; jerinj@marvell.com; hemant.agrawal@nxp.com; > bruce.richardson@intel.com; chaozhu@linux.vnet.ibm.com; Honnappa > Nagarahalli ; nd > Subject: RE: [dpdk-dev] [RFC 1/5] eal: add the APIs to wait until equal >=20 > Hi Gavin, >=20 > >-----Original Message----- > >From: dev On Behalf Of Gavin Hu > >Sent: Sunday, June 30, 2019 9:51 PM > >To: dev@dpdk.org > >Cc: thomas@monjalon.net; Jerin Jacob Kollanukkaran > >; hemant.agrawal@nxp.com; > >bruce.richardson@intel.com; chaozhu@linux.vnet.ibm.com; > >Honnappa.Nagarahalli@arm.com; nd@arm.com; gavin.hu@arm.com > >Subject: [dpdk-dev] [RFC 1/5] eal: add the APIs to wait until equal > > > >The rte_wait_until_equal_xxx APIs abstract the functionality of 'polling > >for a memory location to become equal to a given value'. > > > >Signed-off-by: Gavin Hu > >Reviewed-by: Ruifeng Wang > >Reviewed-by: Steve Capper > >Reviewed-by: Ola Liljedahl > >Reviewed-by: Honnappa Nagarahalli > >--- > > .../common/include/arch/arm/rte_pause_64.h | 143 > >+++++++++++++++++++++ > > lib/librte_eal/common/include/generic/rte_pause.h | 20 +++ > > 2 files changed, 163 insertions(+) > > > >diff --git a/lib/librte_eal/common/include/arch/arm/rte_pause_64.h > >b/lib/librte_eal/common/include/arch/arm/rte_pause_64.h > >index 93895d3..0095da6 100644 > >--- a/lib/librte_eal/common/include/arch/arm/rte_pause_64.h > >+++ b/lib/librte_eal/common/include/arch/arm/rte_pause_64.h > >@@ -17,6 +17,149 @@ static inline void rte_pause(void) > > asm volatile("yield" ::: "memory"); > > } > > > >+#ifdef RTE_USE_WFE > >+#define rte_wait_until_equal_relaxed(addr, expected) do {\ > >+ typeof(*addr) tmp; \ > >+ if (__builtin_constant_p((expected))) \ > >+ do { \ > >+ if (sizeof(*(addr)) =3D=3D 16)\ > >+ asm volatile( \ > >+ "sevl\n" \ > >+ "1: wfe\n" \ > >+ "ldxrh %w0, %1\n" \ > >+ "cmp %w0, %w2\n" \ > >+ "bne 1b\n" \ > >+ : "=3D&r"(tmp) \ > >+ : "Q"(*addr), > >"i"(expected) \ > >+ : "cc", "memory"); \ >=20 > Can we have early exit here i.e. instead of going directly to wfe can we = first > check the condition and then fallthrough? > Something like: > asm volatile(" ldxrh %w0 %1 \n" > " cmp %w0 %w2 \n" > " b.eq 2: \n" > "1: wfe \n" > " ldxrh %w0, %1 \n" > " cmp %w0, %w2 \n" > " b.ne 1b \n" > "2: \n" > :::); >=20 > Regards, > Pavan. Ok, I will do it in next version.