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Fri, 14 Dec 2018 01:30:13 +0000 From: "Gavin Hu (Arm Technology China)" To: Stephen Hemminger , "Joyce Kong (Arm Technology China)" CC: "dev@dpdk.org" , nd , "thomas@monjalon.net" , "jerin.jacob@caviumnetworks.com" , "hemant.agrawal@nxp.com" , Honnappa Nagarahalli Thread-Topic: [dpdk-dev] [PATCH v1 0/2] reimplement rwlock and add relevant perf test case Thread-Index: AQHUkpU8z23I4o0GIkC8P4QM3RSliaV8I9MAgAFPzKA= Date: Fri, 14 Dec 2018 01:30:12 +0000 Message-ID: References: <1544672265-219262-1-git-send-email-joyce.kong@arm.com> <20181212212710.3c9ad4d3@xeon-e3> In-Reply-To: <20181212212710.3c9ad4d3@xeon-e3> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Gavin.Hu@arm.com; x-originating-ip: [113.29.88.7] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; VI1PR08MB3854; 6:Oht0nyTyLbCWDrL29YR/davEq5mGkpuSCP8EmKGE9lns52C+/L2kuP6Z8PbPEp3uBq02+ponpaBd3U24O/jbbsSGXvleKn20B/mlpKwSTo0Z2/Y3PTdsW4xziIEnt/pTUp0T7iD7vMhGnt5TAcdl/P40rFB1ZGmgJQ/4S8iuN0dgUrlSzhOzMiSNE1K3pKBLZ/oW37OEcdymBEPAFYFPys9OumuomcS8u6FcJaYnoHe9Ew0ytgIbodBSYRtn0pHeZT5AMgb5JJXh6XI46DUONml1osX3L+ENCa0US3empmAtvIreTEVPN4NwDaMtvlvDIiXQ+/xuZmXZ+MduwFEGnBr4wQGqk2YERLQOiPBd4RqrScc5uI4qtM4dPJdCet2b7ds26BfEnZbhq5UzErK8JW9Qt3yyNi8Tmc8JzrQq+dbaVgAnXoHN4XUaJ2HY8DhVV51oHm//igwSX1gfVq/P+Q==; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: 82313edb-f4cb-457f-9675-08d66163b1b6 X-MS-Exchange-CrossTenant-originalarrivaltime: 14 Dec 2018 01:30:12.8712 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR08MB3854 Subject: Re: [dpdk-dev] [PATCH v1 0/2] reimplement rwlock and add relevant perf test case X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 14 Dec 2018 01:30:16 -0000 Hi Stephen, Thanks for your comment and sharing the link! We are looking into it and it may take more time for performance profiling. Best Regards, Gavin > -----Original Message----- > From: Stephen Hemminger > Sent: Thursday, December 13, 2018 1:27 PM > To: Joyce Kong (Arm Technology China) > Cc: dev@dpdk.org; nd ; thomas@monjalon.net; > jerin.jacob@caviumnetworks.com; hemant.agrawal@nxp.com; Honnappa > Nagarahalli ; Gavin Hu (Arm Technology > China) > Subject: Re: [dpdk-dev] [PATCH v1 0/2] reimplement rwlock and add > relevant perf test case >=20 > On Thu, 13 Dec 2018 11:37:43 +0800 > Joyce Kong wrote: >=20 > > v1: reimplement rwlock with __atomic builtins, and add a rwlock perf te= st > > on all available cores to benchmark the improvement. > > > > We tested the patches on three arm64 platforms, ThundeX2 gained 20% > > performance, Qualcomm gained 36% and the 4-Cortex-A72 Marvell > MACCHIATObin gained 19.6%. > > Below is the detailed test result on ThunderX2: > > > > *** rwlock_autotest without __atomic builtins *** Rwlock Perf Test on > > 128 cores... > > Core [0] count =3D 281 > > Core [1] count =3D 252 > > Core [2] count =3D 290 > > Core [3] count =3D 259 > > Core [4] count =3D 287 > > ... > > Core [209] count =3D 3 > > Core [210] count =3D 31 > > Core [211] count =3D 120 > > Total count =3D 18537 > > > > *** rwlock_autotest with __atomic builtins *** Rwlock Perf Test on 128 > > cores... > > Core [0] count =3D 346 > > Core [1] count =3D 355 > > Core [2] count =3D 259 > > Core [3] count =3D 285 > > Core [4] count =3D 320 > > ... > > Core [209] count =3D 2 > > Core [210] count =3D 23 > > Core [211] count =3D 63 > > Total count =3D 22194 > > > > Gavin Hu (1): > > rwlock: reimplement with __atomic builtins > > > > Joyce Kong (1): > > test/rwlock: add perf test case > > > > lib/librte_eal/common/include/generic/rte_rwlock.h | 16 ++--- > > test/test/test_rwlock.c | 71 ++++++++++++++= ++++++++ > > 2 files changed, 79 insertions(+), 8 deletions(-) > > >=20 > Did you consider using a better algorithm not just better primitives. > See https://locklessinc.com/articles/locks/ for a more complete discussio= n of > alternatives like ticket locks.