From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9B196A0543; Fri, 7 Oct 2022 22:17:35 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8894540DFB; Fri, 7 Oct 2022 22:17:35 +0200 (CEST) Received: from mail-wm1-f54.google.com (mail-wm1-f54.google.com [209.85.128.54]) by mails.dpdk.org (Postfix) with ESMTP id 3E11240042 for ; Fri, 7 Oct 2022 22:17:34 +0200 (CEST) Received: by mail-wm1-f54.google.com with SMTP id ay36so3536753wmb.0 for ; Fri, 07 Oct 2022 13:17:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind.com; s=google; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=l4yFxgiX8qA/OVH7sdkfO1oGaxT8hseR0fL0uMGjudE=; b=CG/qykwhD2jAN0eUEUR4ueuC+pDsyCQRq+qAMc+0+mbmaxgqICL7EAldfiVG2XpCOh 0WI7h/Yb1RF0ztBbeQ3pTQfrDyCLdeovDcMKhZT+2R35lc0Xv0BT4GyvB9iMV6shkFWR K4nZuKaLiZjbd+PX25POyWtUs/yzEm9ESRIkgDW6eLlOR523zOV0XY6geRK77guGpeHA hWJB831ES0YTqwdr4TvVBb4DUrMp+ywUi0nIEdnMphvPHFIvOqP9jMyYjPYKNPRZVsMO 6yMOdv97ttZG9AbdXg5E23umoLUfa+Q4jjJ5bx2dEdpj1Zfju1mtVpFtUCyRdMav6dxt w46Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=l4yFxgiX8qA/OVH7sdkfO1oGaxT8hseR0fL0uMGjudE=; b=LIf8HAMuNbVlkvhBKRj4qJwqxbEamM+l7s9utV3hc+Vz0JZvmCi6Cr+VbLz10QS6AP R1EH54ImPZr9/R5lMdpYxFWnnw/LzlP8zXTOfxeIZToVMvIePAd3viIlZrlGB5kykwZD OvI3Sk5aGb/IxqmJpbBloDQLj9r4xV1yJAOGWdpqmOTV3kM7Yn6zNgUHEtb3oUg6oVju cM0/3fbQAq3I1Y20pgDkJOWKMBpI69Ud4AXsKfH6l+jQ7swq/ukvRy9HLUBfvXOta1Zj +s4q2clMoRsfBlgwDhlMg2TqRxFrLVlTs1/2cZ8EKkkcWi6DC0mNzexC6b/15xx7eTsI ShVA== X-Gm-Message-State: ACrzQf3ovWuq3qLOX5Y26/Tch0kHX7IM6Bb48wNBhDxNwhLENW+eekIm P1NDx+WJZwRMIesHzN3ru88NaA== X-Google-Smtp-Source: AMsMyM7EWTduDlX/nokEv8hbJo/QYah3DLM+PwpM4+fytgs4ZX3Jdgs1NHZ7XvYfBotdt1TEW46dIA== X-Received: by 2002:a05:600c:4e11:b0:3b4:91fd:d0c with SMTP id b17-20020a05600c4e1100b003b491fd0d0cmr4492840wmq.71.1665173853934; Fri, 07 Oct 2022 13:17:33 -0700 (PDT) Received: from 6wind.com ([2a01:e0a:5ac:6460:7be5:dd98:fb1:278]) by smtp.gmail.com with ESMTPSA id l5-20020adfe9c5000000b0022da3977ec5sm2756491wrn.113.2022.10.07.13.17.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Oct 2022 13:17:33 -0700 (PDT) Date: Fri, 7 Oct 2022 22:17:32 +0200 From: Olivier Matz To: Shijith Thotton Cc: dev@dpdk.org, pbhagavatula@marvell.com, Honnappa.Nagarahalli@arm.com, bruce.richardson@intel.com, jerinj@marvell.com, mb@smartsharesystems.com, stephen@networkplumber.org, thomas@monjalon.net, david.marchand@redhat.com, Ruifeng Wang , Jan Viktorin , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Ankur Dwivedi , Anoob Joseph , Tejasree Kondoj , Radha Mohan Chintakuntla , Veerasenareddy Burru , Ashwin Sekhar T K , Jakub Palider , Tomasz Duszynski Subject: Re: [PATCH v3 4/5] drivers: mark Marvell cnxk PMDs work with IOVA as VA Message-ID: References: <20220907134340.3629224-1-sthotton@marvell.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Wed, Sep 21, 2022 at 07:26:20PM +0530, Shijith Thotton wrote: > Enabled the flag pmd_iova_as_va in cnxk driver build files as they work > with IOVA as VA. Updated cn9k and cn10k soc build configurations to > enable the IOVA as VA build by default. > > Signed-off-by: Shijith Thotton > --- > config/arm/meson.build | 8 +++- > drivers/common/cnxk/meson.build | 1 + > drivers/crypto/cnxk/cn10k_ipsec_la_ops.h | 4 +- > drivers/crypto/cnxk/cn9k_ipsec_la_ops.h | 2 +- > drivers/crypto/cnxk/meson.build | 2 + > drivers/dma/cnxk/meson.build | 1 + > drivers/event/cnxk/meson.build | 1 + > drivers/mempool/cnxk/meson.build | 1 + > drivers/net/cnxk/cn10k_tx.h | 55 +++++++----------------- > drivers/net/cnxk/cn9k_tx.h | 55 +++++++----------------- > drivers/net/cnxk/cnxk_ethdev.h | 1 - > drivers/net/cnxk/meson.build | 1 + > drivers/raw/cnxk_bphy/meson.build | 1 + > drivers/raw/cnxk_gpio/meson.build | 1 + > 14 files changed, 50 insertions(+), 84 deletions(-) > > diff --git a/config/arm/meson.build b/config/arm/meson.build > index 9f1636e0d5..4e95e8b388 100644 > --- a/config/arm/meson.build > +++ b/config/arm/meson.build > @@ -294,7 +294,8 @@ soc_cn10k = { > 'flags': [ > ['RTE_MAX_LCORE', 24], > ['RTE_MAX_NUMA_NODES', 1], > - ['RTE_MEMPOOL_ALIGN', 128] > + ['RTE_MEMPOOL_ALIGN', 128], > + ['RTE_IOVA_AS_VA', 1] > ], > 'part_number': '0xd49', > 'extra_march_features': ['crypto'], > @@ -370,7 +371,10 @@ soc_cn9k = { > 'description': 'Marvell OCTEON 9', > 'implementer': '0x43', > 'part_number': '0xb2', > - 'numa': false > + 'numa': false, > + 'flags': [ > + ['RTE_IOVA_AS_VA', 1] > + ] > } > > soc_stingray = { > diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build > index 6f808271d1..d019cfa8d1 100644 > --- a/drivers/common/cnxk/meson.build > +++ b/drivers/common/cnxk/meson.build > @@ -86,3 +86,4 @@ sources += files('cnxk_telemetry_bphy.c', > ) > > deps += ['bus_pci', 'net', 'telemetry'] > +pmd_iova_as_va = true > diff --git a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h > index 66cfe6ca98..16db14344d 100644 > --- a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h > +++ b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h > @@ -85,7 +85,7 @@ process_outb_sa(struct roc_cpt_lf *lf, struct rte_crypto_op *cop, > > /* Prepare CPT instruction */ > inst->w4.u64 = inst_w4_u64 | rte_pktmbuf_pkt_len(m_src); > - dptr = rte_pktmbuf_iova(m_src); > + dptr = rte_pktmbuf_mtod(m_src, uint64_t); > inst->dptr = dptr; > inst->rptr = dptr; > > @@ -102,7 +102,7 @@ process_inb_sa(struct rte_crypto_op *cop, struct cn10k_ipsec_sa *sa, > > /* Prepare CPT instruction */ > inst->w4.u64 = sa->inst.w4 | rte_pktmbuf_pkt_len(m_src); > - dptr = rte_pktmbuf_iova(m_src); > + dptr = rte_pktmbuf_mtod(m_src, uint64_t); > inst->dptr = dptr; > inst->rptr = dptr; > > diff --git a/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h b/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h > index e469596756..8b68e4c728 100644 > --- a/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h > +++ b/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h > @@ -99,7 +99,7 @@ process_inb_sa(struct rte_crypto_op *cop, struct cn9k_ipsec_sa *sa, > > /* Prepare CPT instruction */ > inst->w4.u64 = sa->inst.w4 | rte_pktmbuf_pkt_len(m_src); > - inst->dptr = inst->rptr = rte_pktmbuf_iova(m_src); > + inst->dptr = inst->rptr = rte_pktmbuf_mtod(m_src, uint64_t); > inst->w7.u64 = sa->inst.w7; > } > #endif /* __CN9K_IPSEC_LA_OPS_H__ */ > diff --git a/drivers/crypto/cnxk/meson.build b/drivers/crypto/cnxk/meson.build > index 23a1cc3aac..764e7bb99a 100644 > --- a/drivers/crypto/cnxk/meson.build > +++ b/drivers/crypto/cnxk/meson.build > @@ -31,3 +31,5 @@ if get_option('buildtype').contains('debug') > else > cflags += [ '-ULA_IPSEC_DEBUG' ] > endif > + > +pmd_iova_as_va = true > diff --git a/drivers/dma/cnxk/meson.build b/drivers/dma/cnxk/meson.build > index d4be4ee860..ef0e3db109 100644 > --- a/drivers/dma/cnxk/meson.build > +++ b/drivers/dma/cnxk/meson.build > @@ -3,3 +3,4 @@ > > deps += ['bus_pci', 'common_cnxk', 'dmadev'] > sources = files('cnxk_dmadev.c') > +pmd_iova_as_va = true > diff --git a/drivers/event/cnxk/meson.build b/drivers/event/cnxk/meson.build > index b27bae7b12..650d0d4256 100644 > --- a/drivers/event/cnxk/meson.build > +++ b/drivers/event/cnxk/meson.build > @@ -479,3 +479,4 @@ foreach flag: extra_flags > endforeach > > deps += ['bus_pci', 'common_cnxk', 'net_cnxk', 'crypto_cnxk'] > +pmd_iova_as_va = true > diff --git a/drivers/mempool/cnxk/meson.build b/drivers/mempool/cnxk/meson.build > index d5d1978569..a328176457 100644 > --- a/drivers/mempool/cnxk/meson.build > +++ b/drivers/mempool/cnxk/meson.build > @@ -17,3 +17,4 @@ sources = files( > ) > > deps += ['eal', 'mbuf', 'kvargs', 'bus_pci', 'common_cnxk', 'mempool'] > +pmd_iova_as_va = true > diff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h > index ea13866b20..2ef62da132 100644 > --- a/drivers/net/cnxk/cn10k_tx.h > +++ b/drivers/net/cnxk/cn10k_tx.h > @@ -1775,14 +1775,6 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, uint64_t *ws, > mbuf2 = (uint64_t *)tx_pkts[2]; > mbuf3 = (uint64_t *)tx_pkts[3]; > > - mbuf0 = (uint64_t *)((uintptr_t)mbuf0 + > - offsetof(struct rte_mbuf, buf_iova)); > - mbuf1 = (uint64_t *)((uintptr_t)mbuf1 + > - offsetof(struct rte_mbuf, buf_iova)); > - mbuf2 = (uint64_t *)((uintptr_t)mbuf2 + > - offsetof(struct rte_mbuf, buf_iova)); > - mbuf3 = (uint64_t *)((uintptr_t)mbuf3 + > - offsetof(struct rte_mbuf, buf_iova)); > /* > * Get mbuf's, olflags, iova, pktlen, dataoff > * dataoff_iovaX.D[0] = iova, > @@ -1790,28 +1782,24 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, uint64_t *ws, > * len_olflagsX.D[0] = ol_flags, > * len_olflagsX.D[1](63:32) = mbuf->pkt_len > */ > - dataoff_iova0 = vld1q_u64(mbuf0); > - len_olflags0 = vld1q_u64(mbuf0 + 2); > - dataoff_iova1 = vld1q_u64(mbuf1); > - len_olflags1 = vld1q_u64(mbuf1 + 2); > - dataoff_iova2 = vld1q_u64(mbuf2); > - len_olflags2 = vld1q_u64(mbuf2 + 2); > - dataoff_iova3 = vld1q_u64(mbuf3); > - len_olflags3 = vld1q_u64(mbuf3 + 2); > + dataoff_iova0 = > + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off, vld1q_u64(mbuf0), 1); > + len_olflags0 = vld1q_u64(mbuf0 + 3); > + dataoff_iova1 = > + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off, vld1q_u64(mbuf1), 1); > + len_olflags1 = vld1q_u64(mbuf1 + 3); > + dataoff_iova2 = > + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off, vld1q_u64(mbuf2), 1); > + len_olflags2 = vld1q_u64(mbuf2 + 3); > + dataoff_iova3 = > + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off, vld1q_u64(mbuf3), 1); > + len_olflags3 = vld1q_u64(mbuf3 + 3); > > /* Move mbufs to point pool */ > - mbuf0 = (uint64_t *)((uintptr_t)mbuf0 + > - offsetof(struct rte_mbuf, pool) - > - offsetof(struct rte_mbuf, buf_iova)); > - mbuf1 = (uint64_t *)((uintptr_t)mbuf1 + > - offsetof(struct rte_mbuf, pool) - > - offsetof(struct rte_mbuf, buf_iova)); > - mbuf2 = (uint64_t *)((uintptr_t)mbuf2 + > - offsetof(struct rte_mbuf, pool) - > - offsetof(struct rte_mbuf, buf_iova)); > - mbuf3 = (uint64_t *)((uintptr_t)mbuf3 + > - offsetof(struct rte_mbuf, pool) - > - offsetof(struct rte_mbuf, buf_iova)); > + mbuf0 = (uint64_t *)((uintptr_t)mbuf0 + offsetof(struct rte_mbuf, pool)); > + mbuf1 = (uint64_t *)((uintptr_t)mbuf1 + offsetof(struct rte_mbuf, pool)); > + mbuf2 = (uint64_t *)((uintptr_t)mbuf2 + offsetof(struct rte_mbuf, pool)); > + mbuf3 = (uint64_t *)((uintptr_t)mbuf3 + offsetof(struct rte_mbuf, pool)); > > if (flags & (NIX_TX_OFFLOAD_OL3_OL4_CSUM_F | > NIX_TX_OFFLOAD_L3_L4_CSUM_F)) { > @@ -1861,17 +1849,6 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, uint64_t *ws, > xtmp128 = vzip2q_u64(len_olflags0, len_olflags1); > ytmp128 = vzip2q_u64(len_olflags2, len_olflags3); > > - /* Clear dataoff_iovaX.D[1] bits other than dataoff(15:0) */ > - const uint64x2_t and_mask0 = { > - 0xFFFFFFFFFFFFFFFF, > - 0x000000000000FFFF, > - }; > - > - dataoff_iova0 = vandq_u64(dataoff_iova0, and_mask0); > - dataoff_iova1 = vandq_u64(dataoff_iova1, and_mask0); > - dataoff_iova2 = vandq_u64(dataoff_iova2, and_mask0); > - dataoff_iova3 = vandq_u64(dataoff_iova3, and_mask0); > - > /* > * Pick only 16 bits of pktlen preset at bits 63:32 > * and place them at bits 15:0. > diff --git a/drivers/net/cnxk/cn9k_tx.h b/drivers/net/cnxk/cn9k_tx.h > index 6ce81f5c96..f5d99ccb5a 100644 > --- a/drivers/net/cnxk/cn9k_tx.h > +++ b/drivers/net/cnxk/cn9k_tx.h > @@ -1005,14 +1005,6 @@ cn9k_nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf **tx_pkts, > mbuf2 = (uint64_t *)tx_pkts[2]; > mbuf3 = (uint64_t *)tx_pkts[3]; > > - mbuf0 = (uint64_t *)((uintptr_t)mbuf0 + > - offsetof(struct rte_mbuf, buf_iova)); > - mbuf1 = (uint64_t *)((uintptr_t)mbuf1 + > - offsetof(struct rte_mbuf, buf_iova)); > - mbuf2 = (uint64_t *)((uintptr_t)mbuf2 + > - offsetof(struct rte_mbuf, buf_iova)); > - mbuf3 = (uint64_t *)((uintptr_t)mbuf3 + > - offsetof(struct rte_mbuf, buf_iova)); > /* > * Get mbuf's, olflags, iova, pktlen, dataoff > * dataoff_iovaX.D[0] = iova, > @@ -1020,28 +1012,24 @@ cn9k_nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf **tx_pkts, > * len_olflagsX.D[0] = ol_flags, > * len_olflagsX.D[1](63:32) = mbuf->pkt_len > */ > - dataoff_iova0 = vld1q_u64(mbuf0); > - len_olflags0 = vld1q_u64(mbuf0 + 2); > - dataoff_iova1 = vld1q_u64(mbuf1); > - len_olflags1 = vld1q_u64(mbuf1 + 2); > - dataoff_iova2 = vld1q_u64(mbuf2); > - len_olflags2 = vld1q_u64(mbuf2 + 2); > - dataoff_iova3 = vld1q_u64(mbuf3); > - len_olflags3 = vld1q_u64(mbuf3 + 2); > + dataoff_iova0 = > + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off, vld1q_u64(mbuf0), 1); > + len_olflags0 = vld1q_u64(mbuf0 + 3); > + dataoff_iova1 = > + vsetq_lane_u64(((struct rte_mbuf *)mbuf1)->data_off, vld1q_u64(mbuf1), 1); > + len_olflags1 = vld1q_u64(mbuf1 + 3); > + dataoff_iova2 = > + vsetq_lane_u64(((struct rte_mbuf *)mbuf2)->data_off, vld1q_u64(mbuf2), 1); > + len_olflags2 = vld1q_u64(mbuf2 + 3); > + dataoff_iova3 = > + vsetq_lane_u64(((struct rte_mbuf *)mbuf3)->data_off, vld1q_u64(mbuf3), 1); > + len_olflags3 = vld1q_u64(mbuf3 + 3); > > /* Move mbufs to point pool */ > - mbuf0 = (uint64_t *)((uintptr_t)mbuf0 + > - offsetof(struct rte_mbuf, pool) - > - offsetof(struct rte_mbuf, buf_iova)); > - mbuf1 = (uint64_t *)((uintptr_t)mbuf1 + > - offsetof(struct rte_mbuf, pool) - > - offsetof(struct rte_mbuf, buf_iova)); > - mbuf2 = (uint64_t *)((uintptr_t)mbuf2 + > - offsetof(struct rte_mbuf, pool) - > - offsetof(struct rte_mbuf, buf_iova)); > - mbuf3 = (uint64_t *)((uintptr_t)mbuf3 + > - offsetof(struct rte_mbuf, pool) - > - offsetof(struct rte_mbuf, buf_iova)); > + mbuf0 = (uint64_t *)((uintptr_t)mbuf0 + offsetof(struct rte_mbuf, pool)); > + mbuf1 = (uint64_t *)((uintptr_t)mbuf1 + offsetof(struct rte_mbuf, pool)); > + mbuf2 = (uint64_t *)((uintptr_t)mbuf2 + offsetof(struct rte_mbuf, pool)); > + mbuf3 = (uint64_t *)((uintptr_t)mbuf3 + offsetof(struct rte_mbuf, pool)); > > if (flags & (NIX_TX_OFFLOAD_OL3_OL4_CSUM_F | > NIX_TX_OFFLOAD_L3_L4_CSUM_F)) { > @@ -1091,17 +1079,6 @@ cn9k_nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf **tx_pkts, > xtmp128 = vzip2q_u64(len_olflags0, len_olflags1); > ytmp128 = vzip2q_u64(len_olflags2, len_olflags3); > > - /* Clear dataoff_iovaX.D[1] bits other than dataoff(15:0) */ > - const uint64x2_t and_mask0 = { > - 0xFFFFFFFFFFFFFFFF, > - 0x000000000000FFFF, > - }; > - > - dataoff_iova0 = vandq_u64(dataoff_iova0, and_mask0); > - dataoff_iova1 = vandq_u64(dataoff_iova1, and_mask0); > - dataoff_iova2 = vandq_u64(dataoff_iova2, and_mask0); > - dataoff_iova3 = vandq_u64(dataoff_iova3, and_mask0); > - > /* > * Pick only 16 bits of pktlen preset at bits 63:32 > * and place them at bits 15:0. > diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h > index 4cb7c9e90c..abf1e4215f 100644 > --- a/drivers/net/cnxk/cnxk_ethdev.h > +++ b/drivers/net/cnxk/cnxk_ethdev.h > @@ -690,7 +690,6 @@ cnxk_pktmbuf_detach(struct rte_mbuf *m) > > m->priv_size = priv_size; > m->buf_addr = (char *)m + mbuf_size; > - m->buf_iova = rte_mempool_virt2iova(m) + mbuf_size; > m->buf_len = (uint16_t)buf_len; > rte_pktmbuf_reset_headroom(m); > m->data_len = 0; I missed it during previous review, but shouldn't the accessor be used instead? I mean, if the build is done with PA enabled, and another driver accesses to m->buf_iova, it has to be correct. > diff --git a/drivers/net/cnxk/meson.build b/drivers/net/cnxk/meson.build > index f347e98fce..01489b3a36 100644 > --- a/drivers/net/cnxk/meson.build > +++ b/drivers/net/cnxk/meson.build > @@ -194,3 +194,4 @@ foreach flag: extra_flags > endforeach > > headers = files('rte_pmd_cnxk.h') > +pmd_iova_as_va = true > diff --git a/drivers/raw/cnxk_bphy/meson.build b/drivers/raw/cnxk_bphy/meson.build > index 14147feaf4..781ed63e05 100644 > --- a/drivers/raw/cnxk_bphy/meson.build > +++ b/drivers/raw/cnxk_bphy/meson.build > @@ -10,3 +10,4 @@ sources = files( > 'cnxk_bphy_irq.c', > ) > headers = files('rte_pmd_bphy.h') > +pmd_iova_as_va = true > diff --git a/drivers/raw/cnxk_gpio/meson.build b/drivers/raw/cnxk_gpio/meson.build > index a75a5b9084..f9aed173b6 100644 > --- a/drivers/raw/cnxk_gpio/meson.build > +++ b/drivers/raw/cnxk_gpio/meson.build > @@ -9,3 +9,4 @@ sources = files( > 'cnxk_gpio_selftest.c', > ) > headers = files('rte_pmd_cnxk_gpio.h') > +pmd_iova_as_va = true > -- > 2.25.1 >