From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4BEC5A0A0A; Thu, 20 May 2021 15:09:13 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 09A6840143; Thu, 20 May 2021 15:09:13 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id 1B00B40041 for ; Thu, 20 May 2021 15:09:10 +0200 (CEST) IronPort-SDR: AAJ4tXW+nZnVeeDT7BQ89YVsLhev/gA6j5HZQ2V5uanBGwJnsrZ46hQCDylvxiytI2tmQ91tGe WK5kKOkXcUzA== X-IronPort-AV: E=McAfee;i="6200,9189,9989"; a="188348671" X-IronPort-AV: E=Sophos;i="5.82,313,1613462400"; d="scan'208";a="188348671" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2021 06:09:09 -0700 IronPort-SDR: YqjvcpKRwDbgB1rxiuIoXHutmxpO8kbjUbfnADlNm5fDX1GydtgH/Jm4A8pZgtwK+Y8l6aHj10 5GhTiNFegRSg== X-IronPort-AV: E=Sophos;i="5.82,313,1613462400"; d="scan'208";a="440442239" Received: from bricha3-mobl.ger.corp.intel.com ([10.252.21.191]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 20 May 2021 06:09:07 -0700 Date: Thu, 20 May 2021 14:09:04 +0100 From: Bruce Richardson To: Chengwen Feng Cc: thomas@monjalon.net, ferruh.yigit@intel.com, ruifeng.wang@arm.com, dev@dpdk.org, vladimir.medvedkin@intel.com, viktorin@rehivetech.com, jerinj@marvell.com Message-ID: References: <1621495007-28387-1-git-send-email-fengchengwen@huawei.com> <1621510812-45405-1-git-send-email-fengchengwen@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1621510812-45405-1-git-send-email-fengchengwen@huawei.com> Subject: Re: [dpdk-dev] [PATCH v2] build: fix SVE compile error with gcc8.3 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Thu, May 20, 2021 at 07:40:12PM +0800, Chengwen Feng wrote: > If the target machine has SVE feature (e.g. "-march=armv8.2-a+sve'), > and the compiler is gcc8.3, it will compile error: > In file included from ../dpdk-next-net/lib/eal/common/ > eal_common_options.c:38: > ../dpdk-next-net/lib/eal/arm/include/rte_vect.h:13:10: fatal > error: arm_sve.h: No such file or directory > #include > ^~~~~~~~~~~ > compilation terminated. > > The root cause is that gcc8.3 support SVE (the macro __ARM_FEATURE_SVE > was 1), but it doesn't support SVE ACLE [1]. > > The solution: > a) Detect compiler whether support SVE ACLE, if support then define > CC_SVE_ACLE_SUPPORT macro. > b) Use the CC_SVE_ACLE_SUPPORT macro to include SVE header file. > > [1] ACLE: Arm C Language Extensions, the SVE ACLE header file is > , user should include it when writing ACLE SVE code. > > Fixes: 67b68824a82d ("lpm/arm: support SVE") > > Signed-off-by: Chengwen Feng > --- > v2: > * modify title start with 'build' > One minor comment inline below. /Bruce > --- > config/arm/meson.build | 5 +++++ > lib/eal/arm/include/rte_vect.h | 2 +- > lib/lpm/rte_lpm.h | 2 +- > 3 files changed, 7 insertions(+), 2 deletions(-) > > diff --git a/config/arm/meson.build b/config/arm/meson.build > index e83a56e..bff70e4 100644 > --- a/config/arm/meson.build > +++ b/config/arm/meson.build > @@ -480,6 +480,11 @@ if (cc.get_define('__ARM_NEON', args: machine_args) != '' or > compile_time_cpuflags += ['RTE_CPUFLAG_NEON'] > endif > > +if (cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' and > + cc.check_header('arm_sve.h')) Please double-indent this line. It looks like part of the condition body as-is.