From: Bruce Richardson <bruce.richardson@intel.com>
To: David Marchand <david.marchand@redhat.com>
Cc: <dev@dpdk.org>, <thomas@monjalon.net>,
Long Li <longli@microsoft.com>, "Wei Hu" <weh@microsoft.com>,
Ankur Dwivedi <adwivedi@marvell.com>,
Anoob Joseph <anoobj@marvell.com>,
Tejasree Kondoj <ktejasree@marvell.com>,
Hemant Agrawal <hemant.agrawal@nxp.com>,
Sachin Saxena <sachin.saxena@nxp.com>,
"Vladimir Medvedkin" <vladimir.medvedkin@intel.com>,
Ian Stokes <ian.stokes@intel.com>,
Dariusz Sosnowski <dsosnowski@nvidia.com>,
Viacheslav Ovsiienko <viacheslavo@nvidia.com>,
Bing Zhao <bingz@nvidia.com>, Ori Kam <orika@nvidia.com>,
Suanming Mou <suanmingm@nvidia.com>,
Matan Azrad <matan@nvidia.com>,
Jakub Palider <jpalider@marvell.com>,
Tomasz Duszynski <tduszynski@marvell.com>,
Gagandeep Singh <g.singh@nxp.com>,
Jingjing Wu <jingjing.wu@intel.com>,
Stephen Hemminger <sthemmin@microsoft.com>,
"Akhil Goyal" <gakhil@marvell.com>,
Haiyue Wang <haiyue.wang@intel.com>, Jeff Guo <jia.guo@intel.com>,
Michael Baum <michaelba@nvidia.com>,
Jerin Jacob <jerinj@marvell.com>,
Shreyansh Jain <shreyansh.jain@nxp.com>,
Nipun Gupta <nipun.gupta@amd.com>,
Xiaoyun Li <xiaoyun.li@intel.com>
Subject: Re: [PATCH v2 4/6] drivers: fix exported headers
Date: Fri, 13 Dec 2024 11:14:58 +0000 [thread overview]
Message-ID: <Z1wXMjvOs9FaxIKk@bricha3-mobl1.ger.corp.intel.com> (raw)
In-Reply-To: <20241213105010.1527683-5-david.marchand@redhat.com>
On Fri, Dec 13, 2024 at 11:50:08AM +0100, David Marchand wrote:
> Those headers could not be included individually as they were not
> including their dependencies, or were subject to some build warnings.
>
> Fixes: 831dba47bd36 ("bus/vmbus: add Hyper-V virtual bus support")
> Fixes: 5b2a1a02dcaf ("crypto/cnxk: fix experimental version for PMD API")
> Fixes: e5abbeeeefa5 ("crypto/cnxk: add PMD API for getting CPTR")
> Fixes: 3ca607402c4d ("crypto/cnxk: add PMD API to flush CTX")
> Fixes: 8c3495f5d2dd ("net/dpaa: support loopback API")
> Fixes: 12b435bf8f2f ("net/iavf: support flex desc metadata extraction")
> Fixes: 23f627e0ed28 ("net/mlx5: add flow sync API")
> Fixes: f5177bdc8b76 ("net/mlx5: add GENEVE TLV options parser API")
> Fixes: 7cf197684589 ("raw/cnxk_bphy: support interrupt init and cleanup")
> Fixes: 633dae698070 ("raw/cnxk_gpio: add standard GPIO operations")
> Fixes: 53c71586c789 ("raw/dpaa2_cmdif: support enqueue/dequeue operations")
> Fixes: c39d1e082a4b ("raw/ntb: setup queues")
>
> Signed-off-by: David Marchand <david.marchand@redhat.com>
Generally LGTM, some queries inline below.
/Bruce
> ---
> drivers/bus/vmbus/rte_vmbus_reg.h | 6 ++++++
> drivers/crypto/cnxk/rte_pmd_cnxk_crypto.h | 4 ++++
> drivers/net/dpaa/rte_pmd_dpaa.h | 2 ++
> drivers/net/iavf/rte_pmd_iavf.h | 6 ++++++
> drivers/net/mlx5/rte_pmd_mlx5.h | 3 +++
> drivers/raw/cnxk_bphy/rte_pmd_bphy.h | 16 ++++++++++++++++
> drivers/raw/cnxk_gpio/rte_pmd_cnxk_gpio.h | 3 +++
> drivers/raw/dpaa2_cmdif/rte_pmd_dpaa2_cmdif.h | 2 ++
> drivers/raw/ntb/rte_pmd_ntb.h | 2 ++
> 9 files changed, 44 insertions(+)
>
> diff --git a/drivers/bus/vmbus/rte_vmbus_reg.h b/drivers/bus/vmbus/rte_vmbus_reg.h
> index e3299aa871..95c8eb29b4 100644
> --- a/drivers/bus/vmbus/rte_vmbus_reg.h
> +++ b/drivers/bus/vmbus/rte_vmbus_reg.h
> @@ -6,6 +6,12 @@
> #ifndef _VMBUS_REG_H_
> #define _VMBUS_REG_H_
>
> +#include <stdint.h>
> +
> +#include <rte_common.h>
> +#include <rte_stdatomic.h>
> +#include <rte_uuid.h>
> +
> /*
> * Hyper-V SynIC message format.
> */
> diff --git a/drivers/crypto/cnxk/rte_pmd_cnxk_crypto.h b/drivers/crypto/cnxk/rte_pmd_cnxk_crypto.h
> index 02278605a2..2bb0ff9e95 100644
> --- a/drivers/crypto/cnxk/rte_pmd_cnxk_crypto.h
> +++ b/drivers/crypto/cnxk/rte_pmd_cnxk_crypto.h
> @@ -11,8 +11,12 @@
> #ifndef _PMD_CNXK_CRYPTO_H_
> #define _PMD_CNXK_CRYPTO_H_
>
> +#include <stdbool.h>
> #include <stdint.h>
>
> +#include <rte_compat.h>
> +#include <rte_crypto.h>
> +
> /* Forward declarations */
>
> /**
> diff --git a/drivers/net/dpaa/rte_pmd_dpaa.h b/drivers/net/dpaa/rte_pmd_dpaa.h
> index ec45633ba2..0a57e2097a 100644
> --- a/drivers/net/dpaa/rte_pmd_dpaa.h
> +++ b/drivers/net/dpaa/rte_pmd_dpaa.h
> @@ -5,6 +5,8 @@
> #ifndef _PMD_DPAA_H_
> #define _PMD_DPAA_H_
>
> +#include <stdint.h>
> +
> /**
> * @file rte_pmd_dpaa.h
> *
> diff --git a/drivers/net/iavf/rte_pmd_iavf.h b/drivers/net/iavf/rte_pmd_iavf.h
> index 56d453fc4c..04b86a5dd7 100644
> --- a/drivers/net/iavf/rte_pmd_iavf.h
> +++ b/drivers/net/iavf/rte_pmd_iavf.h
> @@ -15,6 +15,7 @@
> */
>
> #include <stdio.h>
> +
> #include <rte_compat.h>
> #include <rte_mbuf.h>
> #include <rte_mbuf_dyn.h>
> @@ -184,6 +185,7 @@ __rte_experimental
> static inline void
> rte_pmd_ifd_dump_proto_xtr_metadata(struct rte_mbuf *m)
> {
> +#ifdef ALLOW_EXPERIMENTAL_API
> union rte_pmd_ifd_proto_xtr_metadata data;
>
> if (!rte_pmd_ifd_dynf_proto_xtr_metadata_avail())
> @@ -243,6 +245,10 @@ rte_pmd_ifd_dump_proto_xtr_metadata(struct rte_mbuf *m)
> else if (m->ol_flags & RTE_IAVF_PKT_RX_DYNF_PROTO_XTR_IP_OFFSET)
> printf(" - Flexible descriptor's Extraction: ip_offset=%u",
> data.ip_ofs);
> +#else
> + RTE_SET_USED(m);
> + RTE_VERIFY(false);
Is panicking the behaviour we want here? Seems rather severe, no?
> +#endif
> }
>
> #ifdef __cplusplus
> diff --git a/drivers/net/mlx5/rte_pmd_mlx5.h b/drivers/net/mlx5/rte_pmd_mlx5.h
> index fdd2f65888..f2c6aebe0b 100644
> --- a/drivers/net/mlx5/rte_pmd_mlx5.h
> +++ b/drivers/net/mlx5/rte_pmd_mlx5.h
> @@ -5,6 +5,9 @@
> #ifndef RTE_PMD_PRIVATE_MLX5_H_
> #define RTE_PMD_PRIVATE_MLX5_H_
>
> +#include <stdint.h>
> +
> +#include <rte_byteorder.h>
> #include <rte_compat.h>
>
> /**
> diff --git a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h
> index f668e6ea82..c200c935ff 100644
> --- a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h
> +++ b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h
> @@ -391,6 +391,7 @@ rte_pmd_bphy_intr_init(uint16_t dev_id)
> {
> struct cnxk_bphy_irq_msg msg = {
> .type = CNXK_BPHY_IRQ_MSG_TYPE_INIT,
> + .data = NULL,
> };
>
Why is this addition necessary? Is it for C++ compile?
> return __rte_pmd_bphy_enq_deq(dev_id, CNXK_BPHY_DEF_QUEUE, &msg,
> @@ -411,6 +412,7 @@ rte_pmd_bphy_intr_fini(uint16_t dev_id)
> {
> struct cnxk_bphy_irq_msg msg = {
> .type = CNXK_BPHY_IRQ_MSG_TYPE_FINI,
> + .data = NULL,
> };
>
> return __rte_pmd_bphy_enq_deq(dev_id, CNXK_BPHY_DEF_QUEUE, &msg,
> @@ -470,6 +472,9 @@ rte_pmd_bphy_intr_unregister(uint16_t dev_id, int irq_num)
> {
> struct cnxk_bphy_irq_info info = {
> .irq_num = irq_num,
> + .handler = NULL,
> + .data = NULL,
> + .cpu = -1,
> };
> struct cnxk_bphy_irq_msg msg = {
> .type = CNXK_BPHY_IRQ_MSG_TYPE_UNREGISTER,
> @@ -496,6 +501,7 @@ rte_pmd_bphy_intr_mem_get(uint16_t dev_id, struct cnxk_bphy_mem *mem)
> {
> struct cnxk_bphy_irq_msg msg = {
> .type = CNXK_BPHY_IRQ_MSG_TYPE_MEM_GET,
> + .data = NULL,
> };
>
> return __rte_pmd_bphy_enq_deq(dev_id, CNXK_BPHY_DEF_QUEUE, &msg,
> @@ -518,6 +524,7 @@ rte_pmd_bphy_npa_pf_func_get(uint16_t dev_id, uint16_t *pf_func)
> {
> struct cnxk_bphy_irq_msg msg = {
> .type = CNXK_BPHY_MSG_TYPE_NPA_PF_FUNC,
> + .data = NULL,
> };
>
> return __rte_pmd_bphy_enq_deq(dev_id, CNXK_BPHY_DEF_QUEUE, &msg,
> @@ -540,6 +547,7 @@ rte_pmd_bphy_sso_pf_func_get(uint16_t dev_id, uint16_t *pf_func)
> {
> struct cnxk_bphy_irq_msg msg = {
> .type = CNXK_BPHY_MSG_TYPE_SSO_PF_FUNC,
> + .data = NULL,
> };
>
> return __rte_pmd_bphy_enq_deq(dev_id, CNXK_BPHY_DEF_QUEUE, &msg,
> @@ -565,6 +573,7 @@ rte_pmd_bphy_cgx_get_link_info(uint16_t dev_id, uint16_t lmac,
> {
> struct cnxk_bphy_cgx_msg msg = {
> .type = CNXK_BPHY_CGX_MSG_TYPE_GET_LINKINFO,
> + .data = NULL,
> };
>
> return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, info, sizeof(*info));
> @@ -586,6 +595,7 @@ rte_pmd_bphy_cgx_intlbk_disable(uint16_t dev_id, uint16_t lmac)
> {
> struct cnxk_bphy_cgx_msg msg = {
> .type = CNXK_BPHY_CGX_MSG_TYPE_INTLBK_DISABLE,
> + .data = NULL,
> };
>
> return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
> @@ -607,6 +617,7 @@ rte_pmd_bphy_cgx_intlbk_enable(uint16_t dev_id, uint16_t lmac)
> {
> struct cnxk_bphy_cgx_msg msg = {
> .type = CNXK_BPHY_CGX_MSG_TYPE_INTLBK_ENABLE,
> + .data = NULL,
> };
>
> return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
> @@ -628,6 +639,7 @@ rte_pmd_bphy_cgx_ptp_rx_disable(uint16_t dev_id, uint16_t lmac)
> {
> struct cnxk_bphy_cgx_msg msg = {
> .type = CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_DISABLE,
> + .data = NULL,
> };
>
> return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
> @@ -649,6 +661,7 @@ rte_pmd_bphy_cgx_ptp_rx_enable(uint16_t dev_id, uint16_t lmac)
> {
> struct cnxk_bphy_cgx_msg msg = {
> .type = CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_ENABLE,
> + .data = NULL,
> };
>
> return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
> @@ -720,6 +733,7 @@ rte_pmd_bphy_cgx_start_rxtx(uint16_t dev_id, uint16_t lmac)
> {
> struct cnxk_bphy_cgx_msg msg = {
> .type = CNXK_BPHY_CGX_MSG_TYPE_START_RXTX,
> + .data = NULL,
> };
>
> return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
> @@ -741,6 +755,7 @@ rte_pmd_bphy_cgx_stop_rxtx(uint16_t dev_id, uint16_t lmac)
> {
> struct cnxk_bphy_cgx_msg msg = {
> .type = CNXK_BPHY_CGX_MSG_TYPE_STOP_RXTX,
> + .data = NULL,
> };
>
> return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
> @@ -765,6 +780,7 @@ rte_pmd_bphy_cgx_get_supported_fec(uint16_t dev_id, uint16_t lmac,
> {
> struct cnxk_bphy_cgx_msg msg = {
> .type = CNXK_BPHY_CGX_MSG_TYPE_GET_SUPPORTED_FEC,
> + .data = NULL,
> };
>
> return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, fec, sizeof(*fec));
> diff --git a/drivers/raw/cnxk_gpio/rte_pmd_cnxk_gpio.h b/drivers/raw/cnxk_gpio/rte_pmd_cnxk_gpio.h
> index 80a37be9c7..72d138ab1d 100644
> --- a/drivers/raw/cnxk_gpio/rte_pmd_cnxk_gpio.h
> +++ b/drivers/raw/cnxk_gpio/rte_pmd_cnxk_gpio.h
> @@ -261,6 +261,7 @@ rte_pmd_gpio_get_pin_value(uint16_t dev_id, int gpio, int *val)
> {
> struct cnxk_gpio_msg msg = {
> .type = CNXK_GPIO_MSG_TYPE_GET_PIN_VALUE,
> + .data = NULL,
> };
>
> return __rte_pmd_gpio_enq_deq(dev_id, gpio, &msg, val, sizeof(*val));
> @@ -285,6 +286,7 @@ rte_pmd_gpio_get_pin_edge(uint16_t dev_id, int gpio,
> {
> struct cnxk_gpio_msg msg = {
> .type = CNXK_GPIO_MSG_TYPE_GET_PIN_EDGE,
> + .data = NULL,
> };
>
> return __rte_pmd_gpio_enq_deq(dev_id, gpio, &msg, edge, sizeof(*edge));
> @@ -308,6 +310,7 @@ rte_pmd_gpio_get_pin_dir(uint16_t dev_id, int gpio, enum cnxk_gpio_pin_dir *dir)
> {
> struct cnxk_gpio_msg msg = {
> .type = CNXK_GPIO_MSG_TYPE_GET_PIN_DIR,
> + .data = NULL,
> };
>
> return __rte_pmd_gpio_enq_deq(dev_id, gpio, &msg, dir, sizeof(*dir));
> diff --git a/drivers/raw/dpaa2_cmdif/rte_pmd_dpaa2_cmdif.h b/drivers/raw/dpaa2_cmdif/rte_pmd_dpaa2_cmdif.h
> index 483b66eaae..7731fc6363 100644
> --- a/drivers/raw/dpaa2_cmdif/rte_pmd_dpaa2_cmdif.h
> +++ b/drivers/raw/dpaa2_cmdif/rte_pmd_dpaa2_cmdif.h
> @@ -12,6 +12,8 @@
> *
> */
>
> +#include <stdint.h>
> +
> #ifdef __cplusplus
> extern "C" {
> #endif
> diff --git a/drivers/raw/ntb/rte_pmd_ntb.h b/drivers/raw/ntb/rte_pmd_ntb.h
> index 6591ce7931..76da3be026 100644
> --- a/drivers/raw/ntb/rte_pmd_ntb.h
> +++ b/drivers/raw/ntb/rte_pmd_ntb.h
> @@ -5,6 +5,8 @@
> #ifndef _RTE_PMD_NTB_H_
> #define _RTE_PMD_NTB_H_
>
> +#include <stdint.h>
> +
> /* App needs to set/get these attrs */
> #define NTB_QUEUE_SZ_NAME "queue_size"
> #define NTB_QUEUE_NUM_NAME "queue_num"
> --
> 2.47.0
>
next prev parent reply other threads:[~2024-12-13 11:15 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-27 11:26 [RFC 0/6] Add a stricter headers check David Marchand
2024-11-27 11:26 ` [RFC 1/6] baseband/acc: fix exported header David Marchand
2024-11-27 11:26 ` [RFC 2/6] drivers: drop export of driver headers David Marchand
2024-11-27 11:26 ` [RFC 3/6] eventdev: do not include driver header in DMA adapter David Marchand
2024-11-27 13:49 ` [EXTERNAL] " Amit Prakash Shukla
2024-11-27 11:26 ` [RFC 4/6] drivers: fix exported headers David Marchand
2024-11-27 11:26 ` [RFC 5/6] build: install indirect headers to a dedicated directory David Marchand
2024-11-27 11:42 ` Bruce Richardson
2024-12-10 13:36 ` David Marchand
2024-11-27 11:26 ` [RFC 6/6] buildtools: externally check exported headers David Marchand
2024-12-13 10:50 ` [PATCH v2 0/6] Add a stricter headers check David Marchand
2024-12-13 10:50 ` [PATCH v2 1/6] baseband/acc: fix exported header David Marchand
2024-12-13 11:01 ` Bruce Richardson
2024-12-13 10:50 ` [PATCH v2 2/6] drivers: drop export of driver headers David Marchand
2024-12-13 11:03 ` Bruce Richardson
2024-12-16 9:13 ` Andrew Rybchenko
2024-12-13 10:50 ` [PATCH v2 3/6] eventdev: do not include driver header in DMA adapter David Marchand
2024-12-13 11:04 ` Bruce Richardson
2024-12-13 10:50 ` [PATCH v2 4/6] drivers: fix exported headers David Marchand
2024-12-13 11:14 ` Bruce Richardson [this message]
2024-12-13 13:46 ` David Marchand
2024-12-16 8:15 ` David Marchand
2024-12-13 17:10 ` Stephen Hemminger
2024-12-13 10:50 ` [PATCH v2 5/6] build: install indirect headers to a dedicated directory David Marchand
2024-12-13 10:50 ` [PATCH v2 6/6] buildtools: externally check exported headers David Marchand
2024-12-13 11:27 ` [PATCH v2 0/6] Add a stricter headers check Bruce Richardson
2024-12-13 13:38 ` David Marchand
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=Z1wXMjvOs9FaxIKk@bricha3-mobl1.ger.corp.intel.com \
--to=bruce.richardson@intel.com \
--cc=adwivedi@marvell.com \
--cc=anoobj@marvell.com \
--cc=bingz@nvidia.com \
--cc=david.marchand@redhat.com \
--cc=dev@dpdk.org \
--cc=dsosnowski@nvidia.com \
--cc=g.singh@nxp.com \
--cc=gakhil@marvell.com \
--cc=haiyue.wang@intel.com \
--cc=hemant.agrawal@nxp.com \
--cc=ian.stokes@intel.com \
--cc=jerinj@marvell.com \
--cc=jia.guo@intel.com \
--cc=jingjing.wu@intel.com \
--cc=jpalider@marvell.com \
--cc=ktejasree@marvell.com \
--cc=longli@microsoft.com \
--cc=matan@nvidia.com \
--cc=michaelba@nvidia.com \
--cc=nipun.gupta@amd.com \
--cc=orika@nvidia.com \
--cc=sachin.saxena@nxp.com \
--cc=shreyansh.jain@nxp.com \
--cc=sthemmin@microsoft.com \
--cc=suanmingm@nvidia.com \
--cc=tduszynski@marvell.com \
--cc=thomas@monjalon.net \
--cc=viacheslavo@nvidia.com \
--cc=vladimir.medvedkin@intel.com \
--cc=weh@microsoft.com \
--cc=xiaoyun.li@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).