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Tue, 4 Apr 2023 16:23:14 +0000 Date: Tue, 4 Apr 2023 17:23:07 +0100 From: Bruce Richardson To: Tyler Retzlaff CC: , , , Subject: Re: [PATCH 3/9] eal: use barrier intrinsics when compiling with msvc Message-ID: References: <1680558751-17931-1-git-send-email-roretzla@linux.microsoft.com> <1680558751-17931-4-git-send-email-roretzla@linux.microsoft.com> <20230404154301.GB23247@linuxonhyperv3.guj3yctzbm1etfxqx2vob5hsef.xx.internal.cloudapp.net> Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20230404154301.GB23247@linuxonhyperv3.guj3yctzbm1etfxqx2vob5hsef.xx.internal.cloudapp.net> X-ClientProxiedBy: LNXP265CA0025.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:5c::13) To DS0PR11MB7309.namprd11.prod.outlook.com (2603:10b6:8:13e::17) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS0PR11MB7309:EE_|MN2PR11MB4709:EE_ X-MS-Office365-Filtering-Correlation-Id: f946bf1e-7d09-4a74-dad5-08db3528e3f8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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\ > > > } while(0) > > > +#else > > > +#define rte_compiler_barrier() _ReadWriteBarrier() > > > > Does this actually add a full memory barrier? If so, that's really not what we > > want, and will slow things down. > > for background MSVC when targeting amd64/arm64 do not permit inline > assmebly. The main reason is inline assembly can't be optimized. > instead it provides intrinsics (that are known) that can participate in > optimization. > > specific answer to your question. yes, it implements only a "compiler > barrier" not a full memory barrier preventing processor reordering. > > https://learn.microsoft.com/en-us/cpp/intrinsics/readwritebarrier?view=msvc-170 > "Limits the compiler optimizations that can reorder memory accesses > across the point of the call." > > note: ignore the caution on the documentation it only applies to C++ Thanks for clarifying. In that case, I think we need a different macro/barrier for the rte_smp_mp() case. When mixing reads and writes on x86, there are cases where we actually do need a full memory barrier/mfence, rather than just a compiler barrier. /Bruce