From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 47F3E45501; Wed, 26 Jun 2024 14:03:46 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8E6374345C; Wed, 26 Jun 2024 13:56:38 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by mails.dpdk.org (Postfix) with ESMTP id 7204442E95 for ; Wed, 26 Jun 2024 13:45:05 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1719402305; x=1750938305; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ClWKrCrHApafxrnsOq7kdl/HF/hzrMRwNHNZ1bVE+h8=; b=mov8GF6pMP333pi9LfSGW3sQA7oG23y4c3X8EOjeISQbNBpP7FMLX3gH 2Z6PgR52KA8JDhMHCUvKfnwnE2grcsI7hIDX1ynzVbYFBZ3QuvN49ik0a amhUz4TfEioojp/2ynDPdsSoW8F6fCzF1ETbQzoW5jdN+FD/NLa+INEzz UAO81eVn1QEl3Kf0kPrtnYDGls5foaOZbKmYdJ0xurot2bp5lgATbbF15 L24p0hd//RaRUrFkBuIja+hx+26H/TmfsuGcm3toaK1RWbizLgfhWyaZs dKlN+dYUkgOia+n6tsQVNg5CXAhVPpzPdRfZWB7lbZg2rCFmjFLx2y3iG g==; X-CSE-ConnectionGUID: RtlX02FrRuup6UD0e2g4Kw== X-CSE-MsgGUID: k/1zg6iQQiicclNg5UDI+w== X-IronPort-AV: E=McAfee;i="6700,10204,11114"; a="38979503" X-IronPort-AV: E=Sophos;i="6.08,266,1712646000"; d="scan'208";a="38979503" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jun 2024 04:45:05 -0700 X-CSE-ConnectionGUID: ZsWqQgXuQ5CVxOFKeG8+6g== X-CSE-MsgGUID: VLEcTBDeQ8Cl2hONasgBHw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,266,1712646000"; d="scan'208";a="43874195" Received: from unknown (HELO silpixa00401119.ir.intel.com) ([10.55.129.167]) by orviesa010.jf.intel.com with ESMTP; 26 Jun 2024 04:45:03 -0700 From: Anatoly Burakov To: dev@dpdk.org Cc: Lukasz Plachno , ian.stokes@intel.com, bruce.richardson@intel.com Subject: [PATCH v4 074/103] net/ice/base: replace array initialization with macros Date: Wed, 26 Jun 2024 12:42:02 +0100 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Lukasz Plachno Certain compilers do not allow array initialization with indexes, so the best way to avoid the issue when compiling for these platforms is to use a macro. Signed-off-by: Lukasz Plachno Signed-off-by: Anatoly Burakov --- drivers/net/ice/base/ice_common.c | 217 ++++++++++++++++-------------- drivers/net/ice/base/ice_common.h | 8 ++ 2 files changed, 121 insertions(+), 104 deletions(-) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index ceb54b085c..9560187a85 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -11,118 +11,121 @@ #define ICE_PF_RESET_WAIT_COUNT 300 -/** - * dump_phy_type - helper function that prints PHY type strings - * @hw: pointer to the HW structure - * @phy: 64 bit PHY type to decipher - * @i: bit index within phy - * @phy_string: string corresponding to bit i in phy - * @prefix: prefix string to differentiate multiple dumps - */ -static void -dump_phy_type(struct ice_hw *hw, u64 phy, u8 i, const char *phy_string, - const char *prefix) -{ - if (phy & BIT_ULL(i)) - ice_debug(hw, ICE_DBG_PHY, "%s: bit(%d): %s\n", prefix, i, - phy_string); -} +static const char * const ice_link_mode_str_low[] = { + ice_arr_elem_idx(0, "100BASE_TX"), + ice_arr_elem_idx(1, "100M_SGMII"), + ice_arr_elem_idx(2, "1000BASE_T"), + ice_arr_elem_idx(3, "1000BASE_SX"), + ice_arr_elem_idx(4, "1000BASE_LX"), + ice_arr_elem_idx(5, "1000BASE_KX"), + ice_arr_elem_idx(6, "1G_SGMII"), + ice_arr_elem_idx(7, "2500BASE_T"), + ice_arr_elem_idx(8, "2500BASE_X"), + ice_arr_elem_idx(9, "2500BASE_KX"), + ice_arr_elem_idx(10, "5GBASE_T"), + ice_arr_elem_idx(11, "5GBASE_KR"), + ice_arr_elem_idx(12, "10GBASE_T"), + ice_arr_elem_idx(13, "10G_SFI_DA"), + ice_arr_elem_idx(14, "10GBASE_SR"), + ice_arr_elem_idx(15, "10GBASE_LR"), + ice_arr_elem_idx(16, "10GBASE_KR_CR1"), + ice_arr_elem_idx(17, "10G_SFI_AOC_ACC"), + ice_arr_elem_idx(18, "10G_SFI_C2C"), + ice_arr_elem_idx(19, "25GBASE_T"), + ice_arr_elem_idx(20, "25GBASE_CR"), + ice_arr_elem_idx(21, "25GBASE_CR_S"), + ice_arr_elem_idx(22, "25GBASE_CR1"), + ice_arr_elem_idx(23, "25GBASE_SR"), + ice_arr_elem_idx(24, "25GBASE_LR"), + ice_arr_elem_idx(25, "25GBASE_KR"), + ice_arr_elem_idx(26, "25GBASE_KR_S"), + ice_arr_elem_idx(27, "25GBASE_KR1"), + ice_arr_elem_idx(28, "25G_AUI_AOC_ACC"), + ice_arr_elem_idx(29, "25G_AUI_C2C"), + ice_arr_elem_idx(30, "40GBASE_CR4"), + ice_arr_elem_idx(31, "40GBASE_SR4"), + ice_arr_elem_idx(32, "40GBASE_LR4"), + ice_arr_elem_idx(33, "40GBASE_KR4"), + ice_arr_elem_idx(34, "40G_XLAUI_AOC_ACC"), + ice_arr_elem_idx(35, "40G_XLAUI"), + ice_arr_elem_idx(36, "50GBASE_CR2"), + ice_arr_elem_idx(37, "50GBASE_SR2"), + ice_arr_elem_idx(38, "50GBASE_LR2"), + ice_arr_elem_idx(39, "50GBASE_KR2"), + ice_arr_elem_idx(40, "50G_LAUI2_AOC_ACC"), + ice_arr_elem_idx(41, "50G_LAUI2"), + ice_arr_elem_idx(42, "50G_AUI2_AOC_ACC"), + ice_arr_elem_idx(43, "50G_AUI2"), + ice_arr_elem_idx(44, "50GBASE_CP"), + ice_arr_elem_idx(45, "50GBASE_SR"), + ice_arr_elem_idx(46, "50GBASE_FR"), + ice_arr_elem_idx(47, "50GBASE_LR"), + ice_arr_elem_idx(48, "50GBASE_KR_PAM4"), + ice_arr_elem_idx(49, "50G_AUI1_AOC_ACC"), + ice_arr_elem_idx(50, "50G_AUI1"), + ice_arr_elem_idx(51, "100GBASE_CR4"), + ice_arr_elem_idx(52, "100GBASE_SR4"), + ice_arr_elem_idx(53, "100GBASE_LR4"), + ice_arr_elem_idx(54, "100GBASE_KR4"), + ice_arr_elem_idx(55, "100G_CAUI4_AOC_ACC"), + ice_arr_elem_idx(56, "100G_CAUI4"), + ice_arr_elem_idx(57, "100G_AUI4_AOC_ACC"), + ice_arr_elem_idx(58, "100G_AUI4"), + ice_arr_elem_idx(59, "100GBASE_CR_PAM4"), + ice_arr_elem_idx(60, "100GBASE_KR_PAM4"), + ice_arr_elem_idx(61, "100GBASE_CP2"), + ice_arr_elem_idx(62, "100GBASE_SR2"), + ice_arr_elem_idx(63, "100GBASE_DR"), +}; + +static const char * const ice_link_mode_str_high[] = { + ice_arr_elem_idx(0, "100GBASE_KR2_PAM4"), + ice_arr_elem_idx(1, "100G_CAUI2_AOC_ACC"), + ice_arr_elem_idx(2, "100G_CAUI2"), + ice_arr_elem_idx(3, "100G_AUI2_AOC_ACC"), + ice_arr_elem_idx(4, "100G_AUI2"), + ice_arr_elem_idx(5, "200G_CR4_PAM4"), + ice_arr_elem_idx(6, "200G_SR4"), + ice_arr_elem_idx(7, "200G_FR4"), + ice_arr_elem_idx(8, "200G_LR4"), + ice_arr_elem_idx(9, "200G_DR4"), + ice_arr_elem_idx(10, "200G_KR4_PAM4"), + ice_arr_elem_idx(11, "200G_AUI4_AOC_ACC"), + ice_arr_elem_idx(12, "200G_AUI4"), + ice_arr_elem_idx(13, "200G_AUI8_AOC_ACC"), + ice_arr_elem_idx(14, "200G_AUI8"), + ice_arr_elem_idx(15, "400GBASE_FR8"), +}; /** - * ice_dump_phy_type_low - helper function to dump phy_type_low + * ice_dump_phy_type - helper function to dump phy_type * @hw: pointer to the HW structure * @low: 64 bit value for phy_type_low + * @high: 64 bit value for phy_type_high * @prefix: prefix string to differentiate multiple dumps */ static void -ice_dump_phy_type_low(struct ice_hw *hw, u64 low, const char *prefix) +ice_dump_phy_type(struct ice_hw *hw, u64 low, u64 high, const char *prefix) { + u32 i; + ice_debug(hw, ICE_DBG_PHY, "%s: phy_type_low: 0x%016llx\n", prefix, (unsigned long long)low); - dump_phy_type(hw, low, 0, "100BASE_TX", prefix); - dump_phy_type(hw, low, 1, "100M_SGMII", prefix); - dump_phy_type(hw, low, 2, "1000BASE_T", prefix); - dump_phy_type(hw, low, 3, "1000BASE_SX", prefix); - dump_phy_type(hw, low, 4, "1000BASE_LX", prefix); - dump_phy_type(hw, low, 5, "1000BASE_KX", prefix); - dump_phy_type(hw, low, 6, "1G_SGMII", prefix); - dump_phy_type(hw, low, 7, "2500BASE_T", prefix); - dump_phy_type(hw, low, 8, "2500BASE_X", prefix); - dump_phy_type(hw, low, 9, "2500BASE_KX", prefix); - dump_phy_type(hw, low, 10, "5GBASE_T", prefix); - dump_phy_type(hw, low, 11, "5GBASE_KR", prefix); - dump_phy_type(hw, low, 12, "10GBASE_T", prefix); - dump_phy_type(hw, low, 13, "10G_SFI_DA", prefix); - dump_phy_type(hw, low, 14, "10GBASE_SR", prefix); - dump_phy_type(hw, low, 15, "10GBASE_LR", prefix); - dump_phy_type(hw, low, 16, "10GBASE_KR_CR1", prefix); - dump_phy_type(hw, low, 17, "10G_SFI_AOC_ACC", prefix); - dump_phy_type(hw, low, 18, "10G_SFI_C2C", prefix); - dump_phy_type(hw, low, 19, "25GBASE_T", prefix); - dump_phy_type(hw, low, 20, "25GBASE_CR", prefix); - dump_phy_type(hw, low, 21, "25GBASE_CR_S", prefix); - dump_phy_type(hw, low, 22, "25GBASE_CR1", prefix); - dump_phy_type(hw, low, 23, "25GBASE_SR", prefix); - dump_phy_type(hw, low, 24, "25GBASE_LR", prefix); - dump_phy_type(hw, low, 25, "25GBASE_KR", prefix); - dump_phy_type(hw, low, 26, "25GBASE_KR_S", prefix); - dump_phy_type(hw, low, 27, "25GBASE_KR1", prefix); - dump_phy_type(hw, low, 28, "25G_AUI_AOC_ACC", prefix); - dump_phy_type(hw, low, 29, "25G_AUI_C2C", prefix); - dump_phy_type(hw, low, 30, "40GBASE_CR4", prefix); - dump_phy_type(hw, low, 31, "40GBASE_SR4", prefix); - dump_phy_type(hw, low, 32, "40GBASE_LR4", prefix); - dump_phy_type(hw, low, 33, "40GBASE_KR4", prefix); - dump_phy_type(hw, low, 34, "40G_XLAUI_AOC_ACC", prefix); - dump_phy_type(hw, low, 35, "40G_XLAUI", prefix); - dump_phy_type(hw, low, 36, "50GBASE_CR2", prefix); - dump_phy_type(hw, low, 37, "50GBASE_SR2", prefix); - dump_phy_type(hw, low, 38, "50GBASE_LR2", prefix); - dump_phy_type(hw, low, 39, "50GBASE_KR2", prefix); - dump_phy_type(hw, low, 40, "50G_LAUI2_AOC_ACC", prefix); - dump_phy_type(hw, low, 41, "50G_LAUI2", prefix); - dump_phy_type(hw, low, 42, "50G_AUI2_AOC_ACC", prefix); - dump_phy_type(hw, low, 43, "50G_AUI2", prefix); - dump_phy_type(hw, low, 44, "50GBASE_CP", prefix); - dump_phy_type(hw, low, 45, "50GBASE_SR", prefix); - dump_phy_type(hw, low, 46, "50GBASE_FR", prefix); - dump_phy_type(hw, low, 47, "50GBASE_LR", prefix); - dump_phy_type(hw, low, 48, "50GBASE_KR_PAM4", prefix); - dump_phy_type(hw, low, 49, "50G_AUI1_AOC_ACC", prefix); - dump_phy_type(hw, low, 50, "50G_AUI1", prefix); - dump_phy_type(hw, low, 51, "100GBASE_CR4", prefix); - dump_phy_type(hw, low, 52, "100GBASE_SR4", prefix); - dump_phy_type(hw, low, 53, "100GBASE_LR4", prefix); - dump_phy_type(hw, low, 54, "100GBASE_KR4", prefix); - dump_phy_type(hw, low, 55, "100G_CAUI4_AOC_ACC", prefix); - dump_phy_type(hw, low, 56, "100G_CAUI4", prefix); - dump_phy_type(hw, low, 57, "100G_AUI4_AOC_ACC", prefix); - dump_phy_type(hw, low, 58, "100G_AUI4", prefix); - dump_phy_type(hw, low, 59, "100GBASE_CR_PAM4", prefix); - dump_phy_type(hw, low, 60, "100GBASE_KR_PAM4", prefix); - dump_phy_type(hw, low, 61, "100GBASE_CP2", prefix); - dump_phy_type(hw, low, 62, "100GBASE_SR2", prefix); - dump_phy_type(hw, low, 63, "100GBASE_DR", prefix); -} + for (i = 0; i < ARRAY_SIZE(ice_link_mode_str_low); i++) { + if (low & BIT_ULL(i)) + ice_debug(hw, ICE_DBG_PHY, "%s: bit(%d): %s\n", + prefix, i, ice_link_mode_str_low[i]); + } -/** - * ice_dump_phy_type_high - helper function to dump phy_type_high - * @hw: pointer to the HW structure - * @high: 64 bit value for phy_type_high - * @prefix: prefix string to differentiate multiple dumps - */ -static void -ice_dump_phy_type_high(struct ice_hw *hw, u64 high, const char *prefix) -{ ice_debug(hw, ICE_DBG_PHY, "%s: phy_type_high: 0x%016llx\n", prefix, (unsigned long long)high); - dump_phy_type(hw, high, 0, "100GBASE_KR2_PAM4", prefix); - dump_phy_type(hw, high, 1, "100G_CAUI2_AOC_ACC", prefix); - dump_phy_type(hw, high, 2, "100G_CAUI2", prefix); - dump_phy_type(hw, high, 3, "100G_AUI2_AOC_ACC", prefix); - dump_phy_type(hw, high, 4, "100G_AUI2", prefix); + for (i = 0; i < ARRAY_SIZE(ice_link_mode_str_high); i++) { + if (high & BIT_ULL(i)) + ice_debug(hw, ICE_DBG_PHY, "%s: bit(%d): %s\n", + prefix, i, ice_link_mode_str_high[i]); + } } /** @@ -515,19 +518,25 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode, ice_debug(hw, ICE_DBG_LINK, "get phy caps dump\n"); - if (report_mode == ICE_AQC_REPORT_TOPO_CAP_MEDIA) + switch (report_mode) { + case ICE_AQC_REPORT_TOPO_CAP_MEDIA: prefix = "phy_caps_media"; - else if (report_mode == ICE_AQC_REPORT_TOPO_CAP_NO_MEDIA) + break; + case ICE_AQC_REPORT_TOPO_CAP_NO_MEDIA: prefix = "phy_caps_no_media"; - else if (report_mode == ICE_AQC_REPORT_ACTIVE_CFG) + break; + case ICE_AQC_REPORT_ACTIVE_CFG: prefix = "phy_caps_active"; - else if (report_mode == ICE_AQC_REPORT_DFLT_CFG) + break; + case ICE_AQC_REPORT_DFLT_CFG: prefix = "phy_caps_default"; - else + break; + default: prefix = "phy_caps_invalid"; + } - ice_dump_phy_type_low(hw, LE64_TO_CPU(pcaps->phy_type_low), prefix); - ice_dump_phy_type_high(hw, LE64_TO_CPU(pcaps->phy_type_high), prefix); + ice_dump_phy_type(hw, LE64_TO_CPU(pcaps->phy_type_low), + LE64_TO_CPU(pcaps->phy_type_high), prefix); ice_debug(hw, ICE_DBG_LINK, "%s: report_mode = 0x%x\n", prefix, report_mode); diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h index 93d4c48fa5..df0a247263 100644 --- a/drivers/net/ice/base/ice_common.h +++ b/drivers/net/ice/base/ice_common.h @@ -84,6 +84,14 @@ ice_aq_get_internal_data(struct ice_hw *hw, u16 cluster_id, u16 table_id, */ #define ICE_ALIGN(ptr, align) (((ptr) + ((align) - 1)) & ~((align) - 1)) +/* Define a macro for initializing array using indexes. Due to limitation + * of MSVC compiler it is necessary to allow other projects to replace + * that macro and strip the index from initialization. + * Linux driver is using coccinelle to maintain source sync with upstream + * and is not requiring this macro. + */ +#define ice_arr_elem_idx(idx, val) [(idx)] = (val) + int ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx, u32 rxq_index); -- 2.43.0