From: Raslan Darawsheh <rasland@nvidia.com>
To: Maayan Kashani <mkashani@nvidia.com>, dev@dpdk.org
Cc: Dariusz Sosnowski <dsosnowski@nvidia.com>,
Viacheslav Ovsiienko <viacheslavo@nvidia.com>,
Bing Zhao <bingz@nvidia.com>, Ori Kam <orika@nvidia.com>,
Suanming Mou <suanmingm@nvidia.com>,
Matan Azrad <matan@nvidia.com>
Subject: Re: [PATCH 1/2] common/mlx5: read SWS capability bits
Date: Sun, 16 Nov 2025 17:27:13 +0200 [thread overview]
Message-ID: <a0dad037-5377-42a1-b37a-0014e78cd24e@nvidia.com> (raw)
In-Reply-To: <20251106083817.166689-1-mkashani@nvidia.com>
Hi,
On 06/11/2025 10:38 AM, Maayan Kashani wrote:
> SWS will be disabled in future HW generation.
> Checking SWS capability bits and returning relevant error.
> if user configuration is not supported,
> will be added in the follow up commit.
>
> Signed-off-by: Maayan Kashani <mkashani@nvidia.com>
> Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
Series applied to next-net-mlx,
Kindest regards
Raslan Darawsheh
next prev parent reply other threads:[~2025-11-16 15:27 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-06 8:38 Maayan Kashani
2025-11-06 8:38 ` [PATCH 2/2] net/mlx5: update flow devarg handling for future HW Maayan Kashani
2025-11-16 15:27 ` Raslan Darawsheh [this message]
-- strict thread matches above, loose matches on Subject: below --
2025-04-27 11:19 [PATCH 1/2] common/mlx5: read SWS capability bits Maayan Kashani
2025-05-13 6:23 ` Raslan Darawsheh
2025-05-27 8:58 ` Maayan Kashani
2025-05-27 9:01 ` Raslan Darawsheh
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