From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id CF615A052A; Fri, 10 Jul 2020 16:46:58 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 65E7D1DE8E; Fri, 10 Jul 2020 16:46:52 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id D1FB01DAFB for ; Fri, 10 Jul 2020 16:46:48 +0200 (CEST) IronPort-SDR: NreuC95OuveRSJgGSGtP29OqpG+VDqbTFB0B3cZGL+If0DF3m1ZHPBs9CBeLtZyFav4gBFU9LK yELvBa82PusA== X-IronPort-AV: E=McAfee;i="6000,8403,9678"; a="166299000" X-IronPort-AV: E=Sophos;i="5.75,336,1589266800"; d="scan'208";a="166299000" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jul 2020 07:46:47 -0700 IronPort-SDR: Mzf/x/TB7D7O0HypDOTfPhpOfjGSCFGq/JiSmVDzPf2xNy3tI6hFbrACQ6SUjLu6t+XzBB3DLG ouHRtDQRrmMQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,336,1589266800"; d="scan'208";a="358856596" Received: from silpixa00400322.ir.intel.com ([10.237.214.86]) by orsmga001.jf.intel.com with ESMTP; 10 Jul 2020 07:46:46 -0700 From: Vladimir Medvedkin To: dev@dpdk.org Cc: konstantin.ananyev@intel.com, bruce.richardson@intel.com Date: Fri, 10 Jul 2020 15:46:36 +0100 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Subject: [dpdk-dev] [PATCH v5 1/8] eal/x86: introduce AVX 512-bit type X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" New data type to manipulate 512 bit AVX values. Signed-off-by: Vladimir Medvedkin --- lib/librte_eal/x86/include/rte_vect.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/lib/librte_eal/x86/include/rte_vect.h b/lib/librte_eal/x86/include/rte_vect.h index df5a60762..1b2af7138 100644 --- a/lib/librte_eal/x86/include/rte_vect.h +++ b/lib/librte_eal/x86/include/rte_vect.h @@ -13,6 +13,7 @@ #include #include +#include #include "generic/rte_vect.h" #if (defined(__ICC) || \ @@ -90,6 +91,24 @@ __extension__ ({ \ }) #endif /* (defined(__ICC) && __ICC < 1210) */ +#ifdef __AVX512F__ + +#define RTE_X86_ZMM_SIZE (sizeof(__m512i)) +#define RTE_X86_ZMM_MASK (ZMM_SIZE - 1) + +typedef union __rte_x86_zmm { + __m512i z; + ymm_t y[RTE_X86_ZMM_SIZE / sizeof(ymm_t)]; + xmm_t x[RTE_X86_ZMM_SIZE / sizeof(xmm_t)]; + uint8_t u8[RTE_X86_ZMM_SIZE / sizeof(uint8_t)]; + uint16_t u16[RTE_X86_ZMM_SIZE / sizeof(uint16_t)]; + uint32_t u32[RTE_X86_ZMM_SIZE / sizeof(uint32_t)]; + uint64_t u64[RTE_X86_ZMM_SIZE / sizeof(uint64_t)]; + double pd[RTE_X86_ZMM_SIZE / sizeof(double)]; +} __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm_t; + +#endif /* __AVX512F__ */ + #ifdef __cplusplus } #endif -- 2.17.1