From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3D691A0548; Fri, 24 Sep 2021 13:09:08 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id BAD004126F; Fri, 24 Sep 2021 13:09:07 +0200 (CEST) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by mails.dpdk.org (Postfix) with ESMTP id BA96C4122D; Fri, 24 Sep 2021 13:09:05 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10116"; a="220850952" X-IronPort-AV: E=Sophos;i="5.85,319,1624345200"; d="scan'208";a="220850952" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Sep 2021 04:09:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.85,319,1624345200"; d="scan'208";a="551541564" Received: from irsmsx603.ger.corp.intel.com ([163.33.146.9]) by FMSMGA003.fm.intel.com with ESMTP; 24 Sep 2021 04:09:01 -0700 Received: from shsmsx601.ccr.corp.intel.com (10.109.6.141) by irsmsx603.ger.corp.intel.com (163.33.146.9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2242.12; Fri, 24 Sep 2021 12:08:59 +0100 Received: from shsmsx601.ccr.corp.intel.com ([10.109.6.141]) by SHSMSX601.ccr.corp.intel.com ([10.109.6.141]) with mapi id 15.01.2242.012; Fri, 24 Sep 2021 19:08:57 +0800 From: "Zhang, Qi Z" To: Ruifeng Wang , "dev@dpdk.org" CC: "Xing, Beilei" , "Richardson, Bruce" , "jerinj@marvell.com" , "hemant.agrawal@nxp.com" , "drc@linux.vnet.ibm.com" , "honnappa.nagarahalli@arm.com" , "stable@dpdk.org" , "nd@arm.com" Thread-Topic: [PATCH v2 0/2] i40e Rx descriptor loads ordering Thread-Index: AQHXqgyIwgkhFaeoMUqtxqvbJsRBWquzFPgg Date: Fri, 24 Sep 2021 11:08:57 +0000 Message-ID: References: <20210906033201.1789796-1-ruifeng.wang@arm.com> <20210915083339.2424369-1-ruifeng.wang@arm.com> In-Reply-To: <20210915083339.2424369-1-ruifeng.wang@arm.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-reaction: no-action dlp-version: 11.6.200.16 dlp-product: dlpe-windows x-originating-ip: [10.239.127.36] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2 0/2] i40e Rx descriptor loads ordering X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Ruifeng Wang > Sent: Wednesday, September 15, 2021 4:34 PM > To: dev@dpdk.org > Cc: Xing, Beilei ; Zhang, Qi Z ; > Richardson, Bruce ; jerinj@marvell.com; > hemant.agrawal@nxp.com; drc@linux.vnet.ibm.com; > honnappa.nagarahalli@arm.com; stable@dpdk.org; nd@arm.com; Ruifeng > Wang > Subject: [PATCH v2 0/2] i40e Rx descriptor loads ordering >=20 > On Rx path, NIC fills Rx descriptor with data pertains to received packet= . >=20 > A single descriptor consists of multiple words. Word1 has the bit that in= dicates > readiness of descriptor for software to use. So word1 should be loaded be= fore > other words. >=20 > On architectures with weaker memory ordering, barrier is needed to ensure > the ordering of loads. >=20 > This patch set fixed the risk on both scalar path and aarch64 vector path= . >=20 > v2: > Updated commit message. Performance impact added. (Honnappa) >=20 > Ruifeng Wang (2): > net/i40e: fix risk in Rx descriptor read in NEON vector path > net/i40e: fix risk in Rx descriptor read in scalar path >=20 > drivers/net/i40e/i40e_rxtx.c | 12 ++++++++++++ > drivers/net/i40e/i40e_rxtx_vec_neon.c | 8 ++++++++ > 2 files changed, 20 insertions(+) >=20 > -- > 2.25.1 Applied to dpdk-next-net-intel. Thanks Qi