* [dpdk-dev] [PATCH] net/ice: fix SPI for ESP and NATT not work issue
@ 2021-07-12 9:39 Simei Su
2021-07-13 1:07 ` Zhang, Qi Z
2021-07-13 2:10 ` [dpdk-dev] [PATCH v2] net/ice: fix FDIR when SPI as input set for ESP flow Simei Su
0 siblings, 2 replies; 5+ messages in thread
From: Simei Su @ 2021-07-12 9:39 UTC (permalink / raw)
To: qi.z.zhang; +Cc: dev, yahui.cao, Simei Su
This patch fixes this issue by adding the correspongding input set for
ESP and NATT when parsing input set. Also, it adds input set bit for
NAT_T_ESP to distinguish ESP over IP and ESP over UDP.
Fixes: 70feafc1a3f2 ("net/ice: support ESP/NATT flow director to match outer IP")
Signed-off-by: Simei Su <simei.su@intel.com>
---
drivers/net/ice/ice_fdir_filter.c | 14 ++++++++++----
drivers/net/ice/ice_generic_flow.h | 3 +++
2 files changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c
index 4f1aa39..82adb1f 100644
--- a/drivers/net/ice/ice_fdir_filter.c
+++ b/drivers/net/ice/ice_fdir_filter.c
@@ -100,11 +100,11 @@
#define ICE_FDIR_INSET_IPV4_NATT_ESP (\
ICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | \
- ICE_INSET_ESP_SPI)
+ ICE_INSET_NAT_T_ESP_SPI)
#define ICE_FDIR_INSET_IPV6_NATT_ESP (\
ICE_INSET_IPV6_SRC | ICE_INSET_IPV6_DST | \
- ICE_INSET_ESP_SPI)
+ ICE_INSET_NAT_T_ESP_SPI)
static struct ice_pattern_match_item ice_fdir_pattern_list[] = {
{pattern_ethertype, ICE_FDIR_INSET_ETH, ICE_INSET_NONE, ICE_INSET_NONE},
@@ -951,6 +951,8 @@ ice_fdir_input_set_parse(uint64_t inset, enum ice_flow_field *field)
{ICE_INSET_GTPU_TEID, ICE_FLOW_FIELD_IDX_GTPU_IP_TEID},
{ICE_INSET_GTPU_QFI, ICE_FLOW_FIELD_IDX_GTPU_EH_QFI},
{ICE_INSET_VXLAN_VNI, ICE_FLOW_FIELD_IDX_VXLAN_VNI},
+ {ICE_INSET_ESP_SPI, ICE_FLOW_FIELD_IDX_ESP_SPI},
+ {ICE_INSET_NAT_T_ESP_SPI, ICE_FLOW_FIELD_IDX_NAT_T_ESP_SPI},
};
for (i = 0, j = 0; i < RTE_DIM(ice_inset_map); i++) {
@@ -2128,8 +2130,12 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,
if (!(esp_spec && esp_mask))
break;
- if (esp_mask->hdr.spi == UINT32_MAX)
- *input_set |= ICE_INSET_ESP_SPI;
+ if (esp_mask->hdr.spi == UINT32_MAX) {
+ if (l4 == RTE_FLOW_ITEM_TYPE_UDP)
+ *input_set |= ICE_INSET_NAT_T_ESP_SPI;
+ else
+ *input_set |= ICE_INSET_ESP_SPI;
+ }
if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
filter->input.ip.v4.sec_parm_idx =
diff --git a/drivers/net/ice/ice_generic_flow.h b/drivers/net/ice/ice_generic_flow.h
index 0bd38d8..8845a3e 100644
--- a/drivers/net/ice/ice_generic_flow.h
+++ b/drivers/net/ice/ice_generic_flow.h
@@ -26,6 +26,7 @@
#define ICE_PROT_AH BIT_ULL(15)
#define ICE_PROT_L2TPV3OIP BIT_ULL(16)
#define ICE_PROT_PFCP BIT_ULL(17)
+#define ICE_PROT_NAT_T_ESP BIT_ULL(18)
/* field */
@@ -117,6 +118,8 @@
(ICE_PROT_PFCP | ICE_PFCP_S_FIELD)
#define ICE_INSET_PFCP_SEID \
(ICE_PROT_PFCP | ICE_PFCP_S_FIELD | ICE_PFCP_SEID)
+#define ICE_INSET_NAT_T_ESP_SPI \
+ (ICE_PROT_NAT_T_ESP | ICE_ESP_SPI)
/* empty pattern */
extern enum rte_flow_item_type pattern_empty[];
--
2.9.5
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [dpdk-dev] [PATCH] net/ice: fix SPI for ESP and NATT not work issue 2021-07-12 9:39 [dpdk-dev] [PATCH] net/ice: fix SPI for ESP and NATT not work issue Simei Su @ 2021-07-13 1:07 ` Zhang, Qi Z 2021-07-13 1:44 ` Su, Simei 2021-07-13 2:10 ` [dpdk-dev] [PATCH v2] net/ice: fix FDIR when SPI as input set for ESP flow Simei Su 1 sibling, 1 reply; 5+ messages in thread From: Zhang, Qi Z @ 2021-07-13 1:07 UTC (permalink / raw) To: Su, Simei; +Cc: dev, Cao, Yahui > -----Original Message----- > From: Su, Simei <simei.su@intel.com> > Sent: Monday, July 12, 2021 5:39 PM > To: Zhang, Qi Z <qi.z.zhang@intel.com> > Cc: dev@dpdk.org; Cao, Yahui <yahui.cao@intel.com>; Su, Simei > <simei.su@intel.com> > Subject: [PATCH] net/ice: fix SPI for ESP and NATT not work issue What is "ESP and NATT" Do you mean fix FDIR when SPI as inputset for an ESP over UDP Flow ? > > This patch fixes this issue by adding the correspongding input set for ESP and s/ correspongding/corresponding > NATT when parsing input set. Also, it adds input set bit for NAT_T_ESP to > distinguish ESP over IP and ESP over UDP. > > Fixes: 70feafc1a3f2 ("net/ice: support ESP/NATT flow director to match outer > IP") > > Signed-off-by: Simei Su <simei.su@intel.com> > --- > drivers/net/ice/ice_fdir_filter.c | 14 ++++++++++---- > drivers/net/ice/ice_generic_flow.h | 3 +++ > 2 files changed, 13 insertions(+), 4 deletions(-) > > diff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c > index 4f1aa39..82adb1f 100644 > --- a/drivers/net/ice/ice_fdir_filter.c > +++ b/drivers/net/ice/ice_fdir_filter.c > @@ -100,11 +100,11 @@ > > #define ICE_FDIR_INSET_IPV4_NATT_ESP (\ > ICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | \ > - ICE_INSET_ESP_SPI) > + ICE_INSET_NAT_T_ESP_SPI) > > #define ICE_FDIR_INSET_IPV6_NATT_ESP (\ > ICE_INSET_IPV6_SRC | ICE_INSET_IPV6_DST | \ > - ICE_INSET_ESP_SPI) > + ICE_INSET_NAT_T_ESP_SPI) > > static struct ice_pattern_match_item ice_fdir_pattern_list[] = { > {pattern_ethertype, ICE_FDIR_INSET_ETH, > ICE_INSET_NONE, ICE_INSET_NONE}, > @@ -951,6 +951,8 @@ ice_fdir_input_set_parse(uint64_t inset, enum > ice_flow_field *field) > {ICE_INSET_GTPU_TEID, ICE_FLOW_FIELD_IDX_GTPU_IP_TEID}, > {ICE_INSET_GTPU_QFI, ICE_FLOW_FIELD_IDX_GTPU_EH_QFI}, > {ICE_INSET_VXLAN_VNI, ICE_FLOW_FIELD_IDX_VXLAN_VNI}, > + {ICE_INSET_ESP_SPI, ICE_FLOW_FIELD_IDX_ESP_SPI}, > + {ICE_INSET_NAT_T_ESP_SPI, > ICE_FLOW_FIELD_IDX_NAT_T_ESP_SPI}, > }; > > for (i = 0, j = 0; i < RTE_DIM(ice_inset_map); i++) { @@ -2128,8 +2130,12 > @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad, > if (!(esp_spec && esp_mask)) > break; > > - if (esp_mask->hdr.spi == UINT32_MAX) > - *input_set |= ICE_INSET_ESP_SPI; > + if (esp_mask->hdr.spi == UINT32_MAX) { > + if (l4 == RTE_FLOW_ITEM_TYPE_UDP) > + *input_set |= ICE_INSET_NAT_T_ESP_SPI; > + else > + *input_set |= ICE_INSET_ESP_SPI; > + } > > if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) > filter->input.ip.v4.sec_parm_idx = > diff --git a/drivers/net/ice/ice_generic_flow.h > b/drivers/net/ice/ice_generic_flow.h > index 0bd38d8..8845a3e 100644 > --- a/drivers/net/ice/ice_generic_flow.h > +++ b/drivers/net/ice/ice_generic_flow.h > @@ -26,6 +26,7 @@ > #define ICE_PROT_AH BIT_ULL(15) > #define ICE_PROT_L2TPV3OIP BIT_ULL(16) > #define ICE_PROT_PFCP BIT_ULL(17) > +#define ICE_PROT_NAT_T_ESP BIT_ULL(18) > > /* field */ > > @@ -117,6 +118,8 @@ > (ICE_PROT_PFCP | ICE_PFCP_S_FIELD) > #define ICE_INSET_PFCP_SEID \ > (ICE_PROT_PFCP | ICE_PFCP_S_FIELD | ICE_PFCP_SEID) > +#define ICE_INSET_NAT_T_ESP_SPI \ > + (ICE_PROT_NAT_T_ESP | ICE_ESP_SPI) > > /* empty pattern */ > extern enum rte_flow_item_type pattern_empty[]; > -- > 2.9.5 ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [dpdk-dev] [PATCH] net/ice: fix SPI for ESP and NATT not work issue 2021-07-13 1:07 ` Zhang, Qi Z @ 2021-07-13 1:44 ` Su, Simei 0 siblings, 0 replies; 5+ messages in thread From: Su, Simei @ 2021-07-13 1:44 UTC (permalink / raw) To: Zhang, Qi Z; +Cc: dev, Cao, Yahui Hi, Qi > -----Original Message----- > From: Zhang, Qi Z <qi.z.zhang@intel.com> > Sent: Tuesday, July 13, 2021 9:07 AM > To: Su, Simei <simei.su@intel.com> > Cc: dev@dpdk.org; Cao, Yahui <yahui.cao@intel.com> > Subject: RE: [PATCH] net/ice: fix SPI for ESP and NATT not work issue > > > > > -----Original Message----- > > From: Su, Simei <simei.su@intel.com> > > Sent: Monday, July 12, 2021 5:39 PM > > To: Zhang, Qi Z <qi.z.zhang@intel.com> > > Cc: dev@dpdk.org; Cao, Yahui <yahui.cao@intel.com>; Su, Simei > > <simei.su@intel.com> > > Subject: [PATCH] net/ice: fix SPI for ESP and NATT not work issue > > What is "ESP and NATT" > Do you mean > fix FDIR when SPI as inputset for an ESP over UDP Flow ? > Yes, I mean when SPI as inputset for both ESP over IP and ESP over UDP. I will refine the title to let it be more accurate. > > > > This patch fixes this issue by adding the correspongding input set for > > ESP and > > s/ correspongding/corresponding OK. Thanks for correcting it. > > > NATT when parsing input set. Also, it adds input set bit for NAT_T_ESP > > to distinguish ESP over IP and ESP over UDP. > > > > Fixes: 70feafc1a3f2 ("net/ice: support ESP/NATT flow director to match > > outer > > IP") > > > > Signed-off-by: Simei Su <simei.su@intel.com> > > --- > > drivers/net/ice/ice_fdir_filter.c | 14 ++++++++++---- > > drivers/net/ice/ice_generic_flow.h | 3 +++ > > 2 files changed, 13 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/net/ice/ice_fdir_filter.c > > b/drivers/net/ice/ice_fdir_filter.c > > index 4f1aa39..82adb1f 100644 > > --- a/drivers/net/ice/ice_fdir_filter.c > > +++ b/drivers/net/ice/ice_fdir_filter.c > > @@ -100,11 +100,11 @@ > > > > #define ICE_FDIR_INSET_IPV4_NATT_ESP (\ ICE_INSET_IPV4_SRC | > > ICE_INSET_IPV4_DST | \ > > -ICE_INSET_ESP_SPI) > > +ICE_INSET_NAT_T_ESP_SPI) > > > > #define ICE_FDIR_INSET_IPV6_NATT_ESP (\ ICE_INSET_IPV6_SRC | > > ICE_INSET_IPV6_DST | \ > > -ICE_INSET_ESP_SPI) > > +ICE_INSET_NAT_T_ESP_SPI) > > > > static struct ice_pattern_match_item ice_fdir_pattern_list[] = { > > {pattern_ethertype,ICE_FDIR_INSET_ETH, > > ICE_INSET_NONE,ICE_INSET_NONE}, > > @@ -951,6 +951,8 @@ ice_fdir_input_set_parse(uint64_t inset, enum > > ice_flow_field *field) {ICE_INSET_GTPU_TEID, > > ICE_FLOW_FIELD_IDX_GTPU_IP_TEID}, {ICE_INSET_GTPU_QFI, > > ICE_FLOW_FIELD_IDX_GTPU_EH_QFI}, {ICE_INSET_VXLAN_VNI, > > ICE_FLOW_FIELD_IDX_VXLAN_VNI}, > > +{ICE_INSET_ESP_SPI, ICE_FLOW_FIELD_IDX_ESP_SPI}, > > +{ICE_INSET_NAT_T_ESP_SPI, > > ICE_FLOW_FIELD_IDX_NAT_T_ESP_SPI}, > > }; > > > > for (i = 0, j = 0; i < RTE_DIM(ice_inset_map); i++) { @@ -2128,8 > > +2130,12 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter > > *ad, if (!(esp_spec && esp_mask)) break; > > > > -if (esp_mask->hdr.spi == UINT32_MAX) > > -*input_set |= ICE_INSET_ESP_SPI; > > +if (esp_mask->hdr.spi == UINT32_MAX) { if (l4 == > > +RTE_FLOW_ITEM_TYPE_UDP) *input_set |= ICE_INSET_NAT_T_ESP_SPI; else > > +*input_set |= ICE_INSET_ESP_SPI; } > > > > if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) > > filter->input.ip.v4.sec_parm_idx = > > diff --git a/drivers/net/ice/ice_generic_flow.h > > b/drivers/net/ice/ice_generic_flow.h > > index 0bd38d8..8845a3e 100644 > > --- a/drivers/net/ice/ice_generic_flow.h > > +++ b/drivers/net/ice/ice_generic_flow.h > > @@ -26,6 +26,7 @@ > > #define ICE_PROT_AHBIT_ULL(15) > > #define ICE_PROT_L2TPV3OIPBIT_ULL(16) #define > > ICE_PROT_PFCPBIT_ULL(17) > > +#define ICE_PROT_NAT_T_ESPBIT_ULL(18) > > > > /* field */ > > > > @@ -117,6 +118,8 @@ > > (ICE_PROT_PFCP | ICE_PFCP_S_FIELD) > > #define ICE_INSET_PFCP_SEID \ > > (ICE_PROT_PFCP | ICE_PFCP_S_FIELD | ICE_PFCP_SEID) > > +#define ICE_INSET_NAT_T_ESP_SPI \ > > +(ICE_PROT_NAT_T_ESP | ICE_ESP_SPI) > > > > /* empty pattern */ > > extern enum rte_flow_item_type pattern_empty[]; > > -- > > 2.9.5 > ^ permalink raw reply [flat|nested] 5+ messages in thread
* [dpdk-dev] [PATCH v2] net/ice: fix FDIR when SPI as input set for ESP flow 2021-07-12 9:39 [dpdk-dev] [PATCH] net/ice: fix SPI for ESP and NATT not work issue Simei Su 2021-07-13 1:07 ` Zhang, Qi Z @ 2021-07-13 2:10 ` Simei Su 2021-07-13 2:59 ` Zhang, Qi Z 1 sibling, 1 reply; 5+ messages in thread From: Simei Su @ 2021-07-13 2:10 UTC (permalink / raw) To: qi.z.zhang; +Cc: dev, yahui.cao, Simei Su FDIR can't work when SPI as inputset for both ESP over IP and ESP over UDP flow. This patch fixes this issue by adding the corresponding input set for ESP over IP and ESP over UDP when parsing input set. Also, it adds input set bit for NAT_T_ESP to distinguish ESP over IP and ESP over UDP. Fixes: 70feafc1a3f2 ("net/ice: support ESP/NATT flow director to match outer IP") Signed-off-by: Simei Su <simei.su@intel.com> v2: * Refine title and commit log to be more accurate. * Correct spelling mistakes in commit log. --- drivers/net/ice/ice_fdir_filter.c | 14 ++++++++++---- drivers/net/ice/ice_generic_flow.h | 3 +++ 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c index 4f1aa39..82adb1f 100644 --- a/drivers/net/ice/ice_fdir_filter.c +++ b/drivers/net/ice/ice_fdir_filter.c @@ -100,11 +100,11 @@ #define ICE_FDIR_INSET_IPV4_NATT_ESP (\ ICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | \ - ICE_INSET_ESP_SPI) + ICE_INSET_NAT_T_ESP_SPI) #define ICE_FDIR_INSET_IPV6_NATT_ESP (\ ICE_INSET_IPV6_SRC | ICE_INSET_IPV6_DST | \ - ICE_INSET_ESP_SPI) + ICE_INSET_NAT_T_ESP_SPI) static struct ice_pattern_match_item ice_fdir_pattern_list[] = { {pattern_ethertype, ICE_FDIR_INSET_ETH, ICE_INSET_NONE, ICE_INSET_NONE}, @@ -951,6 +951,8 @@ ice_fdir_input_set_parse(uint64_t inset, enum ice_flow_field *field) {ICE_INSET_GTPU_TEID, ICE_FLOW_FIELD_IDX_GTPU_IP_TEID}, {ICE_INSET_GTPU_QFI, ICE_FLOW_FIELD_IDX_GTPU_EH_QFI}, {ICE_INSET_VXLAN_VNI, ICE_FLOW_FIELD_IDX_VXLAN_VNI}, + {ICE_INSET_ESP_SPI, ICE_FLOW_FIELD_IDX_ESP_SPI}, + {ICE_INSET_NAT_T_ESP_SPI, ICE_FLOW_FIELD_IDX_NAT_T_ESP_SPI}, }; for (i = 0, j = 0; i < RTE_DIM(ice_inset_map); i++) { @@ -2128,8 +2130,12 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad, if (!(esp_spec && esp_mask)) break; - if (esp_mask->hdr.spi == UINT32_MAX) - *input_set |= ICE_INSET_ESP_SPI; + if (esp_mask->hdr.spi == UINT32_MAX) { + if (l4 == RTE_FLOW_ITEM_TYPE_UDP) + *input_set |= ICE_INSET_NAT_T_ESP_SPI; + else + *input_set |= ICE_INSET_ESP_SPI; + } if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) filter->input.ip.v4.sec_parm_idx = diff --git a/drivers/net/ice/ice_generic_flow.h b/drivers/net/ice/ice_generic_flow.h index 0bd38d8..8845a3e 100644 --- a/drivers/net/ice/ice_generic_flow.h +++ b/drivers/net/ice/ice_generic_flow.h @@ -26,6 +26,7 @@ #define ICE_PROT_AH BIT_ULL(15) #define ICE_PROT_L2TPV3OIP BIT_ULL(16) #define ICE_PROT_PFCP BIT_ULL(17) +#define ICE_PROT_NAT_T_ESP BIT_ULL(18) /* field */ @@ -117,6 +118,8 @@ (ICE_PROT_PFCP | ICE_PFCP_S_FIELD) #define ICE_INSET_PFCP_SEID \ (ICE_PROT_PFCP | ICE_PFCP_S_FIELD | ICE_PFCP_SEID) +#define ICE_INSET_NAT_T_ESP_SPI \ + (ICE_PROT_NAT_T_ESP | ICE_ESP_SPI) /* empty pattern */ extern enum rte_flow_item_type pattern_empty[]; -- 2.9.5 ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [dpdk-dev] [PATCH v2] net/ice: fix FDIR when SPI as input set for ESP flow 2021-07-13 2:10 ` [dpdk-dev] [PATCH v2] net/ice: fix FDIR when SPI as input set for ESP flow Simei Su @ 2021-07-13 2:59 ` Zhang, Qi Z 0 siblings, 0 replies; 5+ messages in thread From: Zhang, Qi Z @ 2021-07-13 2:59 UTC (permalink / raw) To: Su, Simei; +Cc: dev, Cao, Yahui > -----Original Message----- > From: Su, Simei <simei.su@intel.com> > Sent: Tuesday, July 13, 2021 10:10 AM > To: Zhang, Qi Z <qi.z.zhang@intel.com> > Cc: dev@dpdk.org; Cao, Yahui <yahui.cao@intel.com>; Su, Simei > <simei.su@intel.com> > Subject: [PATCH v2] net/ice: fix FDIR when SPI as input set for ESP flow > > FDIR can't work when SPI as inputset for both ESP over IP and ESP over UDP > flow. This patch fixes this issue by adding the corresponding input set for ESP > over IP and ESP over UDP when parsing input set. Also, it adds input set bit for > NAT_T_ESP to distinguish ESP over IP and ESP over UDP. > > Fixes: 70feafc1a3f2 ("net/ice: support ESP/NATT flow director to match outer > IP") > > Signed-off-by: Simei Su <simei.su@intel.com> > > v2: > * Refine title and commit log to be more accurate. > * Correct spelling mistakes in commit log. Change log is not part of the commit log, should below "---" Acked-by: Qi Zhang <qi.z.zhang@intel.com> Applied to dpdk-next-net-intel. Thanks Qi ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2021-07-13 2:59 UTC | newest] Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-07-12 9:39 [dpdk-dev] [PATCH] net/ice: fix SPI for ESP and NATT not work issue Simei Su 2021-07-13 1:07 ` Zhang, Qi Z 2021-07-13 1:44 ` Su, Simei 2021-07-13 2:10 ` [dpdk-dev] [PATCH v2] net/ice: fix FDIR when SPI as input set for ESP flow Simei Su 2021-07-13 2:59 ` Zhang, Qi Z
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