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Mon, 9 Jun 2025 12:23:23 +0000 Date: Mon, 9 Jun 2025 13:23:18 +0100 From: Bruce Richardson To: "Varghese, Vipin" CC: "dev@dpdk.org" , "Song, Keesang" Subject: Re: [PATCH v4] build: reduce use of AVX compiler flags Message-ID: References: <20250325172215.3360590-1-bruce.richardson@intel.com> <20250529154249.1310449-1-bruce.richardson@intel.com> Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-ClientProxiedBy: DB8PR09CA0036.eurprd09.prod.outlook.com (2603:10a6:10:a0::49) To DS0PR11MB7309.namprd11.prod.outlook.com (2603:10b6:8:13e::17) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS0PR11MB7309:EE_|PH7PR11MB6497:EE_ X-MS-Office365-Filtering-Correlation-Id: 9ef136bf-c50f-4f33-cccd-08dda7506d4f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|376014|1800799024|7053199007; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?ZqcIGINBCzbvfozaaqxxc3I2cNLoB0VFUCWZ5wPQQKoIj1Z+b98PaEGsR8EG?= =?us-ascii?Q?8zAg4DQev1+YoISjBc+iFoQ5fAA/BNGgJhRNd4UsCJp22JdQ77g6wYm7wo6K?= =?us-ascii?Q?fr/8BiEOpiC/G4fDFffrFzE4YLTM+nTmokj9+8MJdNNkB8vS202zEYVmK1Pb?= =?us-ascii?Q?gR1N1nQLfAnAC4vkhSdQQlSqSOmVLn4p8vy6DXctE0hGMYWqFf/OvMDReeJh?= =?us-ascii?Q?LZj10J7/VTV9pn3696j881Af3SYhXD+ZV85DDM195ll/wtsmSd5RbAbf3rwb?= =?us-ascii?Q?nKgAafEBRJhoiZoZv9/7daJqoTpV3plnF07wTL04i8lyjMCNelABzJdGcqDH?= =?us-ascii?Q?JCxVoJnmkFt8CrY5QNPzMa4JiJ3b4lOsjNUsmm+2uGpdn9fsXZMxcGmFHrjn?= =?us-ascii?Q?XDFFKahKlwwTcEvZlp9SkdUC24rQ3eGZvgdzEWQFmkMvAoTrFrJs2guK1csq?= =?us-ascii?Q?++svlASti5IP1CcEK5zJj3saDd1z4plLv2MGZY5l47tsx9LbYSmFbuueduuT?= =?us-ascii?Q?x4nVn2hx6CLJHVr1+qU0uqkn2ejIEfpaZHsklD7++vqOPVRfJZqSVnwuhCu5?= =?us-ascii?Q?YL4Jj0bqOLBYH3aVNY7CHISSKnYLUU4XpLzLAW/hWhP6dAk6r+yQhjYlZUX8?= =?us-ascii?Q?OPiXHrEDvwtAQ1huXjteXdZmrEEXCxUfB/VDs8hgTovmq4rcyPw1izjwrYMO?= =?us-ascii?Q?ZRkslGx5zLOxKp68sou/a2VlGRCrTltR9NM8yGfR78X380kxIALzlqhihy+6?= =?us-ascii?Q?EV3sy0Y3JqXFnxSew/cUlD5PPh5SLjXuSvYdTLumXKaZ4xIYLSLKiUH3hFfj?= =?us-ascii?Q?tUOyKhBqhScDSA7/1UjhV2xqLGSysVmq3r6zuLYxezEY5bfgc2FUhtFyx8em?= =?us-ascii?Q?5pdxO8nqar8ffKm6O1l9REO0DymYKHMwzo7H+oqIk8d10tUNFqSd3Xdzduy3?= =?us-ascii?Q?UOv8sCcQtj4US1Ub3l+H5x/VRdWqH7OWCN7Z07GwdJprc9K7x+U+fi5cpjWI?= =?us-ascii?Q?YoTRJYWzr8IqUP7nQPqdRU9Aapk1u89y+Q0oXDHILEjDrNIXtcwatEk3bV0b?= =?us-ascii?Q?IGMsguqrybMuYQ9AuAGDYXAWzXyCHVEpF/pjEFa9Xlx9W31OAvoHjVW45nV2?= =?us-ascii?Q?mvW846wkVF9ah8DzFLK08Tp7Tt7TTn3EmpyacVl+tAdm+uy55nj8gobjGz4d?= =?us-ascii?Q?yIvuVAc4uUqmLmUt37eyhaw3jiYqkZX78u3cr/9aui/faFZ3fK6RkPWDes+F?= =?us-ascii?Q?z+M3ryoHZpJCthAMlBghYjQ/S18LLrtDk/HNJbQeVFgW8MH3uz7Nkup4sxKd?= =?us-ascii?Q?47jC9moRtNsSBn3/bqn98KqYRR7+JHyIppgrrrMoL2DAbg9MzOAPWhMD2PUI?= =?us-ascii?Q?4NI7dJVn6aqR0VKFO+sK5mBecpeJ?= X-Forefront-Antispam-Report: CIP:255.255.255.255; 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Song, Keesang > > Subject: Re: [PATCH v4] build: reduce use of AVX compiler flags > > > > Caution: This message originated from an External Source. Use proper caution > > when opening attachments, clicking links, or responding. > > > > > > On Mon, Jun 09, 2025 at 06:02:02AM +0000, Varghese, Vipin wrote: > > > [Public] > > > > > > Snipped > > > > > > > > > > > > > > > When doing a build for a target that already has the instruction > > > > sets for > > > > AVX2/AVX512 enabled, skip emitting the AVX compiler flags, or the > > > > skylake-avx512 '-march' flags, as they are unnecessary. Instead, > > > > when the default flags produce the desired output, just use them > > > > unmodified, and don't bother adding in extra enabling flags for AVX2 or AVX-512. > > > > > > > > Depends-on: series-35006 ("doc/linux_gsg: update recommended > > > > compiler > > > > versions") > > > > > > > > Signed-off-by: Bruce Richardson > > > > --- > > > > > > > > V4: Fix error flagged by CI with clang builds without AVX512 - change > > > > "cc_avx512_args" to correct "cc_avx512_flags" > > > > > > > > V3: put in version check to work around an issues with some meson > > > > versions, (hopefully) allowing builds to pass in all CIs. The > > > > printout of the extra flags now only happens with meson >= > > > > 0.60.2 > > > > > > > > V2: dropped the doc update for the minimum compiler version. Based on > > > > discussion, that version bump is larger than proposed in RFC and is > > > > now a separate patch/series [series 35006 referenced above] > > > > > > > > --- > > > > config/x86/meson.build | 31 ++++++++++++++++++++----------- > > > > drivers/meson.build | 9 +-------- > > > > lib/meson.build | 9 +-------- > > > > 3 files changed, 22 insertions(+), 27 deletions(-) > > > > > > > > diff --git a/config/x86/meson.build b/config/x86/meson.build index > > > > c3564b0011..e6612dbd80 100644 > > > > --- a/config/x86/meson.build > > > > +++ b/config/x86/meson.build > > > > @@ -4,11 +4,13 @@ > > > > if is_ms_compiler > > > > cc_avx2_flags = ['/arch:AVX2'] > > > > else > > > > - cc_avx2_flags = ['-mavx2'] > > > > + cc_avx2_flags = [] > > > > + if cc.get_define('__AVX2__', args: machine_args) == '' > > > > + cc_avx2_flags = ['-mavx2'] > > > > + endif > > > > endif > > > > > > > > cc_has_avx512 = false > > > > -target_has_avx512 = false > > > > > > > > dpdk_conf.set('RTE_ARCH_X86', 1) > > > > if dpdk_conf.get('RTE_ARCH_64') > > > > @@ -65,26 +67,33 @@ if is_linux or cc.get_id() == 'gcc' > > > > endif > > > > endif > > > > > > > > -cc_avx512_flags = ['-mavx512f', '-mavx512vl', '-mavx512dq', > > > > '-mavx512bw', '- mavx512cd'] -if (binutils_ok and > > > > cc.has_multi_arguments(cc_avx512_flags) > > > > +avx512_march_flag = '-march=skylake-avx512' > > > > +cc_avx512_flags = [] > > > > +if (binutils_ok and cc.has_argument(avx512_march_flag) > > > > and '-mno-avx512f' not in get_option('c_args')) > > > > # check if compiler is working with _mm512_extracti64x4_epi64 > > > > # Ref: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82887 > > > > code = '''#include > > > > void test(__m512i zmm){ > > > > __m256i ymm = _mm512_extracti64x4_epi64(zmm, 0);}''' > > > > - result = cc.compiles(code, args : cc_avx512_flags, name : 'AVX512 > > checking') > > > > + result = cc.compiles(code, args : [avx512_march_flag], name : > > > > + 'AVX512 checking') > > > > if result == false > > > > machine_args += '-mno-avx512f' > > > > warning('Broken _mm512_extracti64x4_epi64, disabling AVX512 support') > > > > else > > > > cc_has_avx512 = true > > > > - target_has_avx512 = ( > > > > - cc.get_define('__AVX512F__', args: machine_args) != '' and > > > > - cc.get_define('__AVX512BW__', args: machine_args) != '' and > > > > - cc.get_define('__AVX512DQ__', args: machine_args) != '' and > > > > - cc.get_define('__AVX512VL__', args: machine_args) != '' > > > > - ) > > > > + if cc.get_define('__AVX512F__', args: machine_args) == '' > > > > + cc_avx512_flags = [avx512_march_flag] > > > > > > Hi Bruce, we have reviewed this internally and tested the same. We would like > > your thought for the following. > > > > > > - Before patch: we were directly setting AVX512 falgs for F, BW, DQ, > > > VL > > > - new patch: we are setting the flags for `skylake-server` as bare minimal. > > > - AMD supports AVX512 from `znver4 and higher`. > > > > > > As per GCC `https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html`, the extra ISA > > supported between skylake-server (super set) and znver4 and znver5 are `SAHF, > > FXSR, XSAVE, RDRND, LZCNT, HLE, PREFETCHW, SGX`. > > > Currently for DPDK microbenchmarks and examples runs safe as it is not using > > the `SAHF, FXSR, XSAVE, RDRND, LZCNT, HLE, PREFETCHW, SGX` > > instructions. > > > > > > Question: should we check if target is `AMD EPYC` then apply bare minimum as > > `-march=znver4`, thus avoid possible unsupported instruction generation when non > > `c_args for march` is passed? > > > > > > > Can you clarify why you mean by the "target" here? Is there a specific value you > > are thinking of for the "cpu_instruction_set" option? > > `Target` is target CPU, when generated without any arguments we get code for `native build`. > > On AMD target cpu zen4 or zen5; Before patch as per the code ` AVX512 flags for F, BW, DQ` are used in ` cc_avx512_flags`. > > With the patch, the cc_avx512_flags is set to `-march=skylake-avx512` (where compiler optimizations `can add HLE, PREFETCHW, SGX`). > With this patch for zen4 or zen5 the AVX512 code paths should be compiled with no additional flags, since the -march=zen* flag should include everything necessary. Can you confirm that you see the extra -march flag in those cases? /Bruce