* [RFC PATCH 01/14] net/ice: use the same Rx path across process types
2025-07-25 12:49 [RFC PATCH 00/14] net/intel: rx path selection simplification Ciara Loftus
@ 2025-07-25 12:49 ` Ciara Loftus
2025-07-25 13:40 ` Bruce Richardson
2025-07-25 12:49 ` [RFC PATCH 02/14] net/iavf: rename Rx/Tx function type variables Ciara Loftus
` (12 subsequent siblings)
13 siblings, 1 reply; 24+ messages in thread
From: Ciara Loftus @ 2025-07-25 12:49 UTC (permalink / raw)
To: dev; +Cc: Ciara Loftus
In the interest of simplicity, let the primary process select the Rx
path to be used by all processes using the given device.
The many logs which report individual Rx path selections have been
consolidated into one single log.
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
drivers/net/intel/ice/ice_ethdev.c | 2 +
drivers/net/intel/ice/ice_ethdev.h | 19 ++-
drivers/net/intel/ice/ice_rxtx.c | 234 ++++++++++++-----------------
3 files changed, 113 insertions(+), 142 deletions(-)
diff --git a/drivers/net/intel/ice/ice_ethdev.c b/drivers/net/intel/ice/ice_ethdev.c
index 513777e372..a8c570026a 100644
--- a/drivers/net/intel/ice/ice_ethdev.c
+++ b/drivers/net/intel/ice/ice_ethdev.c
@@ -3684,6 +3684,8 @@ ice_dev_configure(struct rte_eth_dev *dev)
ad->rx_bulk_alloc_allowed = true;
ad->tx_simple_allowed = true;
+ ad->rx_func_type = ICE_RX_DEFAULT;
+
if (dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG)
dev->data->dev_conf.rxmode.offloads |= RTE_ETH_RX_OFFLOAD_RSS_HASH;
diff --git a/drivers/net/intel/ice/ice_ethdev.h b/drivers/net/intel/ice/ice_ethdev.h
index 8e5799f8b4..5fda814f06 100644
--- a/drivers/net/intel/ice/ice_ethdev.h
+++ b/drivers/net/intel/ice/ice_ethdev.h
@@ -191,6 +191,22 @@ enum pps_type {
PPS_MAX,
};
+enum ice_rx_func_type {
+ ICE_RX_DEFAULT,
+ ICE_RX_BULK_ALLOC,
+ ICE_RX_SCATTERED,
+ ICE_RX_SSE,
+ ICE_RX_AVX2,
+ ICE_RX_AVX2_OFFLOAD,
+ ICE_RX_SSE_SCATTERED,
+ ICE_RX_AVX2_SCATTERED,
+ ICE_RX_AVX2_SCATTERED_OFFLOAD,
+ ICE_RX_AVX512,
+ ICE_RX_AVX512_OFFLOAD,
+ ICE_RX_AVX512_SCATTERED,
+ ICE_RX_AVX512_SCATTERED_OFFLOAD,
+};
+
struct ice_adapter;
/**
@@ -637,6 +653,7 @@ struct ice_adapter {
bool rx_vec_allowed;
bool tx_vec_allowed;
bool tx_simple_allowed;
+ enum ice_rx_func_type rx_func_type;
/* ptype mapping table */
alignas(RTE_CACHE_LINE_MIN_SIZE) uint32_t ptype_tbl[ICE_MAX_PKT_TYPE];
bool is_safe_mode;
@@ -658,8 +675,6 @@ struct ice_adapter {
unsigned long disabled_engine_mask;
struct ice_parser *psr;
/* used only on X86, zero on other Archs */
- bool rx_use_avx2;
- bool rx_use_avx512;
bool tx_use_avx2;
bool tx_use_avx512;
bool rx_vec_offload_support;
diff --git a/drivers/net/intel/ice/ice_rxtx.c b/drivers/net/intel/ice/ice_rxtx.c
index da508592aa..85832d95a3 100644
--- a/drivers/net/intel/ice/ice_rxtx.c
+++ b/drivers/net/intel/ice/ice_rxtx.c
@@ -3662,181 +3662,135 @@ ice_xmit_pkts_simple(void *tx_queue,
return nb_tx;
}
+static const struct {
+ eth_rx_burst_t pkt_burst;
+ const char *info;
+} ice_rx_burst_infos[] = {
+ [ICE_RX_SCATTERED] = { ice_recv_scattered_pkts, "Scalar Scattered" },
+ [ICE_RX_BULK_ALLOC] = { ice_recv_pkts_bulk_alloc, "Scalar Bulk Alloc" },
+ [ICE_RX_DEFAULT] = { ice_recv_pkts, "Scalar" },
+#ifdef RTE_ARCH_X86
+#ifdef CC_AVX512_SUPPORT
+ [ICE_RX_AVX512_SCATTERED] = {
+ ice_recv_scattered_pkts_vec_avx512, "Vector AVX512 Scattered" },
+ [ICE_RX_AVX512_SCATTERED_OFFLOAD] = {
+ ice_recv_scattered_pkts_vec_avx512_offload, "Offload Vector AVX512 Scattered" },
+ [ICE_RX_AVX512] = { ice_recv_pkts_vec_avx512, "Vector AVX512" },
+ [ICE_RX_AVX512_OFFLOAD] = { ice_recv_pkts_vec_avx512_offload, "Offload Vector AVX512" },
+#endif
+ [ICE_RX_AVX2_SCATTERED] = { ice_recv_scattered_pkts_vec_avx2, "Vector AVX2 Scattered" },
+ [ICE_RX_AVX2_SCATTERED_OFFLOAD] = {
+ ice_recv_scattered_pkts_vec_avx2_offload, "Offload Vector AVX2 Scattered" },
+ [ICE_RX_AVX2] = { ice_recv_pkts_vec_avx2, "Vector AVX2" },
+ [ICE_RX_AVX2_OFFLOAD] = { ice_recv_pkts_vec_avx2_offload, "Offload Vector AVX2" },
+ [ICE_RX_SSE_SCATTERED] = { ice_recv_scattered_pkts_vec, "Vector SSE Scattered" },
+ [ICE_RX_SSE] = { ice_recv_pkts_vec, "Vector SSE" },
+#endif
+};
+
void __rte_cold
ice_set_rx_function(struct rte_eth_dev *dev)
{
PMD_INIT_FUNC_TRACE();
struct ice_adapter *ad =
ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
+
+ /* The primary process selects the rx path for all processes. */
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ goto out;
+
#ifdef RTE_ARCH_X86
struct ci_rx_queue *rxq;
int i;
int rx_check_ret = -1;
-
- if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
- ad->rx_use_avx512 = false;
- ad->rx_use_avx2 = false;
- rx_check_ret = ice_rx_vec_dev_check(dev);
- if (ad->ptp_ena)
- rx_check_ret = -1;
- ad->rx_vec_offload_support =
- (rx_check_ret == ICE_VECTOR_OFFLOAD_PATH);
- if (rx_check_ret >= 0 && ad->rx_bulk_alloc_allowed &&
- rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
- ad->rx_vec_allowed = true;
- for (i = 0; i < dev->data->nb_rx_queues; i++) {
- rxq = dev->data->rx_queues[i];
- if (rxq && ice_rxq_vec_setup(rxq)) {
- ad->rx_vec_allowed = false;
- break;
- }
+ bool rx_use_avx512 = false, rx_use_avx2 = false;
+
+ rx_check_ret = ice_rx_vec_dev_check(dev);
+ if (ad->ptp_ena)
+ rx_check_ret = -1;
+ ad->rx_vec_offload_support =
+ (rx_check_ret == ICE_VECTOR_OFFLOAD_PATH);
+ if (rx_check_ret >= 0 && ad->rx_bulk_alloc_allowed &&
+ rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
+ ad->rx_vec_allowed = true;
+ for (i = 0; i < dev->data->nb_rx_queues; i++) {
+ rxq = dev->data->rx_queues[i];
+ if (rxq && ice_rxq_vec_setup(rxq)) {
+ ad->rx_vec_allowed = false;
+ break;
}
+ }
- if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_512 &&
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) == 1)
+ if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_512 &&
+ rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&
+ rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) == 1)
#ifdef CC_AVX512_SUPPORT
- ad->rx_use_avx512 = true;
+ rx_use_avx512 = true;
#else
- PMD_DRV_LOG(NOTICE,
- "AVX512 is not supported in build env");
+ PMD_DRV_LOG(NOTICE,
+ "AVX512 is not supported in build env");
#endif
- if (!ad->rx_use_avx512 &&
- (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) &&
- rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256)
- ad->rx_use_avx2 = true;
-
- } else {
- ad->rx_vec_allowed = false;
- }
+ if (!rx_use_avx512 &&
+ (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||
+ rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) &&
+ rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256)
+ rx_use_avx2 = true;
+ } else {
+ ad->rx_vec_allowed = false;
}
if (ad->rx_vec_allowed) {
if (dev->data->scattered_rx) {
- if (ad->rx_use_avx512) {
+ if (rx_use_avx512) {
#ifdef CC_AVX512_SUPPORT
- if (ad->rx_vec_offload_support) {
- PMD_DRV_LOG(NOTICE,
- "Using AVX512 OFFLOAD Vector Scattered Rx (port %d).",
- dev->data->port_id);
- dev->rx_pkt_burst =
- ice_recv_scattered_pkts_vec_avx512_offload;
- } else {
- PMD_DRV_LOG(NOTICE,
- "Using AVX512 Vector Scattered Rx (port %d).",
- dev->data->port_id);
- dev->rx_pkt_burst =
- ice_recv_scattered_pkts_vec_avx512;
- }
+ if (ad->rx_vec_offload_support)
+ ad->rx_func_type = ICE_RX_AVX512_SCATTERED_OFFLOAD;
+ else
+ ad->rx_func_type = ICE_RX_AVX512_SCATTERED;
#endif
- } else if (ad->rx_use_avx2) {
- if (ad->rx_vec_offload_support) {
- PMD_DRV_LOG(NOTICE,
- "Using AVX2 OFFLOAD Vector Scattered Rx (port %d).",
- dev->data->port_id);
- dev->rx_pkt_burst =
- ice_recv_scattered_pkts_vec_avx2_offload;
- } else {
- PMD_DRV_LOG(NOTICE,
- "Using AVX2 Vector Scattered Rx (port %d).",
- dev->data->port_id);
- dev->rx_pkt_burst =
- ice_recv_scattered_pkts_vec_avx2;
- }
+ } else if (rx_use_avx2) {
+ if (ad->rx_vec_offload_support)
+ ad->rx_func_type = ICE_RX_AVX2_SCATTERED_OFFLOAD;
+ else
+ ad->rx_func_type = ICE_RX_AVX2_SCATTERED;
} else {
- PMD_DRV_LOG(DEBUG,
- "Using Vector Scattered Rx (port %d).",
- dev->data->port_id);
- dev->rx_pkt_burst = ice_recv_scattered_pkts_vec;
+ ad->rx_func_type = ICE_RX_SSE_SCATTERED;
}
} else {
- if (ad->rx_use_avx512) {
+ if (rx_use_avx512) {
#ifdef CC_AVX512_SUPPORT
- if (ad->rx_vec_offload_support) {
- PMD_DRV_LOG(NOTICE,
- "Using AVX512 OFFLOAD Vector Rx (port %d).",
- dev->data->port_id);
- dev->rx_pkt_burst =
- ice_recv_pkts_vec_avx512_offload;
- } else {
- PMD_DRV_LOG(NOTICE,
- "Using AVX512 Vector Rx (port %d).",
- dev->data->port_id);
- dev->rx_pkt_burst =
- ice_recv_pkts_vec_avx512;
- }
+ if (ad->rx_vec_offload_support)
+ ad->rx_func_type = ICE_RX_AVX512_OFFLOAD;
+ else
+ ad->rx_func_type = ICE_RX_AVX512;
#endif
- } else if (ad->rx_use_avx2) {
- if (ad->rx_vec_offload_support) {
- PMD_DRV_LOG(NOTICE,
- "Using AVX2 OFFLOAD Vector Rx (port %d).",
- dev->data->port_id);
- dev->rx_pkt_burst =
- ice_recv_pkts_vec_avx2_offload;
- } else {
- PMD_DRV_LOG(NOTICE,
- "Using AVX2 Vector Rx (port %d).",
- dev->data->port_id);
- dev->rx_pkt_burst =
- ice_recv_pkts_vec_avx2;
- }
+ } else if (rx_use_avx2) {
+ if (ad->rx_vec_offload_support)
+ ad->rx_func_type = ICE_RX_AVX2_OFFLOAD;
+ else
+ ad->rx_func_type = ICE_RX_AVX2;
} else {
- PMD_DRV_LOG(DEBUG,
- "Using Vector Rx (port %d).",
- dev->data->port_id);
- dev->rx_pkt_burst = ice_recv_pkts_vec;
+ ad->rx_func_type = ICE_RX_SSE;
}
}
- return;
+ goto out;
}
#endif
- if (dev->data->scattered_rx) {
+ if (dev->data->scattered_rx)
/* Set the non-LRO scattered function */
- PMD_INIT_LOG(DEBUG,
- "Using a Scattered function on port %d.",
- dev->data->port_id);
- dev->rx_pkt_burst = ice_recv_scattered_pkts;
- } else if (ad->rx_bulk_alloc_allowed) {
- PMD_INIT_LOG(DEBUG,
- "Rx Burst Bulk Alloc Preconditions are "
- "satisfied. Rx Burst Bulk Alloc function "
- "will be used on port %d.",
- dev->data->port_id);
- dev->rx_pkt_burst = ice_recv_pkts_bulk_alloc;
- } else {
- PMD_INIT_LOG(DEBUG,
- "Rx Burst Bulk Alloc Preconditions are not "
- "satisfied, Normal Rx will be used on port %d.",
- dev->data->port_id);
- dev->rx_pkt_burst = ice_recv_pkts;
- }
-}
+ ad->rx_func_type = ICE_RX_SCATTERED;
+ else if (ad->rx_bulk_alloc_allowed)
+ ad->rx_func_type = ICE_RX_BULK_ALLOC;
+ else
+ ad->rx_func_type = ICE_RX_DEFAULT;
-static const struct {
- eth_rx_burst_t pkt_burst;
- const char *info;
-} ice_rx_burst_infos[] = {
- { ice_recv_scattered_pkts, "Scalar Scattered" },
- { ice_recv_pkts_bulk_alloc, "Scalar Bulk Alloc" },
- { ice_recv_pkts, "Scalar" },
-#ifdef RTE_ARCH_X86
-#ifdef CC_AVX512_SUPPORT
- { ice_recv_scattered_pkts_vec_avx512, "Vector AVX512 Scattered" },
- { ice_recv_scattered_pkts_vec_avx512_offload, "Offload Vector AVX512 Scattered" },
- { ice_recv_pkts_vec_avx512, "Vector AVX512" },
- { ice_recv_pkts_vec_avx512_offload, "Offload Vector AVX512" },
-#endif
- { ice_recv_scattered_pkts_vec_avx2, "Vector AVX2 Scattered" },
- { ice_recv_scattered_pkts_vec_avx2_offload, "Offload Vector AVX2 Scattered" },
- { ice_recv_pkts_vec_avx2, "Vector AVX2" },
- { ice_recv_pkts_vec_avx2_offload, "Offload Vector AVX2" },
- { ice_recv_scattered_pkts_vec, "Vector SSE Scattered" },
- { ice_recv_pkts_vec, "Vector SSE" },
-#endif
-};
+out:
+ dev->rx_pkt_burst = ice_rx_burst_infos[ad->rx_func_type].pkt_burst;
+ PMD_DRV_LOG(NOTICE, "Using %s Rx burst function (port %d).",
+ ice_rx_burst_infos[ad->rx_func_type].info, dev->data->port_id);
+}
int
ice_rx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id,
--
2.34.1
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [RFC PATCH 01/14] net/ice: use the same Rx path across process types
2025-07-25 12:49 ` [RFC PATCH 01/14] net/ice: use the same Rx path across process types Ciara Loftus
@ 2025-07-25 13:40 ` Bruce Richardson
0 siblings, 0 replies; 24+ messages in thread
From: Bruce Richardson @ 2025-07-25 13:40 UTC (permalink / raw)
To: Ciara Loftus; +Cc: dev
On Fri, Jul 25, 2025 at 12:49:06PM +0000, Ciara Loftus wrote:
> In the interest of simplicity, let the primary process select the Rx
> path to be used by all processes using the given device.
>
> The many logs which report individual Rx path selections have been
> consolidated into one single log.
>
> Signed-off-by: Ciara Loftus <ciara.loftus@intel.com
Couple of small comments inline below. In general LGTM,
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
> ---
> drivers/net/intel/ice/ice_ethdev.c | 2 +
> drivers/net/intel/ice/ice_ethdev.h | 19 ++-
> drivers/net/intel/ice/ice_rxtx.c | 234 ++++++++++++-----------------
> 3 files changed, 113 insertions(+), 142 deletions(-)
>
> diff --git a/drivers/net/intel/ice/ice_ethdev.c b/drivers/net/intel/ice/ice_ethdev.c
> index 513777e372..a8c570026a 100644
> --- a/drivers/net/intel/ice/ice_ethdev.c
> +++ b/drivers/net/intel/ice/ice_ethdev.c
> @@ -3684,6 +3684,8 @@ ice_dev_configure(struct rte_eth_dev *dev)
> ad->rx_bulk_alloc_allowed = true;
> ad->tx_simple_allowed = true;
>
> + ad->rx_func_type = ICE_RX_DEFAULT;
> +
> if (dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG)
> dev->data->dev_conf.rxmode.offloads |= RTE_ETH_RX_OFFLOAD_RSS_HASH;
>
> diff --git a/drivers/net/intel/ice/ice_ethdev.h b/drivers/net/intel/ice/ice_ethdev.h
> index 8e5799f8b4..5fda814f06 100644
> --- a/drivers/net/intel/ice/ice_ethdev.h
> +++ b/drivers/net/intel/ice/ice_ethdev.h
> @@ -191,6 +191,22 @@ enum pps_type {
> PPS_MAX,
> };
>
> +enum ice_rx_func_type {
> + ICE_RX_DEFAULT,
> + ICE_RX_BULK_ALLOC,
> + ICE_RX_SCATTERED,
> + ICE_RX_SSE,
> + ICE_RX_AVX2,
> + ICE_RX_AVX2_OFFLOAD,
> + ICE_RX_SSE_SCATTERED,
SSE_SCATTERED should be immediately after SSE, I think.
> + ICE_RX_AVX2_SCATTERED,
> + ICE_RX_AVX2_SCATTERED_OFFLOAD,
> + ICE_RX_AVX512,
> + ICE_RX_AVX512_OFFLOAD,
> + ICE_RX_AVX512_SCATTERED,
> + ICE_RX_AVX512_SCATTERED_OFFLOAD,
> +};
> +
> struct ice_adapter;
>
> /**
> @@ -637,6 +653,7 @@ struct ice_adapter {
> bool rx_vec_allowed;
> bool tx_vec_allowed;
> bool tx_simple_allowed;
> + enum ice_rx_func_type rx_func_type;
> /* ptype mapping table */
> alignas(RTE_CACHE_LINE_MIN_SIZE) uint32_t ptype_tbl[ICE_MAX_PKT_TYPE];
> bool is_safe_mode;
> @@ -658,8 +675,6 @@ struct ice_adapter {
> unsigned long disabled_engine_mask;
> struct ice_parser *psr;
> /* used only on X86, zero on other Archs */
> - bool rx_use_avx2;
> - bool rx_use_avx512;
> bool tx_use_avx2;
> bool tx_use_avx512;
> bool rx_vec_offload_support;
> diff --git a/drivers/net/intel/ice/ice_rxtx.c b/drivers/net/intel/ice/ice_rxtx.c
> index da508592aa..85832d95a3 100644
> --- a/drivers/net/intel/ice/ice_rxtx.c
> +++ b/drivers/net/intel/ice/ice_rxtx.c
> @@ -3662,181 +3662,135 @@ ice_xmit_pkts_simple(void *tx_queue,
> return nb_tx;
> }
>
> +static const struct {
> + eth_rx_burst_t pkt_burst;
> + const char *info;
> +} ice_rx_burst_infos[] = {
> + [ICE_RX_SCATTERED] = { ice_recv_scattered_pkts, "Scalar Scattered" },
> + [ICE_RX_BULK_ALLOC] = { ice_recv_pkts_bulk_alloc, "Scalar Bulk Alloc" },
> + [ICE_RX_DEFAULT] = { ice_recv_pkts, "Scalar" },
> +#ifdef RTE_ARCH_X86
> +#ifdef CC_AVX512_SUPPORT
> + [ICE_RX_AVX512_SCATTERED] = {
> + ice_recv_scattered_pkts_vec_avx512, "Vector AVX512 Scattered" },
> + [ICE_RX_AVX512_SCATTERED_OFFLOAD] = {
> + ice_recv_scattered_pkts_vec_avx512_offload, "Offload Vector AVX512 Scattered" },
> + [ICE_RX_AVX512] = { ice_recv_pkts_vec_avx512, "Vector AVX512" },
> + [ICE_RX_AVX512_OFFLOAD] = { ice_recv_pkts_vec_avx512_offload, "Offload Vector AVX512" },
> +#endif
> + [ICE_RX_AVX2_SCATTERED] = { ice_recv_scattered_pkts_vec_avx2, "Vector AVX2 Scattered" },
> + [ICE_RX_AVX2_SCATTERED_OFFLOAD] = {
> + ice_recv_scattered_pkts_vec_avx2_offload, "Offload Vector AVX2 Scattered" },
> + [ICE_RX_AVX2] = { ice_recv_pkts_vec_avx2, "Vector AVX2" },
> + [ICE_RX_AVX2_OFFLOAD] = { ice_recv_pkts_vec_avx2_offload, "Offload Vector AVX2" },
> + [ICE_RX_SSE_SCATTERED] = { ice_recv_scattered_pkts_vec, "Vector SSE Scattered" },
> + [ICE_RX_SSE] = { ice_recv_pkts_vec, "Vector SSE" },
> +#endif
> +};
Minor nit, but can we have the entries here in a defined order? Probably
best to use the order of the enum, which seems pretty logically arranged
from simplest to most complex (more or less).
> +
> void __rte_cold
> ice_set_rx_function(struct rte_eth_dev *dev)
> {
> PMD_INIT_FUNC_TRACE();
> struct ice_adapter *ad =
> ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
> +
> + /* The primary process selects the rx path for all processes. */
> + if (rte_eal_process_type() != RTE_PROC_PRIMARY)
> + goto out;
> +
> #ifdef RTE_ARCH_X86
> struct ci_rx_queue *rxq;
> int i;
> int rx_check_ret = -1;
> -
> - if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
> - ad->rx_use_avx512 = false;
> - ad->rx_use_avx2 = false;
> - rx_check_ret = ice_rx_vec_dev_check(dev);
> - if (ad->ptp_ena)
> - rx_check_ret = -1;
> - ad->rx_vec_offload_support =
> - (rx_check_ret == ICE_VECTOR_OFFLOAD_PATH);
> - if (rx_check_ret >= 0 && ad->rx_bulk_alloc_allowed &&
> - rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
> - ad->rx_vec_allowed = true;
> - for (i = 0; i < dev->data->nb_rx_queues; i++) {
> - rxq = dev->data->rx_queues[i];
> - if (rxq && ice_rxq_vec_setup(rxq)) {
> - ad->rx_vec_allowed = false;
> - break;
> - }
> + bool rx_use_avx512 = false, rx_use_avx2 = false;
> +
> + rx_check_ret = ice_rx_vec_dev_check(dev);
> + if (ad->ptp_ena)
> + rx_check_ret = -1;
> + ad->rx_vec_offload_support =
> + (rx_check_ret == ICE_VECTOR_OFFLOAD_PATH);
> + if (rx_check_ret >= 0 && ad->rx_bulk_alloc_allowed &&
> + rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
> + ad->rx_vec_allowed = true;
> + for (i = 0; i < dev->data->nb_rx_queues; i++) {
> + rxq = dev->data->rx_queues[i];
> + if (rxq && ice_rxq_vec_setup(rxq)) {
> + ad->rx_vec_allowed = false;
> + break;
> }
> + }
>
> - if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_512 &&
> - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&
> - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) == 1)
> + if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_512 &&
> + rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&
> + rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) == 1)
> #ifdef CC_AVX512_SUPPORT
> - ad->rx_use_avx512 = true;
> + rx_use_avx512 = true;
> #else
> - PMD_DRV_LOG(NOTICE,
> - "AVX512 is not supported in build env");
> + PMD_DRV_LOG(NOTICE,
> + "AVX512 is not supported in build env");
> #endif
> - if (!ad->rx_use_avx512 &&
> - (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||
> - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) &&
> - rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256)
> - ad->rx_use_avx2 = true;
> -
> - } else {
> - ad->rx_vec_allowed = false;
> - }
> + if (!rx_use_avx512 &&
> + (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||
> + rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) &&
Not sure if this is fixed later in the series, but should not need to check
for AVX512 when deciding whether or not to choose an AVX2 path. If AVX512
is present, AVX2 will be also, so the AVX2 check is sufficient.
> + rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256)
> + rx_use_avx2 = true;
> + } else {
> + ad->rx_vec_allowed = false;
> }
>
> if (ad->rx_vec_allowed) {
> if (dev->data->scattered_rx) {
> - if (ad->rx_use_avx512) {
> + if (rx_use_avx512) {
> #ifdef CC_AVX512_SUPPORT
> - if (ad->rx_vec_offload_support) {
> - PMD_DRV_LOG(NOTICE,
> - "Using AVX512 OFFLOAD Vector Scattered Rx (port %d).",
> - dev->data->port_id);
> - dev->rx_pkt_burst =
> - ice_recv_scattered_pkts_vec_avx512_offload;
> - } else {
> - PMD_DRV_LOG(NOTICE,
> - "Using AVX512 Vector Scattered Rx (port %d).",
> - dev->data->port_id);
> - dev->rx_pkt_burst =
> - ice_recv_scattered_pkts_vec_avx512;
> - }
> + if (ad->rx_vec_offload_support)
> + ad->rx_func_type = ICE_RX_AVX512_SCATTERED_OFFLOAD;
> + else
> + ad->rx_func_type = ICE_RX_AVX512_SCATTERED;
> #endif
> - } else if (ad->rx_use_avx2) {
> - if (ad->rx_vec_offload_support) {
> - PMD_DRV_LOG(NOTICE,
> - "Using AVX2 OFFLOAD Vector Scattered Rx (port %d).",
> - dev->data->port_id);
> - dev->rx_pkt_burst =
> - ice_recv_scattered_pkts_vec_avx2_offload;
> - } else {
> - PMD_DRV_LOG(NOTICE,
> - "Using AVX2 Vector Scattered Rx (port %d).",
> - dev->data->port_id);
> - dev->rx_pkt_burst =
> - ice_recv_scattered_pkts_vec_avx2;
> - }
> + } else if (rx_use_avx2) {
> + if (ad->rx_vec_offload_support)
> + ad->rx_func_type = ICE_RX_AVX2_SCATTERED_OFFLOAD;
> + else
> + ad->rx_func_type = ICE_RX_AVX2_SCATTERED;
> } else {
> - PMD_DRV_LOG(DEBUG,
> - "Using Vector Scattered Rx (port %d).",
> - dev->data->port_id);
> - dev->rx_pkt_burst = ice_recv_scattered_pkts_vec;
> + ad->rx_func_type = ICE_RX_SSE_SCATTERED;
> }
> } else {
> - if (ad->rx_use_avx512) {
> + if (rx_use_avx512) {
> #ifdef CC_AVX512_SUPPORT
> - if (ad->rx_vec_offload_support) {
> - PMD_DRV_LOG(NOTICE,
> - "Using AVX512 OFFLOAD Vector Rx (port %d).",
> - dev->data->port_id);
> - dev->rx_pkt_burst =
> - ice_recv_pkts_vec_avx512_offload;
> - } else {
> - PMD_DRV_LOG(NOTICE,
> - "Using AVX512 Vector Rx (port %d).",
> - dev->data->port_id);
> - dev->rx_pkt_burst =
> - ice_recv_pkts_vec_avx512;
> - }
> + if (ad->rx_vec_offload_support)
> + ad->rx_func_type = ICE_RX_AVX512_OFFLOAD;
> + else
> + ad->rx_func_type = ICE_RX_AVX512;
> #endif
> - } else if (ad->rx_use_avx2) {
> - if (ad->rx_vec_offload_support) {
> - PMD_DRV_LOG(NOTICE,
> - "Using AVX2 OFFLOAD Vector Rx (port %d).",
> - dev->data->port_id);
> - dev->rx_pkt_burst =
> - ice_recv_pkts_vec_avx2_offload;
> - } else {
> - PMD_DRV_LOG(NOTICE,
> - "Using AVX2 Vector Rx (port %d).",
> - dev->data->port_id);
> - dev->rx_pkt_burst =
> - ice_recv_pkts_vec_avx2;
> - }
> + } else if (rx_use_avx2) {
> + if (ad->rx_vec_offload_support)
> + ad->rx_func_type = ICE_RX_AVX2_OFFLOAD;
> + else
> + ad->rx_func_type = ICE_RX_AVX2;
> } else {
> - PMD_DRV_LOG(DEBUG,
> - "Using Vector Rx (port %d).",
> - dev->data->port_id);
> - dev->rx_pkt_burst = ice_recv_pkts_vec;
> + ad->rx_func_type = ICE_RX_SSE;
> }
> }
> - return;
> + goto out;
> }
>
> #endif
>
> - if (dev->data->scattered_rx) {
> + if (dev->data->scattered_rx)
> /* Set the non-LRO scattered function */
> - PMD_INIT_LOG(DEBUG,
> - "Using a Scattered function on port %d.",
> - dev->data->port_id);
> - dev->rx_pkt_burst = ice_recv_scattered_pkts;
> - } else if (ad->rx_bulk_alloc_allowed) {
> - PMD_INIT_LOG(DEBUG,
> - "Rx Burst Bulk Alloc Preconditions are "
> - "satisfied. Rx Burst Bulk Alloc function "
> - "will be used on port %d.",
> - dev->data->port_id);
> - dev->rx_pkt_burst = ice_recv_pkts_bulk_alloc;
> - } else {
> - PMD_INIT_LOG(DEBUG,
> - "Rx Burst Bulk Alloc Preconditions are not "
> - "satisfied, Normal Rx will be used on port %d.",
> - dev->data->port_id);
> - dev->rx_pkt_burst = ice_recv_pkts;
> - }
> -}
> + ad->rx_func_type = ICE_RX_SCATTERED;
> + else if (ad->rx_bulk_alloc_allowed)
> + ad->rx_func_type = ICE_RX_BULK_ALLOC;
> + else
> + ad->rx_func_type = ICE_RX_DEFAULT;
>
> -static const struct {
> - eth_rx_burst_t pkt_burst;
> - const char *info;
> -} ice_rx_burst_infos[] = {
> - { ice_recv_scattered_pkts, "Scalar Scattered" },
> - { ice_recv_pkts_bulk_alloc, "Scalar Bulk Alloc" },
> - { ice_recv_pkts, "Scalar" },
> -#ifdef RTE_ARCH_X86
> -#ifdef CC_AVX512_SUPPORT
> - { ice_recv_scattered_pkts_vec_avx512, "Vector AVX512 Scattered" },
> - { ice_recv_scattered_pkts_vec_avx512_offload, "Offload Vector AVX512 Scattered" },
> - { ice_recv_pkts_vec_avx512, "Vector AVX512" },
> - { ice_recv_pkts_vec_avx512_offload, "Offload Vector AVX512" },
> -#endif
> - { ice_recv_scattered_pkts_vec_avx2, "Vector AVX2 Scattered" },
> - { ice_recv_scattered_pkts_vec_avx2_offload, "Offload Vector AVX2 Scattered" },
> - { ice_recv_pkts_vec_avx2, "Vector AVX2" },
> - { ice_recv_pkts_vec_avx2_offload, "Offload Vector AVX2" },
> - { ice_recv_scattered_pkts_vec, "Vector SSE Scattered" },
> - { ice_recv_pkts_vec, "Vector SSE" },
> -#endif
> -};
> +out:
> + dev->rx_pkt_burst = ice_rx_burst_infos[ad->rx_func_type].pkt_burst;
> + PMD_DRV_LOG(NOTICE, "Using %s Rx burst function (port %d).",
> + ice_rx_burst_infos[ad->rx_func_type].info, dev->data->port_id);
> +}
>
> int
> ice_rx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id,
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 24+ messages in thread
* [RFC PATCH 02/14] net/iavf: rename Rx/Tx function type variables
2025-07-25 12:49 [RFC PATCH 00/14] net/intel: rx path selection simplification Ciara Loftus
2025-07-25 12:49 ` [RFC PATCH 01/14] net/ice: use the same Rx path across process types Ciara Loftus
@ 2025-07-25 12:49 ` Ciara Loftus
2025-07-25 13:40 ` Bruce Richardson
2025-07-25 12:49 ` [RFC PATCH 03/14] net/iavf: use the same Rx path across process types Ciara Loftus
` (11 subsequent siblings)
13 siblings, 1 reply; 24+ messages in thread
From: Ciara Loftus @ 2025-07-25 12:49 UTC (permalink / raw)
To: dev; +Cc: Ciara Loftus
Rename variables from burst_type to func_type to better reflect
the information the variables are storing.
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
drivers/net/intel/iavf/iavf.h | 8 +-
drivers/net/intel/iavf/iavf_rxtx.c | 114 ++++++++++++++---------------
2 files changed, 61 insertions(+), 61 deletions(-)
diff --git a/drivers/net/intel/iavf/iavf.h b/drivers/net/intel/iavf/iavf.h
index f81c939c96..dacfb92d5f 100644
--- a/drivers/net/intel/iavf/iavf.h
+++ b/drivers/net/intel/iavf/iavf.h
@@ -320,7 +320,7 @@ struct iavf_devargs {
struct iavf_security_ctx;
-enum iavf_rx_burst_type {
+enum iavf_rx_func_type {
IAVF_RX_DISABLED,
IAVF_RX_DEFAULT,
IAVF_RX_FLEX_RXD,
@@ -349,7 +349,7 @@ enum iavf_rx_burst_type {
IAVF_RX_AVX512_SCATTERED_FLEX_RXD_OFFLOAD,
};
-enum iavf_tx_burst_type {
+enum iavf_tx_func_type {
IAVF_TX_DISABLED,
IAVF_TX_DEFAULT,
IAVF_TX_SSE,
@@ -381,8 +381,8 @@ struct iavf_adapter {
bool stopped;
bool closed;
bool no_poll;
- enum iavf_rx_burst_type rx_burst_type;
- enum iavf_tx_burst_type tx_burst_type;
+ enum iavf_rx_func_type rx_func_type;
+ enum iavf_tx_func_type tx_func_type;
uint16_t fdir_ref_cnt;
struct iavf_devargs devargs;
};
diff --git a/drivers/net/intel/iavf/iavf_rxtx.c b/drivers/net/intel/iavf/iavf_rxtx.c
index 7033a74610..57f7a4b67d 100644
--- a/drivers/net/intel/iavf/iavf_rxtx.c
+++ b/drivers/net/intel/iavf/iavf_rxtx.c
@@ -3826,14 +3826,14 @@ iavf_recv_pkts_no_poll(void *rx_queue, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts)
{
struct ci_rx_queue *rxq = rx_queue;
- enum iavf_rx_burst_type rx_burst_type;
+ enum iavf_rx_func_type rx_func_type;
if (!rxq->iavf_vsi || rxq->iavf_vsi->adapter->no_poll)
return 0;
- rx_burst_type = rxq->iavf_vsi->adapter->rx_burst_type;
+ rx_func_type = rxq->iavf_vsi->adapter->rx_func_type;
- return iavf_rx_pkt_burst_ops[rx_burst_type].pkt_burst(rx_queue,
+ return iavf_rx_pkt_burst_ops[rx_func_type].pkt_burst(rx_queue,
rx_pkts, nb_pkts);
}
@@ -3842,14 +3842,14 @@ iavf_xmit_pkts_no_poll(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
struct ci_tx_queue *txq = tx_queue;
- enum iavf_tx_burst_type tx_burst_type;
+ enum iavf_tx_func_type tx_func_type;
if (!txq->iavf_vsi || txq->iavf_vsi->adapter->no_poll)
return 0;
- tx_burst_type = txq->iavf_vsi->adapter->tx_burst_type;
+ tx_func_type = txq->iavf_vsi->adapter->tx_func_type;
- return iavf_tx_pkt_burst_ops[tx_burst_type].pkt_burst(tx_queue,
+ return iavf_tx_pkt_burst_ops[tx_func_type].pkt_burst(tx_queue,
tx_pkts, nb_pkts);
}
@@ -3866,8 +3866,8 @@ iavf_xmit_pkts_check(void *tx_queue, struct rte_mbuf **tx_pkts,
bool pkt_error = false;
struct ci_tx_queue *txq = tx_queue;
struct iavf_adapter *adapter = txq->iavf_vsi->adapter;
- enum iavf_tx_burst_type tx_burst_type =
- txq->iavf_vsi->adapter->tx_burst_type;
+ enum iavf_tx_func_type tx_func_type =
+ txq->iavf_vsi->adapter->tx_func_type;
for (idx = 0; idx < nb_pkts; idx++) {
mb = tx_pkts[idx];
@@ -3934,7 +3934,7 @@ iavf_xmit_pkts_check(void *tx_queue, struct rte_mbuf **tx_pkts,
return 0;
}
- return iavf_tx_pkt_burst_ops[tx_burst_type].pkt_burst(tx_queue, tx_pkts, good_pkts);
+ return iavf_tx_pkt_burst_ops[tx_func_type].pkt_burst(tx_queue, tx_pkts, good_pkts);
}
/* choose rx function*/
@@ -3944,7 +3944,7 @@ iavf_set_rx_function(struct rte_eth_dev *dev)
struct iavf_adapter *adapter =
IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
- enum iavf_rx_burst_type rx_burst_type;
+ enum iavf_rx_func_type rx_func_type;
int no_poll_on_link_down = adapter->devargs.no_poll_on_link_down;
int i;
struct ci_rx_queue *rxq;
@@ -4015,42 +4015,42 @@ iavf_set_rx_function(struct rte_eth_dev *dev)
}
}
if (use_flex) {
- rx_burst_type = IAVF_RX_SSE_SCATTERED_FLEX_RXD;
+ rx_func_type = IAVF_RX_SSE_SCATTERED_FLEX_RXD;
if (use_avx2) {
if (check_ret == IAVF_VECTOR_PATH)
- rx_burst_type =
+ rx_func_type =
IAVF_RX_AVX2_SCATTERED_FLEX_RXD;
else
- rx_burst_type =
+ rx_func_type =
IAVF_RX_AVX2_SCATTERED_FLEX_RXD_OFFLOAD;
}
#ifdef CC_AVX512_SUPPORT
if (use_avx512) {
if (check_ret == IAVF_VECTOR_PATH)
- rx_burst_type =
+ rx_func_type =
IAVF_RX_AVX512_SCATTERED_FLEX_RXD;
else
- rx_burst_type =
+ rx_func_type =
IAVF_RX_AVX512_SCATTERED_FLEX_RXD_OFFLOAD;
}
#endif
} else {
- rx_burst_type = IAVF_RX_SSE_SCATTERED;
+ rx_func_type = IAVF_RX_SSE_SCATTERED;
if (use_avx2) {
if (check_ret == IAVF_VECTOR_PATH)
- rx_burst_type =
+ rx_func_type =
IAVF_RX_AVX2_SCATTERED;
else
- rx_burst_type =
+ rx_func_type =
IAVF_RX_AVX2_SCATTERED_OFFLOAD;
}
#ifdef CC_AVX512_SUPPORT
if (use_avx512) {
if (check_ret == IAVF_VECTOR_PATH)
- rx_burst_type =
+ rx_func_type =
IAVF_RX_AVX512_SCATTERED;
else
- rx_burst_type =
+ rx_func_type =
IAVF_RX_AVX512_SCATTERED_OFFLOAD;
}
#endif
@@ -4081,46 +4081,46 @@ iavf_set_rx_function(struct rte_eth_dev *dev)
}
}
if (use_flex) {
- rx_burst_type = IAVF_RX_SSE_FLEX_RXD;
+ rx_func_type = IAVF_RX_SSE_FLEX_RXD;
if (use_avx2) {
if (check_ret == IAVF_VECTOR_PATH)
- rx_burst_type = IAVF_RX_AVX2_FLEX_RXD;
+ rx_func_type = IAVF_RX_AVX2_FLEX_RXD;
else
- rx_burst_type = IAVF_RX_AVX2_FLEX_RXD_OFFLOAD;
+ rx_func_type = IAVF_RX_AVX2_FLEX_RXD_OFFLOAD;
}
#ifdef CC_AVX512_SUPPORT
if (use_avx512) {
if (check_ret == IAVF_VECTOR_PATH)
- rx_burst_type = IAVF_RX_AVX512_FLEX_RXD;
+ rx_func_type = IAVF_RX_AVX512_FLEX_RXD;
else
- rx_burst_type =
+ rx_func_type =
IAVF_RX_AVX512_FLEX_RXD_OFFLOAD;
}
#endif
} else {
- rx_burst_type = IAVF_RX_SSE;
+ rx_func_type = IAVF_RX_SSE;
if (use_avx2) {
if (check_ret == IAVF_VECTOR_PATH)
- rx_burst_type = IAVF_RX_AVX2;
+ rx_func_type = IAVF_RX_AVX2;
else
- rx_burst_type = IAVF_RX_AVX2_OFFLOAD;
+ rx_func_type = IAVF_RX_AVX2_OFFLOAD;
}
#ifdef CC_AVX512_SUPPORT
if (use_avx512) {
if (check_ret == IAVF_VECTOR_PATH)
- rx_burst_type = IAVF_RX_AVX512;
+ rx_func_type = IAVF_RX_AVX512;
else
- rx_burst_type = IAVF_RX_AVX512_OFFLOAD;
+ rx_func_type = IAVF_RX_AVX512_OFFLOAD;
}
#endif
}
}
if (no_poll_on_link_down) {
- adapter->rx_burst_type = rx_burst_type;
+ adapter->rx_func_type = rx_func_type;
dev->rx_pkt_burst = iavf_recv_pkts_no_poll;
} else {
- dev->rx_pkt_burst = iavf_rx_pkt_burst_ops[rx_burst_type].pkt_burst;
+ dev->rx_pkt_burst = iavf_rx_pkt_burst_ops[rx_func_type].pkt_burst;
}
return;
}
@@ -4136,13 +4136,13 @@ iavf_set_rx_function(struct rte_eth_dev *dev)
rxq = dev->data->rx_queues[i];
(void)iavf_rxq_vec_setup(rxq);
}
- rx_burst_type = IAVF_RX_SSE;
+ rx_func_type = IAVF_RX_SSE;
if (no_poll_on_link_down) {
- adapter->rx_burst_type = rx_burst_type;
+ adapter->rx_func_type = rx_func_type;
dev->rx_pkt_burst = iavf_recv_pkts_no_poll;
} else {
- dev->rx_pkt_burst = iavf_rx_pkt_burst_ops[rx_burst_type].pkt_burst;
+ dev->rx_pkt_burst = iavf_rx_pkt_burst_ops[rx_func_type].pkt_burst;
}
return;
}
@@ -4151,27 +4151,27 @@ iavf_set_rx_function(struct rte_eth_dev *dev)
PMD_DRV_LOG(DEBUG, "Using a Scattered Rx callback (port=%d).",
dev->data->port_id);
if (use_flex)
- rx_burst_type = IAVF_RX_SCATTERED_FLEX_RXD;
+ rx_func_type = IAVF_RX_SCATTERED_FLEX_RXD;
else
- rx_burst_type = IAVF_RX_SCATTERED;
+ rx_func_type = IAVF_RX_SCATTERED;
} else if (adapter->rx_bulk_alloc_allowed) {
PMD_DRV_LOG(DEBUG, "Using bulk Rx callback (port=%d).",
dev->data->port_id);
- rx_burst_type = IAVF_RX_BULK_ALLOC;
+ rx_func_type = IAVF_RX_BULK_ALLOC;
} else {
PMD_DRV_LOG(DEBUG, "Using Basic Rx callback (port=%d).",
dev->data->port_id);
if (use_flex)
- rx_burst_type = IAVF_RX_FLEX_RXD;
+ rx_func_type = IAVF_RX_FLEX_RXD;
else
- rx_burst_type = IAVF_RX_DEFAULT;
+ rx_func_type = IAVF_RX_DEFAULT;
}
if (no_poll_on_link_down) {
- adapter->rx_burst_type = rx_burst_type;
+ adapter->rx_func_type = rx_func_type;
dev->rx_pkt_burst = iavf_recv_pkts_no_poll;
} else {
- dev->rx_pkt_burst = iavf_rx_pkt_burst_ops[rx_burst_type].pkt_burst;
+ dev->rx_pkt_burst = iavf_rx_pkt_burst_ops[rx_func_type].pkt_burst;
}
}
@@ -4181,7 +4181,7 @@ iavf_set_tx_function(struct rte_eth_dev *dev)
{
struct iavf_adapter *adapter =
IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
- enum iavf_tx_burst_type tx_burst_type;
+ enum iavf_tx_func_type tx_func_type;
int mbuf_check = adapter->devargs.mbuf_check;
int no_poll_on_link_down = adapter->devargs.no_poll_on_link_down;
#ifdef RTE_ARCH_X86
@@ -4217,11 +4217,11 @@ iavf_set_tx_function(struct rte_eth_dev *dev)
if (use_sse) {
PMD_DRV_LOG(DEBUG, "Using Vector Tx (port %d).",
dev->data->port_id);
- tx_burst_type = IAVF_TX_SSE;
+ tx_func_type = IAVF_TX_SSE;
}
if (use_avx2) {
if (check_ret == IAVF_VECTOR_PATH) {
- tx_burst_type = IAVF_TX_AVX2;
+ tx_func_type = IAVF_TX_AVX2;
PMD_DRV_LOG(DEBUG, "Using AVX2 Vector Tx (port %d).",
dev->data->port_id);
} else if (check_ret == IAVF_VECTOR_CTX_OFFLOAD_PATH) {
@@ -4229,7 +4229,7 @@ iavf_set_tx_function(struct rte_eth_dev *dev)
"AVX2 does not support outer checksum offload.");
goto normal;
} else {
- tx_burst_type = IAVF_TX_AVX2_OFFLOAD;
+ tx_func_type = IAVF_TX_AVX2_OFFLOAD;
PMD_DRV_LOG(DEBUG, "Using AVX2 OFFLOAD Vector Tx (port %d).",
dev->data->port_id);
}
@@ -4237,19 +4237,19 @@ iavf_set_tx_function(struct rte_eth_dev *dev)
#ifdef CC_AVX512_SUPPORT
if (use_avx512) {
if (check_ret == IAVF_VECTOR_PATH) {
- tx_burst_type = IAVF_TX_AVX512;
+ tx_func_type = IAVF_TX_AVX512;
PMD_DRV_LOG(DEBUG, "Using AVX512 Vector Tx (port %d).",
dev->data->port_id);
} else if (check_ret == IAVF_VECTOR_OFFLOAD_PATH) {
- tx_burst_type = IAVF_TX_AVX512_OFFLOAD;
+ tx_func_type = IAVF_TX_AVX512_OFFLOAD;
PMD_DRV_LOG(DEBUG, "Using AVX512 OFFLOAD Vector Tx (port %d).",
dev->data->port_id);
} else if (check_ret == IAVF_VECTOR_CTX_PATH) {
- tx_burst_type = IAVF_TX_AVX512_CTX;
+ tx_func_type = IAVF_TX_AVX512_CTX;
PMD_DRV_LOG(DEBUG, "Using AVX512 CONTEXT Vector Tx (port %d).",
dev->data->port_id);
} else {
- tx_burst_type = IAVF_TX_AVX512_CTX_OFFLOAD;
+ tx_func_type = IAVF_TX_AVX512_CTX_OFFLOAD;
PMD_DRV_LOG(DEBUG, "Using AVX512 CONTEXT OFFLOAD Vector Tx (port %d).",
dev->data->port_id);
}
@@ -4264,13 +4264,13 @@ iavf_set_tx_function(struct rte_eth_dev *dev)
}
if (no_poll_on_link_down) {
- adapter->tx_burst_type = tx_burst_type;
+ adapter->tx_func_type = tx_func_type;
dev->tx_pkt_burst = iavf_xmit_pkts_no_poll;
} else if (mbuf_check) {
- adapter->tx_burst_type = tx_burst_type;
+ adapter->tx_func_type = tx_func_type;
dev->tx_pkt_burst = iavf_xmit_pkts_check;
} else {
- dev->tx_pkt_burst = iavf_tx_pkt_burst_ops[tx_burst_type].pkt_burst;
+ dev->tx_pkt_burst = iavf_tx_pkt_burst_ops[tx_func_type].pkt_burst;
}
return;
}
@@ -4279,16 +4279,16 @@ iavf_set_tx_function(struct rte_eth_dev *dev)
#endif
PMD_DRV_LOG(DEBUG, "Using Basic Tx callback (port=%d).",
dev->data->port_id);
- tx_burst_type = IAVF_TX_DEFAULT;
+ tx_func_type = IAVF_TX_DEFAULT;
if (no_poll_on_link_down) {
- adapter->tx_burst_type = tx_burst_type;
+ adapter->tx_func_type = tx_func_type;
dev->tx_pkt_burst = iavf_xmit_pkts_no_poll;
} else if (mbuf_check) {
- adapter->tx_burst_type = tx_burst_type;
+ adapter->tx_func_type = tx_func_type;
dev->tx_pkt_burst = iavf_xmit_pkts_check;
} else {
- dev->tx_pkt_burst = iavf_tx_pkt_burst_ops[tx_burst_type].pkt_burst;
+ dev->tx_pkt_burst = iavf_tx_pkt_burst_ops[tx_func_type].pkt_burst;
}
}
--
2.34.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [RFC PATCH 03/14] net/iavf: use the same Rx path across process types
2025-07-25 12:49 [RFC PATCH 00/14] net/intel: rx path selection simplification Ciara Loftus
2025-07-25 12:49 ` [RFC PATCH 01/14] net/ice: use the same Rx path across process types Ciara Loftus
2025-07-25 12:49 ` [RFC PATCH 02/14] net/iavf: rename Rx/Tx function type variables Ciara Loftus
@ 2025-07-25 12:49 ` Ciara Loftus
2025-07-25 13:41 ` Bruce Richardson
2025-07-25 12:49 ` [RFC PATCH 04/14] net/i40e: " Ciara Loftus
` (10 subsequent siblings)
13 siblings, 1 reply; 24+ messages in thread
From: Ciara Loftus @ 2025-07-25 12:49 UTC (permalink / raw)
To: dev; +Cc: Ciara Loftus
In the interest of simplicity, let the primary process select the Rx
path to be used by all processes using the given device.
The many logs which report individual Rx path selections have been
consolidated into one single log
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
drivers/net/intel/iavf/iavf_rxtx.c | 142 ++++++++---------------------
1 file changed, 40 insertions(+), 102 deletions(-)
diff --git a/drivers/net/intel/iavf/iavf_rxtx.c b/drivers/net/intel/iavf/iavf_rxtx.c
index 57f7a4b67d..3329499e59 100644
--- a/drivers/net/intel/iavf/iavf_rxtx.c
+++ b/drivers/net/intel/iavf/iavf_rxtx.c
@@ -3944,12 +3944,15 @@ iavf_set_rx_function(struct rte_eth_dev *dev)
struct iavf_adapter *adapter =
IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
- enum iavf_rx_func_type rx_func_type;
int no_poll_on_link_down = adapter->devargs.no_poll_on_link_down;
int i;
struct ci_rx_queue *rxq;
bool use_flex = true;
+ /* The primary process selects the rx path for all processes. */
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ goto out;
+
for (i = 0; i < dev->data->nb_rx_queues; i++) {
rxq = dev->data->rx_queues[i];
if (rxq->rxdid <= IAVF_RXDID_LEGACY_1) {
@@ -3989,140 +3992,85 @@ iavf_set_rx_function(struct rte_eth_dev *dev)
}
if (dev->data->scattered_rx) {
- if (!use_avx2 && !use_avx512) {
- PMD_DRV_LOG(DEBUG,
- "Using Vector Scattered Rx (port %d).",
- dev->data->port_id);
- } else {
- if (use_avx2) {
- if (check_ret == IAVF_VECTOR_PATH)
- PMD_DRV_LOG(DEBUG,
- "Using AVX2 Vector Scattered Rx (port %d).",
- dev->data->port_id);
- else
- PMD_DRV_LOG(DEBUG,
- "Using AVX2 OFFLOAD Vector Scattered Rx (port %d).",
- dev->data->port_id);
- } else {
- if (check_ret == IAVF_VECTOR_PATH)
- PMD_DRV_LOG(DEBUG,
- "Using AVX512 Vector Scattered Rx (port %d).",
- dev->data->port_id);
- else
- PMD_DRV_LOG(DEBUG,
- "Using AVX512 OFFLOAD Vector Scattered Rx (port %d).",
- dev->data->port_id);
- }
- }
if (use_flex) {
- rx_func_type = IAVF_RX_SSE_SCATTERED_FLEX_RXD;
+ adapter->rx_func_type = IAVF_RX_SSE_SCATTERED_FLEX_RXD;
if (use_avx2) {
if (check_ret == IAVF_VECTOR_PATH)
- rx_func_type =
+ adapter->rx_func_type =
IAVF_RX_AVX2_SCATTERED_FLEX_RXD;
else
- rx_func_type =
+ adapter->rx_func_type =
IAVF_RX_AVX2_SCATTERED_FLEX_RXD_OFFLOAD;
}
#ifdef CC_AVX512_SUPPORT
if (use_avx512) {
if (check_ret == IAVF_VECTOR_PATH)
- rx_func_type =
+ adapter->rx_func_type =
IAVF_RX_AVX512_SCATTERED_FLEX_RXD;
else
- rx_func_type =
+ adapter->rx_func_type =
IAVF_RX_AVX512_SCATTERED_FLEX_RXD_OFFLOAD;
}
#endif
} else {
- rx_func_type = IAVF_RX_SSE_SCATTERED;
+ adapter->rx_func_type = IAVF_RX_SSE_SCATTERED;
if (use_avx2) {
if (check_ret == IAVF_VECTOR_PATH)
- rx_func_type =
+ adapter->rx_func_type =
IAVF_RX_AVX2_SCATTERED;
else
- rx_func_type =
+ adapter->rx_func_type =
IAVF_RX_AVX2_SCATTERED_OFFLOAD;
}
#ifdef CC_AVX512_SUPPORT
if (use_avx512) {
if (check_ret == IAVF_VECTOR_PATH)
- rx_func_type =
+ adapter->rx_func_type =
IAVF_RX_AVX512_SCATTERED;
else
- rx_func_type =
+ adapter->rx_func_type =
IAVF_RX_AVX512_SCATTERED_OFFLOAD;
}
#endif
}
} else {
- if (!use_avx2 && !use_avx512) {
- PMD_DRV_LOG(DEBUG, "Using Vector Rx (port %d).",
- dev->data->port_id);
- } else {
- if (use_avx2) {
- if (check_ret == IAVF_VECTOR_PATH)
- PMD_DRV_LOG(DEBUG,
- "Using AVX2 Vector Rx (port %d).",
- dev->data->port_id);
- else
- PMD_DRV_LOG(DEBUG,
- "Using AVX2 OFFLOAD Vector Rx (port %d).",
- dev->data->port_id);
- } else {
- if (check_ret == IAVF_VECTOR_PATH)
- PMD_DRV_LOG(DEBUG,
- "Using AVX512 Vector Rx (port %d).",
- dev->data->port_id);
- else
- PMD_DRV_LOG(DEBUG,
- "Using AVX512 OFFLOAD Vector Rx (port %d).",
- dev->data->port_id);
- }
- }
if (use_flex) {
- rx_func_type = IAVF_RX_SSE_FLEX_RXD;
+ adapter->rx_func_type = IAVF_RX_SSE_FLEX_RXD;
if (use_avx2) {
if (check_ret == IAVF_VECTOR_PATH)
- rx_func_type = IAVF_RX_AVX2_FLEX_RXD;
+ adapter->rx_func_type = IAVF_RX_AVX2_FLEX_RXD;
else
- rx_func_type = IAVF_RX_AVX2_FLEX_RXD_OFFLOAD;
+ adapter->rx_func_type =
+ IAVF_RX_AVX2_FLEX_RXD_OFFLOAD;
}
#ifdef CC_AVX512_SUPPORT
if (use_avx512) {
if (check_ret == IAVF_VECTOR_PATH)
- rx_func_type = IAVF_RX_AVX512_FLEX_RXD;
+ adapter->rx_func_type = IAVF_RX_AVX512_FLEX_RXD;
else
- rx_func_type =
+ adapter->rx_func_type =
IAVF_RX_AVX512_FLEX_RXD_OFFLOAD;
}
#endif
} else {
- rx_func_type = IAVF_RX_SSE;
+ adapter->rx_func_type = IAVF_RX_SSE;
if (use_avx2) {
if (check_ret == IAVF_VECTOR_PATH)
- rx_func_type = IAVF_RX_AVX2;
+ adapter->rx_func_type = IAVF_RX_AVX2;
else
- rx_func_type = IAVF_RX_AVX2_OFFLOAD;
+ adapter->rx_func_type = IAVF_RX_AVX2_OFFLOAD;
}
#ifdef CC_AVX512_SUPPORT
if (use_avx512) {
if (check_ret == IAVF_VECTOR_PATH)
- rx_func_type = IAVF_RX_AVX512;
+ adapter->rx_func_type = IAVF_RX_AVX512;
else
- rx_func_type = IAVF_RX_AVX512_OFFLOAD;
+ adapter->rx_func_type = IAVF_RX_AVX512_OFFLOAD;
}
#endif
}
}
-
- if (no_poll_on_link_down) {
- adapter->rx_func_type = rx_func_type;
- dev->rx_pkt_burst = iavf_recv_pkts_no_poll;
- } else {
- dev->rx_pkt_burst = iavf_rx_pkt_burst_ops[rx_func_type].pkt_burst;
- }
- return;
+ goto out;
}
#elif defined RTE_ARCH_ARM
int check_ret;
@@ -4136,43 +4084,33 @@ iavf_set_rx_function(struct rte_eth_dev *dev)
rxq = dev->data->rx_queues[i];
(void)iavf_rxq_vec_setup(rxq);
}
- rx_func_type = IAVF_RX_SSE;
+ adapter->rx_func_type = IAVF_RX_SSE;
- if (no_poll_on_link_down) {
- adapter->rx_func_type = rx_func_type;
- dev->rx_pkt_burst = iavf_recv_pkts_no_poll;
- } else {
- dev->rx_pkt_burst = iavf_rx_pkt_burst_ops[rx_func_type].pkt_burst;
- }
- return;
+ goto out;
}
#endif
if (dev->data->scattered_rx) {
- PMD_DRV_LOG(DEBUG, "Using a Scattered Rx callback (port=%d).",
- dev->data->port_id);
if (use_flex)
- rx_func_type = IAVF_RX_SCATTERED_FLEX_RXD;
+ adapter->rx_func_type = IAVF_RX_SCATTERED_FLEX_RXD;
else
- rx_func_type = IAVF_RX_SCATTERED;
+ adapter->rx_func_type = IAVF_RX_SCATTERED;
} else if (adapter->rx_bulk_alloc_allowed) {
- PMD_DRV_LOG(DEBUG, "Using bulk Rx callback (port=%d).",
- dev->data->port_id);
- rx_func_type = IAVF_RX_BULK_ALLOC;
+ adapter->rx_func_type = IAVF_RX_BULK_ALLOC;
} else {
- PMD_DRV_LOG(DEBUG, "Using Basic Rx callback (port=%d).",
- dev->data->port_id);
if (use_flex)
- rx_func_type = IAVF_RX_FLEX_RXD;
+ adapter->rx_func_type = IAVF_RX_FLEX_RXD;
else
- rx_func_type = IAVF_RX_DEFAULT;
+ adapter->rx_func_type = IAVF_RX_DEFAULT;
}
- if (no_poll_on_link_down) {
- adapter->rx_func_type = rx_func_type;
+out:
+ if (no_poll_on_link_down)
dev->rx_pkt_burst = iavf_recv_pkts_no_poll;
- } else {
- dev->rx_pkt_burst = iavf_rx_pkt_burst_ops[rx_func_type].pkt_burst;
- }
+ else
+ dev->rx_pkt_burst = iavf_rx_pkt_burst_ops[adapter->rx_func_type].pkt_burst;
+
+ PMD_DRV_LOG(NOTICE, "Using %s Rx burst function (port %d).",
+ iavf_rx_pkt_burst_ops[adapter->rx_func_type].info, dev->data->port_id);
}
/* choose tx function*/
--
2.34.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [RFC PATCH 04/14] net/i40e: use the same Rx path across process types
2025-07-25 12:49 [RFC PATCH 00/14] net/intel: rx path selection simplification Ciara Loftus
` (2 preceding siblings ...)
2025-07-25 12:49 ` [RFC PATCH 03/14] net/iavf: use the same Rx path across process types Ciara Loftus
@ 2025-07-25 12:49 ` Ciara Loftus
2025-07-25 13:43 ` Bruce Richardson
2025-07-25 12:49 ` [RFC PATCH 05/14] net/intel: introduce common vector capability function Ciara Loftus
` (9 subsequent siblings)
13 siblings, 1 reply; 24+ messages in thread
From: Ciara Loftus @ 2025-07-25 12:49 UTC (permalink / raw)
To: dev; +Cc: Ciara Loftus
In the interest of simplicity, let the primary process select the Rx
path to be used by all processes using the given device.
The many logs which report individual Rx path selections have been
consolidated into one single log
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
drivers/net/intel/i40e/i40e_ethdev.h | 20 +++-
drivers/net/intel/i40e/i40e_rxtx.c | 168 ++++++++++++---------------
2 files changed, 93 insertions(+), 95 deletions(-)
diff --git a/drivers/net/intel/i40e/i40e_ethdev.h b/drivers/net/intel/i40e/i40e_ethdev.h
index 44864292d0..308039c363 100644
--- a/drivers/net/intel/i40e/i40e_ethdev.h
+++ b/drivers/net/intel/i40e/i40e_ethdev.h
@@ -1226,6 +1226,22 @@ struct i40e_vsi_vlan_pvid_info {
#define I40E_MBUF_CHECK_F_TX_SEGMENT (1ULL << 2)
#define I40E_MBUF_CHECK_F_TX_OFFLOAD (1ULL << 3)
+enum i40e_rx_func_type {
+ I40E_RX_DEFAULT,
+ I40E_RX_BULK_ALLOC,
+ I40E_RX_SCATTERED,
+ I40E_RX_SSE,
+ I40E_RX_AVX2,
+ I40E_RX_SSE_SCATTERED,
+ I40E_RX_AVX2_SCATTERED,
+ I40E_RX_AVX512,
+ I40E_RX_AVX512_SCATTERED,
+ I40E_RX_NEON,
+ I40E_RX_NEON_SCATTERED,
+ I40E_RX_ALTIVEC,
+ I40E_RX_ALTIVEC_SCATTERED,
+};
+
/*
* Structure to store private data for each PF/VF instance.
*/
@@ -1242,6 +1258,8 @@ struct i40e_adapter {
bool tx_simple_allowed;
bool tx_vec_allowed;
+ enum i40e_rx_func_type rx_func_type;
+
uint64_t mbuf_check; /* mbuf check flags. */
uint16_t max_pkt_len; /* Maximum packet length */
eth_tx_burst_t tx_pkt_burst;
@@ -1262,8 +1280,6 @@ struct i40e_adapter {
uint8_t rss_reta_updated;
/* used only on x86, zero on other architectures */
- bool rx_use_avx2;
- bool rx_use_avx512;
bool tx_use_avx2;
bool tx_use_avx512;
};
diff --git a/drivers/net/intel/i40e/i40e_rxtx.c b/drivers/net/intel/i40e/i40e_rxtx.c
index aba3c11ee5..bcf5af50e6 100644
--- a/drivers/net/intel/i40e/i40e_rxtx.c
+++ b/drivers/net/intel/i40e/i40e_rxtx.c
@@ -3310,6 +3310,31 @@ get_avx_supported(bool request_avx512)
}
#endif /* RTE_ARCH_X86 */
+static const struct {
+ eth_rx_burst_t pkt_burst;
+ const char *info;
+} i40e_rx_burst_infos[] = {
+ [I40E_RX_SCATTERED] = { i40e_recv_scattered_pkts, "Scalar Scattered" },
+ [I40E_RX_BULK_ALLOC] = { i40e_recv_pkts_bulk_alloc, "Scalar Bulk Alloc" },
+ [I40E_RX_DEFAULT] = { i40e_recv_pkts, "Scalar" },
+#ifdef RTE_ARCH_X86
+#ifdef CC_AVX512_SUPPORT
+ [I40E_RX_AVX512_SCATTERED] = {
+ i40e_recv_scattered_pkts_vec_avx512, "Vector AVX512 Scattered" },
+ [I40E_RX_AVX512] = { i40e_recv_pkts_vec_avx512, "Vector AVX512" },
+#endif
+ [I40E_RX_AVX2_SCATTERED] = { i40e_recv_scattered_pkts_vec_avx2, "Vector AVX2 Scattered" },
+ [I40E_RX_AVX2] = { i40e_recv_pkts_vec_avx2, "Vector AVX2" },
+ [I40E_RX_SSE_SCATTERED] = { i40e_recv_scattered_pkts_vec, "Vector SSE Scattered" },
+ [I40E_RX_SSE] = { i40e_recv_pkts_vec, "Vector SSE" },
+#elif defined(RTE_ARCH_ARM64)
+ [I40E_RX_NEON_SCATTERED] = { i40e_recv_scattered_pkts_vec, "Vector Neon Scattered" },
+ [I40E_RX_NEON] = { i40e_recv_pkts_vec, "Vector Neon" },
+#elif defined(RTE_ARCH_PPC_64)
+ [I40E_RX_ALTIVEC_SCATTERED] = { i40e_recv_scattered_pkts_vec, "Vector AltiVec Scattered" },
+ [I40E_RX_ALTIVEC] = { i40e_recv_pkts_vec, "Vector AltiVec" },
+#endif
+};
void __rte_cold
i40e_set_rx_function(struct rte_eth_dev *dev)
@@ -3317,109 +3342,86 @@ i40e_set_rx_function(struct rte_eth_dev *dev)
struct i40e_adapter *ad =
I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
uint16_t vector_rx, i;
+
+ /* The primary process selects the rx path for all processes. */
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ goto out;
+
/* In order to allow Vector Rx there are a few configuration
* conditions to be met and Rx Bulk Allocation should be allowed.
*/
- if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
#ifdef RTE_ARCH_X86
- ad->rx_use_avx512 = false;
- ad->rx_use_avx2 = false;
+ bool rx_use_avx512 = false, rx_use_avx2 = false;
#endif
- if (i40e_rx_vec_dev_conf_condition_check(dev) ||
- !ad->rx_bulk_alloc_allowed) {
- PMD_INIT_LOG(DEBUG, "Port[%d] doesn't meet"
- " Vector Rx preconditions",
- dev->data->port_id);
+ if (i40e_rx_vec_dev_conf_condition_check(dev) || !ad->rx_bulk_alloc_allowed) {
+ PMD_INIT_LOG(DEBUG, "Port[%d] doesn't meet"
+ " Vector Rx preconditions",
+ dev->data->port_id);
- ad->rx_vec_allowed = false;
- }
- if (ad->rx_vec_allowed) {
- for (i = 0; i < dev->data->nb_rx_queues; i++) {
- struct ci_rx_queue *rxq =
- dev->data->rx_queues[i];
+ ad->rx_vec_allowed = false;
+ }
+ if (ad->rx_vec_allowed) {
+ for (i = 0; i < dev->data->nb_rx_queues; i++) {
+ struct ci_rx_queue *rxq =
+ dev->data->rx_queues[i];
- if (rxq && i40e_rxq_vec_setup(rxq)) {
- ad->rx_vec_allowed = false;
- break;
- }
+ if (rxq && i40e_rxq_vec_setup(rxq)) {
+ ad->rx_vec_allowed = false;
+ break;
}
+ }
#ifdef RTE_ARCH_X86
- ad->rx_use_avx512 = get_avx_supported(1);
+ rx_use_avx512 = get_avx_supported(1);
- if (!ad->rx_use_avx512)
- ad->rx_use_avx2 = get_avx_supported(0);
+ if (!rx_use_avx512)
+ rx_use_avx2 = get_avx_supported(0);
#endif
- }
}
- if (ad->rx_vec_allowed &&
- rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
+ if (ad->rx_vec_allowed && rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
#ifdef RTE_ARCH_X86
if (dev->data->scattered_rx) {
- if (ad->rx_use_avx512) {
+ if (rx_use_avx512) {
#ifdef CC_AVX512_SUPPORT
- PMD_DRV_LOG(NOTICE,
- "Using AVX512 Vector Scattered Rx (port %d).",
- dev->data->port_id);
- dev->rx_pkt_burst =
- i40e_recv_scattered_pkts_vec_avx512;
+ ad->rx_func_type = I40E_RX_AVX512_SCATTERED;
#endif
} else {
- PMD_INIT_LOG(DEBUG,
- "Using %sVector Scattered Rx (port %d).",
- ad->rx_use_avx2 ? "avx2 " : "",
- dev->data->port_id);
- dev->rx_pkt_burst = ad->rx_use_avx2 ?
- i40e_recv_scattered_pkts_vec_avx2 :
- i40e_recv_scattered_pkts_vec;
+ ad->rx_func_type = rx_use_avx2 ?
+ I40E_RX_AVX2_SCATTERED :
+ I40E_RX_SCATTERED;
dev->recycle_rx_descriptors_refill =
i40e_recycle_rx_descriptors_refill_vec;
}
} else {
- if (ad->rx_use_avx512) {
+ if (rx_use_avx512) {
#ifdef CC_AVX512_SUPPORT
- PMD_DRV_LOG(NOTICE,
- "Using AVX512 Vector Rx (port %d).",
- dev->data->port_id);
- dev->rx_pkt_burst =
- i40e_recv_pkts_vec_avx512;
+ ad->rx_func_type = I40E_RX_AVX512;
#endif
} else {
- PMD_INIT_LOG(DEBUG,
- "Using %sVector Rx (port %d).",
- ad->rx_use_avx2 ? "avx2 " : "",
- dev->data->port_id);
- dev->rx_pkt_burst = ad->rx_use_avx2 ?
- i40e_recv_pkts_vec_avx2 :
- i40e_recv_pkts_vec;
+ ad->rx_func_type = rx_use_avx2 ?
+ I40E_RX_AVX2 :
+ I40E_RX_SSE;
dev->recycle_rx_descriptors_refill =
i40e_recycle_rx_descriptors_refill_vec;
}
}
-#else /* RTE_ARCH_X86 */
+#elif defined(RTE_ARCH_ARM64)
dev->recycle_rx_descriptors_refill = i40e_recycle_rx_descriptors_refill_vec;
- if (dev->data->scattered_rx) {
- PMD_INIT_LOG(DEBUG,
- "Using Vector Scattered Rx (port %d).",
- dev->data->port_id);
- dev->rx_pkt_burst = i40e_recv_scattered_pkts_vec;
- } else {
- PMD_INIT_LOG(DEBUG, "Using Vector Rx (port %d).",
- dev->data->port_id);
- dev->rx_pkt_burst = i40e_recv_pkts_vec;
- }
+ if (dev->data->scattered_rx)
+ ad->rx_func_type = I40E_RX_NEON_SCATTERED;
+ else
+ ad->rx_func_type = I40E_RX_NEON;
+#elif defined(RTE_ARCH_PPC_64)
+ dev->recycle_rx_descriptors_refill = i40e_recycle_rx_descriptors_refill_vec;
+ if (dev->data->scattered_rx)
+ ad->rx_func_type = I40E_RX_ALTIVEC_SCATTERED;
+ else
+ ad->rx_func_type = I40E_RX_ALTIVEC;
#endif /* RTE_ARCH_X86 */
} else if (!dev->data->scattered_rx && ad->rx_bulk_alloc_allowed) {
- PMD_INIT_LOG(DEBUG, "Rx Burst Bulk Alloc Preconditions are "
- "satisfied. Rx Burst Bulk Alloc function "
- "will be used on port=%d.",
- dev->data->port_id);
-
dev->rx_pkt_burst = i40e_recv_pkts_bulk_alloc;
} else {
/* Simple Rx Path. */
- PMD_INIT_LOG(DEBUG, "Simple Rx path will be used on port=%d.",
- dev->data->port_id);
dev->rx_pkt_burst = dev->data->scattered_rx ?
i40e_recv_scattered_pkts :
i40e_recv_pkts;
@@ -3444,32 +3446,12 @@ i40e_set_rx_function(struct rte_eth_dev *dev)
rxq->vector_rx = vector_rx;
}
}
-}
-static const struct {
- eth_rx_burst_t pkt_burst;
- const char *info;
-} i40e_rx_burst_infos[] = {
- { i40e_recv_scattered_pkts, "Scalar Scattered" },
- { i40e_recv_pkts_bulk_alloc, "Scalar Bulk Alloc" },
- { i40e_recv_pkts, "Scalar" },
-#ifdef RTE_ARCH_X86
-#ifdef CC_AVX512_SUPPORT
- { i40e_recv_scattered_pkts_vec_avx512, "Vector AVX512 Scattered" },
- { i40e_recv_pkts_vec_avx512, "Vector AVX512" },
-#endif
- { i40e_recv_scattered_pkts_vec_avx2, "Vector AVX2 Scattered" },
- { i40e_recv_pkts_vec_avx2, "Vector AVX2" },
- { i40e_recv_scattered_pkts_vec, "Vector SSE Scattered" },
- { i40e_recv_pkts_vec, "Vector SSE" },
-#elif defined(RTE_ARCH_ARM64)
- { i40e_recv_scattered_pkts_vec, "Vector Neon Scattered" },
- { i40e_recv_pkts_vec, "Vector Neon" },
-#elif defined(RTE_ARCH_PPC_64)
- { i40e_recv_scattered_pkts_vec, "Vector AltiVec Scattered" },
- { i40e_recv_pkts_vec, "Vector AltiVec" },
-#endif
-};
+out:
+ dev->rx_pkt_burst = i40e_rx_burst_infos[ad->rx_func_type].pkt_burst;
+ PMD_DRV_LOG(NOTICE, "Using %s Rx burst function (port %d).",
+ i40e_rx_burst_infos[ad->rx_func_type].info, dev->data->port_id);
+}
int
i40e_rx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id,
--
2.34.1
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [RFC PATCH 04/14] net/i40e: use the same Rx path across process types
2025-07-25 12:49 ` [RFC PATCH 04/14] net/i40e: " Ciara Loftus
@ 2025-07-25 13:43 ` Bruce Richardson
0 siblings, 0 replies; 24+ messages in thread
From: Bruce Richardson @ 2025-07-25 13:43 UTC (permalink / raw)
To: Ciara Loftus; +Cc: dev
On Fri, Jul 25, 2025 at 12:49:09PM +0000, Ciara Loftus wrote:
> In the interest of simplicity, let the primary process select the Rx
> path to be used by all processes using the given device.
>
> The many logs which report individual Rx path selections have been
> consolidated into one single log
>
> Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
> ---
> drivers/net/intel/i40e/i40e_ethdev.h | 20 +++-
> drivers/net/intel/i40e/i40e_rxtx.c | 168 ++++++++++++---------------
> 2 files changed, 93 insertions(+), 95 deletions(-)
>
> diff --git a/drivers/net/intel/i40e/i40e_ethdev.h b/drivers/net/intel/i40e/i40e_ethdev.h
> index 44864292d0..308039c363 100644
> --- a/drivers/net/intel/i40e/i40e_ethdev.h
> +++ b/drivers/net/intel/i40e/i40e_ethdev.h
> @@ -1226,6 +1226,22 @@ struct i40e_vsi_vlan_pvid_info {
> #define I40E_MBUF_CHECK_F_TX_SEGMENT (1ULL << 2)
> #define I40E_MBUF_CHECK_F_TX_OFFLOAD (1ULL << 3)
>
> +enum i40e_rx_func_type {
> + I40E_RX_DEFAULT,
> + I40E_RX_BULK_ALLOC,
> + I40E_RX_SCATTERED,
> + I40E_RX_SSE,
> + I40E_RX_AVX2,
> + I40E_RX_SSE_SCATTERED,
> + I40E_RX_AVX2_SCATTERED,
> + I40E_RX_AVX512,
> + I40E_RX_AVX512_SCATTERED,
> + I40E_RX_NEON,
> + I40E_RX_NEON_SCATTERED,
> + I40E_RX_ALTIVEC,
> + I40E_RX_ALTIVEC_SCATTERED,
> +};
> +
As with previous patch, I'd suggest working out what the most logical order
for these elements is, and using that. Having AVX2 and SSE interleaved
seems a bit strange.
Otherwise:
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
^ permalink raw reply [flat|nested] 24+ messages in thread
* [RFC PATCH 05/14] net/intel: introduce common vector capability function
2025-07-25 12:49 [RFC PATCH 00/14] net/intel: rx path selection simplification Ciara Loftus
` (3 preceding siblings ...)
2025-07-25 12:49 ` [RFC PATCH 04/14] net/i40e: " Ciara Loftus
@ 2025-07-25 12:49 ` Ciara Loftus
2025-07-25 13:45 ` Bruce Richardson
2025-07-25 12:49 ` [RFC PATCH 06/14] net/ice: use the new " Ciara Loftus
` (8 subsequent siblings)
13 siblings, 1 reply; 24+ messages in thread
From: Ciara Loftus @ 2025-07-25 12:49 UTC (permalink / raw)
To: dev; +Cc: Bruce Richardson, Ciara Loftus
From: Bruce Richardson <bruce.richardson@intel.com>
A common need within the drivers is to select between SSE, AVX2 and
AVX-512 code paths. Provide a common function which helps with this
decision making, that returns the max simd bandwidth based on any
user configured maximums and available CPU flags.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
drivers/net/intel/common/rx_vec_x86.h | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/drivers/net/intel/common/rx_vec_x86.h b/drivers/net/intel/common/rx_vec_x86.h
index 3d7343b1ff..314fa24b41 100644
--- a/drivers/net/intel/common/rx_vec_x86.h
+++ b/drivers/net/intel/common/rx_vec_x86.h
@@ -346,4 +346,27 @@ ci_rxq_rearm(struct ci_rx_queue *rxq, const enum ci_rx_vec_level vec_level)
rte_write32_wc(rte_cpu_to_le_32(rx_id), rxq->qrx_tail);
}
+#ifdef CC_AVX512_SUPPORT
+#define X86_MAX_SIMD_BITWIDTH (rte_vect_get_max_simd_bitwidth())
+#else
+#define X86_MAX_SIMD_BITWIDTH RTE_MIN(256, rte_vect_get_max_simd_bitwidth())
+#endif /* CC_AVX512_SUPPORT */
+
+static inline enum rte_vect_max_simd
+ci_get_x86_max_simd_bitwidth(void)
+{
+ int ret = RTE_VECT_SIMD_DISABLED;
+ int simd = X86_MAX_SIMD_BITWIDTH;
+
+ if (simd >= 512 && rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&
+ rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) == 1)
+ ret = RTE_VECT_SIMD_512;
+ else if (simd >= 256 && (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||
+ rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1))
+ ret = RTE_VECT_SIMD_256;
+ else if (simd >= 128)
+ ret = RTE_VECT_SIMD_128;
+ return ret;
+}
+
#endif /* _COMMON_INTEL_RX_VEC_X86_H_ */
--
2.34.1
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [RFC PATCH 05/14] net/intel: introduce common vector capability function
2025-07-25 12:49 ` [RFC PATCH 05/14] net/intel: introduce common vector capability function Ciara Loftus
@ 2025-07-25 13:45 ` Bruce Richardson
0 siblings, 0 replies; 24+ messages in thread
From: Bruce Richardson @ 2025-07-25 13:45 UTC (permalink / raw)
To: Ciara Loftus; +Cc: dev
On Fri, Jul 25, 2025 at 12:49:10PM +0000, Ciara Loftus wrote:
> From: Bruce Richardson <bruce.richardson@intel.com>
>
> A common need within the drivers is to select between SSE, AVX2 and
> AVX-512 code paths. Provide a common function which helps with this
> decision making, that returns the max simd bandwidth based on any
> user configured maximums and available CPU flags.
>
> Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
> Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
> ---
> drivers/net/intel/common/rx_vec_x86.h | 23 +++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/drivers/net/intel/common/rx_vec_x86.h b/drivers/net/intel/common/rx_vec_x86.h
> index 3d7343b1ff..314fa24b41 100644
> --- a/drivers/net/intel/common/rx_vec_x86.h
> +++ b/drivers/net/intel/common/rx_vec_x86.h
> @@ -346,4 +346,27 @@ ci_rxq_rearm(struct ci_rx_queue *rxq, const enum ci_rx_vec_level vec_level)
> rte_write32_wc(rte_cpu_to_le_32(rx_id), rxq->qrx_tail);
> }
>
> +#ifdef CC_AVX512_SUPPORT
> +#define X86_MAX_SIMD_BITWIDTH (rte_vect_get_max_simd_bitwidth())
> +#else
> +#define X86_MAX_SIMD_BITWIDTH RTE_MIN(256, rte_vect_get_max_simd_bitwidth())
> +#endif /* CC_AVX512_SUPPORT */
> +
> +static inline enum rte_vect_max_simd
> +ci_get_x86_max_simd_bitwidth(void)
> +{
> + int ret = RTE_VECT_SIMD_DISABLED;
> + int simd = X86_MAX_SIMD_BITWIDTH;
> +
> + if (simd >= 512 && rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&
> + rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) == 1)
> + ret = RTE_VECT_SIMD_512;
> + else if (simd >= 256 && (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||
> + rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1))
Don't need to check the AVX512 flag here.
> + ret = RTE_VECT_SIMD_256;
> + else if (simd >= 128)
> + ret = RTE_VECT_SIMD_128;
> + return ret;
> +}
> +
> #endif /* _COMMON_INTEL_RX_VEC_X86_H_ */
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 24+ messages in thread
* [RFC PATCH 06/14] net/ice: use the new common vector capability function
2025-07-25 12:49 [RFC PATCH 00/14] net/intel: rx path selection simplification Ciara Loftus
` (4 preceding siblings ...)
2025-07-25 12:49 ` [RFC PATCH 05/14] net/intel: introduce common vector capability function Ciara Loftus
@ 2025-07-25 12:49 ` Ciara Loftus
2025-07-25 13:56 ` Bruce Richardson
2025-07-25 12:49 ` [RFC PATCH 07/14] net/iavf: " Ciara Loftus
` (7 subsequent siblings)
13 siblings, 1 reply; 24+ messages in thread
From: Ciara Loftus @ 2025-07-25 12:49 UTC (permalink / raw)
To: dev; +Cc: Ciara Loftus
Use the new function for determining the maximum simd bitwidth in
the ice driver.
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
drivers/net/intel/ice/ice_ethdev.h | 5 +--
drivers/net/intel/ice/ice_rxtx.c | 52 ++++++------------------
drivers/net/intel/ice/ice_rxtx.h | 1 +
drivers/net/intel/ice/ice_rxtx_vec_sse.c | 6 +++
4 files changed, 21 insertions(+), 43 deletions(-)
diff --git a/drivers/net/intel/ice/ice_ethdev.h b/drivers/net/intel/ice/ice_ethdev.h
index 5fda814f06..992fcc9175 100644
--- a/drivers/net/intel/ice/ice_ethdev.h
+++ b/drivers/net/intel/ice/ice_ethdev.h
@@ -11,6 +11,7 @@
#include <ethdev_driver.h>
#include <rte_tm_driver.h>
+#include <rte_vect.h>
#include "base/ice_common.h"
#include "base/ice_adminq_cmd.h"
@@ -674,9 +675,7 @@ struct ice_adapter {
/* Set bit if the engine is disabled */
unsigned long disabled_engine_mask;
struct ice_parser *psr;
- /* used only on X86, zero on other Archs */
- bool tx_use_avx2;
- bool tx_use_avx512;
+ enum rte_vect_max_simd tx_simd_width;
bool rx_vec_offload_support;
};
diff --git a/drivers/net/intel/ice/ice_rxtx.c b/drivers/net/intel/ice/ice_rxtx.c
index 85832d95a3..79217249b9 100644
--- a/drivers/net/intel/ice/ice_rxtx.c
+++ b/drivers/net/intel/ice/ice_rxtx.c
@@ -3703,7 +3703,7 @@ ice_set_rx_function(struct rte_eth_dev *dev)
struct ci_rx_queue *rxq;
int i;
int rx_check_ret = -1;
- bool rx_use_avx512 = false, rx_use_avx2 = false;
+ enum rte_vect_max_simd rx_simd_width = RTE_VECT_SIMD_DISABLED;
rx_check_ret = ice_rx_vec_dev_check(dev);
if (ad->ptp_ena)
@@ -3720,35 +3720,22 @@ ice_set_rx_function(struct rte_eth_dev *dev)
break;
}
}
+ rx_simd_width = ice_get_max_simd_bitwidth();
- if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_512 &&
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) == 1)
-#ifdef CC_AVX512_SUPPORT
- rx_use_avx512 = true;
-#else
- PMD_DRV_LOG(NOTICE,
- "AVX512 is not supported in build env");
-#endif
- if (!rx_use_avx512 &&
- (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) &&
- rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256)
- rx_use_avx2 = true;
} else {
ad->rx_vec_allowed = false;
}
if (ad->rx_vec_allowed) {
if (dev->data->scattered_rx) {
- if (rx_use_avx512) {
+ if (rx_simd_width == RTE_VECT_SIMD_512) {
#ifdef CC_AVX512_SUPPORT
if (ad->rx_vec_offload_support)
ad->rx_func_type = ICE_RX_AVX512_SCATTERED_OFFLOAD;
else
ad->rx_func_type = ICE_RX_AVX512_SCATTERED;
#endif
- } else if (rx_use_avx2) {
+ } else if (rx_simd_width == RTE_VECT_SIMD_256) {
if (ad->rx_vec_offload_support)
ad->rx_func_type = ICE_RX_AVX2_SCATTERED_OFFLOAD;
else
@@ -3757,14 +3744,14 @@ ice_set_rx_function(struct rte_eth_dev *dev)
ad->rx_func_type = ICE_RX_SSE_SCATTERED;
}
} else {
- if (rx_use_avx512) {
+ if (rx_simd_width == RTE_VECT_SIMD_512) {
#ifdef CC_AVX512_SUPPORT
if (ad->rx_vec_offload_support)
ad->rx_func_type = ICE_RX_AVX512_OFFLOAD;
else
ad->rx_func_type = ICE_RX_AVX512;
#endif
- } else if (rx_use_avx2) {
+ } else if (rx_simd_width == RTE_VECT_SIMD_256) {
if (ad->rx_vec_offload_support)
ad->rx_func_type = ICE_RX_AVX2_OFFLOAD;
else
@@ -4032,29 +4019,14 @@ ice_set_tx_function(struct rte_eth_dev *dev)
int tx_check_ret = -1;
if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
- ad->tx_use_avx2 = false;
- ad->tx_use_avx512 = false;
+ ad->tx_simd_width = RTE_VECT_SIMD_DISABLED;
tx_check_ret = ice_tx_vec_dev_check(dev);
+ ad->tx_simd_width = ice_get_max_simd_bitwidth();
if (tx_check_ret >= 0 &&
rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
ad->tx_vec_allowed = true;
- if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_512 &&
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) == 1)
-#ifdef CC_AVX512_SUPPORT
- ad->tx_use_avx512 = true;
-#else
- PMD_DRV_LOG(NOTICE,
- "AVX512 is not supported in build env");
-#endif
- if (!ad->tx_use_avx512 &&
- (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) &&
- rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256)
- ad->tx_use_avx2 = true;
-
- if (!ad->tx_use_avx2 && !ad->tx_use_avx512 &&
+ if (ad->tx_simd_width < RTE_VECT_SIMD_256 &&
tx_check_ret == ICE_VECTOR_OFFLOAD_PATH)
ad->tx_vec_allowed = false;
@@ -4074,7 +4046,7 @@ ice_set_tx_function(struct rte_eth_dev *dev)
if (ad->tx_vec_allowed) {
dev->tx_pkt_prepare = NULL;
- if (ad->tx_use_avx512) {
+ if (ad->tx_simd_width == RTE_VECT_SIMD_512) {
#ifdef CC_AVX512_SUPPORT
if (tx_check_ret == ICE_VECTOR_OFFLOAD_PATH) {
PMD_DRV_LOG(NOTICE,
@@ -4100,9 +4072,9 @@ ice_set_tx_function(struct rte_eth_dev *dev)
dev->tx_pkt_prepare = ice_prep_pkts;
} else {
PMD_DRV_LOG(DEBUG, "Using %sVector Tx (port %d).",
- ad->tx_use_avx2 ? "avx2 " : "",
+ ad->tx_simd_width == RTE_VECT_SIMD_256 ? "avx2 " : "",
dev->data->port_id);
- dev->tx_pkt_burst = ad->tx_use_avx2 ?
+ dev->tx_pkt_burst = ad->tx_simd_width == RTE_VECT_SIMD_256 ?
ice_xmit_pkts_vec_avx2 :
ice_xmit_pkts_vec;
}
diff --git a/drivers/net/intel/ice/ice_rxtx.h b/drivers/net/intel/ice/ice_rxtx.h
index 0301d05888..8c3d6c413a 100644
--- a/drivers/net/intel/ice/ice_rxtx.h
+++ b/drivers/net/intel/ice/ice_rxtx.h
@@ -261,6 +261,7 @@ uint16_t ice_xmit_pkts_vec_avx512_offload(void *tx_queue,
int ice_fdir_programming(struct ice_pf *pf, struct ice_fltr_desc *fdir_desc);
int ice_tx_done_cleanup(void *txq, uint32_t free_cnt);
int ice_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc);
+enum rte_vect_max_simd ice_get_max_simd_bitwidth(void);
#define FDIR_PARSING_ENABLE_PER_QUEUE(ad, on) do { \
int i; \
diff --git a/drivers/net/intel/ice/ice_rxtx_vec_sse.c b/drivers/net/intel/ice/ice_rxtx_vec_sse.c
index d818b3b728..1545bc3b6e 100644
--- a/drivers/net/intel/ice/ice_rxtx_vec_sse.c
+++ b/drivers/net/intel/ice/ice_rxtx_vec_sse.c
@@ -735,3 +735,9 @@ ice_tx_vec_dev_check(struct rte_eth_dev *dev)
{
return ice_tx_vec_dev_check_default(dev);
}
+
+enum rte_vect_max_simd
+ice_get_max_simd_bitwidth(void)
+{
+ return ci_get_x86_max_simd_bitwidth();
+}
--
2.34.1
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [RFC PATCH 06/14] net/ice: use the new common vector capability function
2025-07-25 12:49 ` [RFC PATCH 06/14] net/ice: use the new " Ciara Loftus
@ 2025-07-25 13:56 ` Bruce Richardson
0 siblings, 0 replies; 24+ messages in thread
From: Bruce Richardson @ 2025-07-25 13:56 UTC (permalink / raw)
To: Ciara Loftus; +Cc: dev
On Fri, Jul 25, 2025 at 12:49:11PM +0000, Ciara Loftus wrote:
> Use the new function for determining the maximum simd bitwidth in
> the ice driver.
>
> Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
Few comments inline below.
> ---
> drivers/net/intel/ice/ice_ethdev.h | 5 +--
> drivers/net/intel/ice/ice_rxtx.c | 52 ++++++------------------
> drivers/net/intel/ice/ice_rxtx.h | 1 +
> drivers/net/intel/ice/ice_rxtx_vec_sse.c | 6 +++
> 4 files changed, 21 insertions(+), 43 deletions(-)
>
> diff --git a/drivers/net/intel/ice/ice_ethdev.h b/drivers/net/intel/ice/ice_ethdev.h
> index 5fda814f06..992fcc9175 100644
> --- a/drivers/net/intel/ice/ice_ethdev.h
> +++ b/drivers/net/intel/ice/ice_ethdev.h
> @@ -11,6 +11,7 @@
>
> #include <ethdev_driver.h>
> #include <rte_tm_driver.h>
> +#include <rte_vect.h>
>
> #include "base/ice_common.h"
> #include "base/ice_adminq_cmd.h"
> @@ -674,9 +675,7 @@ struct ice_adapter {
> /* Set bit if the engine is disabled */
> unsigned long disabled_engine_mask;
> struct ice_parser *psr;
> - /* used only on X86, zero on other Archs */
> - bool tx_use_avx2;
> - bool tx_use_avx512;
> + enum rte_vect_max_simd tx_simd_width;
> bool rx_vec_offload_support;
> };
>
> diff --git a/drivers/net/intel/ice/ice_rxtx.c b/drivers/net/intel/ice/ice_rxtx.c
> index 85832d95a3..79217249b9 100644
> --- a/drivers/net/intel/ice/ice_rxtx.c
> +++ b/drivers/net/intel/ice/ice_rxtx.c
> @@ -3703,7 +3703,7 @@ ice_set_rx_function(struct rte_eth_dev *dev)
> struct ci_rx_queue *rxq;
> int i;
> int rx_check_ret = -1;
> - bool rx_use_avx512 = false, rx_use_avx2 = false;
> + enum rte_vect_max_simd rx_simd_width = RTE_VECT_SIMD_DISABLED;
>
> rx_check_ret = ice_rx_vec_dev_check(dev);
> if (ad->ptp_ena)
> @@ -3720,35 +3720,22 @@ ice_set_rx_function(struct rte_eth_dev *dev)
> break;
> }
> }
> + rx_simd_width = ice_get_max_simd_bitwidth();
>
Since this whole block is in #ifdef X86_64, do we need a generic ice
function here? Is it worth just just calling the x86 function directly?
> - if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_512 &&
> - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&
> - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) == 1)
> -#ifdef CC_AVX512_SUPPORT
> - rx_use_avx512 = true;
> -#else
> - PMD_DRV_LOG(NOTICE,
> - "AVX512 is not supported in build env");
> -#endif
> - if (!rx_use_avx512 &&
> - (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||
> - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) &&
> - rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256)
> - rx_use_avx2 = true;
> } else {
> ad->rx_vec_allowed = false;
> }
>
> if (ad->rx_vec_allowed) {
> if (dev->data->scattered_rx) {
> - if (rx_use_avx512) {
> + if (rx_simd_width == RTE_VECT_SIMD_512) {
> #ifdef CC_AVX512_SUPPORT
> if (ad->rx_vec_offload_support)
> ad->rx_func_type = ICE_RX_AVX512_SCATTERED_OFFLOAD;
> else
> ad->rx_func_type = ICE_RX_AVX512_SCATTERED;
> #endif
> - } else if (rx_use_avx2) {
> + } else if (rx_simd_width == RTE_VECT_SIMD_256) {
> if (ad->rx_vec_offload_support)
> ad->rx_func_type = ICE_RX_AVX2_SCATTERED_OFFLOAD;
> else
> @@ -3757,14 +3744,14 @@ ice_set_rx_function(struct rte_eth_dev *dev)
> ad->rx_func_type = ICE_RX_SSE_SCATTERED;
> }
> } else {
> - if (rx_use_avx512) {
> + if (rx_simd_width == RTE_VECT_SIMD_512) {
> #ifdef CC_AVX512_SUPPORT
> if (ad->rx_vec_offload_support)
> ad->rx_func_type = ICE_RX_AVX512_OFFLOAD;
> else
> ad->rx_func_type = ICE_RX_AVX512;
> #endif
> - } else if (rx_use_avx2) {
> + } else if (rx_simd_width == RTE_VECT_SIMD_256) {
> if (ad->rx_vec_offload_support)
> ad->rx_func_type = ICE_RX_AVX2_OFFLOAD;
> else
> @@ -4032,29 +4019,14 @@ ice_set_tx_function(struct rte_eth_dev *dev)
> int tx_check_ret = -1;
>
> if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
> - ad->tx_use_avx2 = false;
> - ad->tx_use_avx512 = false;
> + ad->tx_simd_width = RTE_VECT_SIMD_DISABLED;
> tx_check_ret = ice_tx_vec_dev_check(dev);
> + ad->tx_simd_width = ice_get_max_simd_bitwidth();
> if (tx_check_ret >= 0 &&
> rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
> ad->tx_vec_allowed = true;
>
> - if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_512 &&
> - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&
> - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) == 1)
> -#ifdef CC_AVX512_SUPPORT
> - ad->tx_use_avx512 = true;
> -#else
> - PMD_DRV_LOG(NOTICE,
> - "AVX512 is not supported in build env");
> -#endif
> - if (!ad->tx_use_avx512 &&
> - (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||
> - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) &&
> - rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256)
> - ad->tx_use_avx2 = true;
> -
> - if (!ad->tx_use_avx2 && !ad->tx_use_avx512 &&
> + if (ad->tx_simd_width < RTE_VECT_SIMD_256 &&
> tx_check_ret == ICE_VECTOR_OFFLOAD_PATH)
> ad->tx_vec_allowed = false;
>
> @@ -4074,7 +4046,7 @@ ice_set_tx_function(struct rte_eth_dev *dev)
>
> if (ad->tx_vec_allowed) {
> dev->tx_pkt_prepare = NULL;
> - if (ad->tx_use_avx512) {
> + if (ad->tx_simd_width == RTE_VECT_SIMD_512) {
> #ifdef CC_AVX512_SUPPORT
> if (tx_check_ret == ICE_VECTOR_OFFLOAD_PATH) {
> PMD_DRV_LOG(NOTICE,
> @@ -4100,9 +4072,9 @@ ice_set_tx_function(struct rte_eth_dev *dev)
> dev->tx_pkt_prepare = ice_prep_pkts;
> } else {
> PMD_DRV_LOG(DEBUG, "Using %sVector Tx (port %d).",
> - ad->tx_use_avx2 ? "avx2 " : "",
> + ad->tx_simd_width == RTE_VECT_SIMD_256 ? "avx2 " : "",
> dev->data->port_id);
> - dev->tx_pkt_burst = ad->tx_use_avx2 ?
> + dev->tx_pkt_burst = ad->tx_simd_width == RTE_VECT_SIMD_256 ?
> ice_xmit_pkts_vec_avx2 :
> ice_xmit_pkts_vec;
> }
> diff --git a/drivers/net/intel/ice/ice_rxtx.h b/drivers/net/intel/ice/ice_rxtx.h
> index 0301d05888..8c3d6c413a 100644
> --- a/drivers/net/intel/ice/ice_rxtx.h
> +++ b/drivers/net/intel/ice/ice_rxtx.h
> @@ -261,6 +261,7 @@ uint16_t ice_xmit_pkts_vec_avx512_offload(void *tx_queue,
> int ice_fdir_programming(struct ice_pf *pf, struct ice_fltr_desc *fdir_desc);
> int ice_tx_done_cleanup(void *txq, uint32_t free_cnt);
> int ice_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc);
> +enum rte_vect_max_simd ice_get_max_simd_bitwidth(void);
>
> #define FDIR_PARSING_ENABLE_PER_QUEUE(ad, on) do { \
> int i; \
> diff --git a/drivers/net/intel/ice/ice_rxtx_vec_sse.c b/drivers/net/intel/ice/ice_rxtx_vec_sse.c
> index d818b3b728..1545bc3b6e 100644
> --- a/drivers/net/intel/ice/ice_rxtx_vec_sse.c
> +++ b/drivers/net/intel/ice/ice_rxtx_vec_sse.c
> @@ -735,3 +735,9 @@ ice_tx_vec_dev_check(struct rte_eth_dev *dev)
> {
> return ice_tx_vec_dev_check_default(dev);
> }
> +
> +enum rte_vect_max_simd
> +ice_get_max_simd_bitwidth(void)
> +{
> + return ci_get_x86_max_simd_bitwidth();
> +}
If we do wrap the x86 bitwidth function in an ice-specific one, we probably
need to provide one for other architectures. However, as I comment above, I
don't think we need to wrap this - though perhaps I'm missing something or
its needed in later patches...
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 24+ messages in thread
* [RFC PATCH 07/14] net/iavf: use the new common vector capability function
2025-07-25 12:49 [RFC PATCH 00/14] net/intel: rx path selection simplification Ciara Loftus
` (5 preceding siblings ...)
2025-07-25 12:49 ` [RFC PATCH 06/14] net/ice: use the new " Ciara Loftus
@ 2025-07-25 12:49 ` Ciara Loftus
2025-07-25 12:49 ` [RFC PATCH 08/14] net/i40e: " Ciara Loftus
` (6 subsequent siblings)
13 siblings, 0 replies; 24+ messages in thread
From: Ciara Loftus @ 2025-07-25 12:49 UTC (permalink / raw)
To: dev; +Cc: Ciara Loftus
Use the new function for determining the maximum simd bitwidth in
the iavf driver.
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
drivers/net/intel/iavf/iavf_rxtx.c | 27 +++++-----------------
drivers/net/intel/iavf/iavf_rxtx.h | 1 +
drivers/net/intel/iavf/iavf_rxtx_vec_sse.c | 6 +++++
3 files changed, 13 insertions(+), 21 deletions(-)
diff --git a/drivers/net/intel/iavf/iavf_rxtx.c b/drivers/net/intel/iavf/iavf_rxtx.c
index 3329499e59..e36a07d5ac 100644
--- a/drivers/net/intel/iavf/iavf_rxtx.c
+++ b/drivers/net/intel/iavf/iavf_rxtx.c
@@ -3970,21 +3970,13 @@ iavf_set_rx_function(struct rte_eth_dev *dev)
int check_ret;
bool use_avx2 = false;
bool use_avx512 = false;
+ enum rte_vect_max_simd rx_simd_path = iavf_get_max_simd_bitwidth();
check_ret = iavf_rx_vec_dev_check(dev);
if (check_ret >= 0 &&
rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
- if ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) &&
- rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256)
- use_avx2 = true;
-
-#ifdef CC_AVX512_SUPPORT
- if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) == 1 &&
- rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_512)
- use_avx512 = true;
-#endif
+ use_avx2 = rx_simd_path == RTE_VECT_SIMD_256;
+ use_avx512 = rx_simd_path == RTE_VECT_SIMD_512;
for (i = 0; i < dev->data->nb_rx_queues; i++) {
rxq = dev->data->rx_queues[i];
@@ -4129,6 +4121,7 @@ iavf_set_tx_function(struct rte_eth_dev *dev)
bool use_sse = false;
bool use_avx2 = false;
bool use_avx512 = false;
+ enum rte_vect_max_simd tx_simd_path = iavf_get_max_simd_bitwidth();
check_ret = iavf_tx_vec_dev_check(dev);
@@ -4138,16 +4131,8 @@ iavf_set_tx_function(struct rte_eth_dev *dev)
if (check_ret == IAVF_VECTOR_PATH) {
use_sse = true;
}
- if ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) &&
- rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256)
- use_avx2 = true;
-#ifdef CC_AVX512_SUPPORT
- if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) == 1 &&
- rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_512)
- use_avx512 = true;
-#endif
+ use_avx2 = tx_simd_path == RTE_VECT_SIMD_256;
+ use_avx512 = tx_simd_path == RTE_VECT_SIMD_512;
if (!use_sse && !use_avx2 && !use_avx512)
goto normal;
diff --git a/drivers/net/intel/iavf/iavf_rxtx.h b/drivers/net/intel/iavf/iavf_rxtx.h
index 1641bfe59a..36157003e3 100644
--- a/drivers/net/intel/iavf/iavf_rxtx.h
+++ b/drivers/net/intel/iavf/iavf_rxtx.h
@@ -606,6 +606,7 @@ void iavf_tx_queue_release_mbufs_avx512(struct ci_tx_queue *txq);
void iavf_rx_queue_release_mbufs_sse(struct ci_rx_queue *rxq);
void iavf_tx_queue_release_mbufs_sse(struct ci_tx_queue *txq);
void iavf_rx_queue_release_mbufs_neon(struct ci_rx_queue *rxq);
+enum rte_vect_max_simd iavf_get_max_simd_bitwidth(void);
static inline
void iavf_dump_rx_descriptor(struct ci_rx_queue *rxq,
diff --git a/drivers/net/intel/iavf/iavf_rxtx_vec_sse.c b/drivers/net/intel/iavf/iavf_rxtx_vec_sse.c
index e4c1f9fc7b..9dae0a79bf 100644
--- a/drivers/net/intel/iavf/iavf_rxtx_vec_sse.c
+++ b/drivers/net/intel/iavf/iavf_rxtx_vec_sse.c
@@ -1387,3 +1387,9 @@ iavf_tx_vec_dev_check(struct rte_eth_dev *dev)
{
return iavf_tx_vec_dev_check_default(dev);
}
+
+enum rte_vect_max_simd
+iavf_get_max_simd_bitwidth(void)
+{
+ return ci_get_x86_max_simd_bitwidth();
+}
--
2.34.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [RFC PATCH 08/14] net/i40e: use the new common vector capability function
2025-07-25 12:49 [RFC PATCH 00/14] net/intel: rx path selection simplification Ciara Loftus
` (6 preceding siblings ...)
2025-07-25 12:49 ` [RFC PATCH 07/14] net/iavf: " Ciara Loftus
@ 2025-07-25 12:49 ` Ciara Loftus
2025-07-25 12:49 ` [RFC PATCH 09/14] net/iavf: remove redundant field from iavf adapter struct Ciara Loftus
` (5 subsequent siblings)
13 siblings, 0 replies; 24+ messages in thread
From: Ciara Loftus @ 2025-07-25 12:49 UTC (permalink / raw)
To: dev; +Cc: Ciara Loftus
Use the new function for determining the maximum simd bitwidth in
the i40e driver.
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
drivers/net/intel/i40e/i40e_ethdev.h | 5 +-
drivers/net/intel/i40e/i40e_rxtx.c | 57 ++++------------------
drivers/net/intel/i40e/i40e_rxtx.h | 1 +
drivers/net/intel/i40e/i40e_rxtx_vec_sse.c | 6 +++
4 files changed, 18 insertions(+), 51 deletions(-)
diff --git a/drivers/net/intel/i40e/i40e_ethdev.h b/drivers/net/intel/i40e/i40e_ethdev.h
index 308039c363..0a4376bc52 100644
--- a/drivers/net/intel/i40e/i40e_ethdev.h
+++ b/drivers/net/intel/i40e/i40e_ethdev.h
@@ -15,6 +15,7 @@
#include <rte_flow_driver.h>
#include <rte_tm_driver.h>
#include "rte_pmd_i40e.h"
+#include <rte_vect.h>
#include "base/i40e_register.h"
#include "base/i40e_type.h"
@@ -1279,9 +1280,7 @@ struct i40e_adapter {
/* For RSS reta table update */
uint8_t rss_reta_updated;
- /* used only on x86, zero on other architectures */
- bool tx_use_avx2;
- bool tx_use_avx512;
+ enum rte_vect_max_simd tx_simd_width;
};
/**
diff --git a/drivers/net/intel/i40e/i40e_rxtx.c b/drivers/net/intel/i40e/i40e_rxtx.c
index bcf5af50e6..c0e217cd73 100644
--- a/drivers/net/intel/i40e/i40e_rxtx.c
+++ b/drivers/net/intel/i40e/i40e_rxtx.c
@@ -3284,32 +3284,6 @@ i40e_recycle_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
}
}
-#ifdef RTE_ARCH_X86
-static inline bool
-get_avx_supported(bool request_avx512)
-{
- if (request_avx512) {
- if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_512 &&
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) == 1)
-#ifdef CC_AVX512_SUPPORT
- return true;
-#else
- PMD_DRV_LOG(NOTICE,
- "AVX512 is not supported in build env");
- return false;
-#endif
- } else {
- if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256 &&
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 &&
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1)
- return true;
- }
-
- return false;
-}
-#endif /* RTE_ARCH_X86 */
-
static const struct {
eth_rx_burst_t pkt_burst;
const char *info;
@@ -3351,7 +3325,7 @@ i40e_set_rx_function(struct rte_eth_dev *dev)
* conditions to be met and Rx Bulk Allocation should be allowed.
*/
#ifdef RTE_ARCH_X86
- bool rx_use_avx512 = false, rx_use_avx2 = false;
+ enum rte_vect_max_simd rx_simd_width = i40e_get_max_simd_bitwidth();
#endif
if (i40e_rx_vec_dev_conf_condition_check(dev) || !ad->rx_bulk_alloc_allowed) {
PMD_INIT_LOG(DEBUG, "Port[%d] doesn't meet"
@@ -3370,35 +3344,29 @@ i40e_set_rx_function(struct rte_eth_dev *dev)
break;
}
}
-#ifdef RTE_ARCH_X86
- rx_use_avx512 = get_avx_supported(1);
-
- if (!rx_use_avx512)
- rx_use_avx2 = get_avx_supported(0);
-#endif
}
if (ad->rx_vec_allowed && rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
#ifdef RTE_ARCH_X86
if (dev->data->scattered_rx) {
- if (rx_use_avx512) {
+ if (rx_simd_width == RTE_VECT_SIMD_512) {
#ifdef CC_AVX512_SUPPORT
ad->rx_func_type = I40E_RX_AVX512_SCATTERED;
#endif
} else {
- ad->rx_func_type = rx_use_avx2 ?
+ ad->rx_func_type = (rx_simd_width == RTE_VECT_SIMD_256) ?
I40E_RX_AVX2_SCATTERED :
I40E_RX_SCATTERED;
dev->recycle_rx_descriptors_refill =
i40e_recycle_rx_descriptors_refill_vec;
}
} else {
- if (rx_use_avx512) {
+ if (rx_simd_width == RTE_VECT_SIMD_512) {
#ifdef CC_AVX512_SUPPORT
ad->rx_func_type = I40E_RX_AVX512;
#endif
} else {
- ad->rx_func_type = rx_use_avx2 ?
+ ad->rx_func_type = (rx_simd_width == RTE_VECT_SIMD_256) ?
I40E_RX_AVX2 :
I40E_RX_SSE;
dev->recycle_rx_descriptors_refill =
@@ -3509,8 +3477,7 @@ i40e_set_tx_function(struct rte_eth_dev *dev)
if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
#ifdef RTE_ARCH_X86
- ad->tx_use_avx2 = false;
- ad->tx_use_avx512 = false;
+ ad->tx_simd_width = i40e_get_max_simd_bitwidth();
#endif
if (ad->tx_vec_allowed) {
for (i = 0; i < dev->data->nb_tx_queues; i++) {
@@ -3522,12 +3489,6 @@ i40e_set_tx_function(struct rte_eth_dev *dev)
break;
}
}
-#ifdef RTE_ARCH_X86
- ad->tx_use_avx512 = get_avx_supported(1);
-
- if (!ad->tx_use_avx512)
- ad->tx_use_avx2 = get_avx_supported(0);
-#endif
}
}
@@ -3537,7 +3498,7 @@ i40e_set_tx_function(struct rte_eth_dev *dev)
if (ad->tx_simple_allowed) {
if (ad->tx_vec_allowed) {
#ifdef RTE_ARCH_X86
- if (ad->tx_use_avx512) {
+ if (ad->tx_simd_width == RTE_VECT_SIMD_512) {
#ifdef CC_AVX512_SUPPORT
PMD_DRV_LOG(NOTICE, "Using AVX512 Vector Tx (port %d).",
dev->data->port_id);
@@ -3545,9 +3506,9 @@ i40e_set_tx_function(struct rte_eth_dev *dev)
#endif
} else {
PMD_INIT_LOG(DEBUG, "Using %sVector Tx (port %d).",
- ad->tx_use_avx2 ? "avx2 " : "",
+ ad->tx_simd_width == RTE_VECT_SIMD_256 ? "avx2 " : "",
dev->data->port_id);
- dev->tx_pkt_burst = ad->tx_use_avx2 ?
+ dev->tx_pkt_burst = ad->tx_simd_width == RTE_VECT_SIMD_256 ?
i40e_xmit_pkts_vec_avx2 :
i40e_xmit_pkts_vec;
dev->recycle_tx_mbufs_reuse = i40e_recycle_tx_mbufs_reuse_vec;
diff --git a/drivers/net/intel/i40e/i40e_rxtx.h b/drivers/net/intel/i40e/i40e_rxtx.h
index 984532c507..b867e18daf 100644
--- a/drivers/net/intel/i40e/i40e_rxtx.h
+++ b/drivers/net/intel/i40e/i40e_rxtx.h
@@ -167,6 +167,7 @@ uint16_t i40e_recv_scattered_pkts_vec_avx512(void *rx_queue,
uint16_t i40e_xmit_pkts_vec_avx512(void *tx_queue,
struct rte_mbuf **tx_pkts,
uint16_t nb_pkts);
+enum rte_vect_max_simd i40e_get_max_simd_bitwidth(void);
/* For each value it means, datasheet of hardware can tell more details
*
diff --git a/drivers/net/intel/i40e/i40e_rxtx_vec_sse.c b/drivers/net/intel/i40e/i40e_rxtx_vec_sse.c
index 15cf07e548..c035408dcc 100644
--- a/drivers/net/intel/i40e/i40e_rxtx_vec_sse.c
+++ b/drivers/net/intel/i40e/i40e_rxtx_vec_sse.c
@@ -715,3 +715,9 @@ i40e_rx_vec_dev_conf_condition_check(struct rte_eth_dev *dev)
{
return i40e_rx_vec_dev_conf_condition_check_default(dev);
}
+
+enum rte_vect_max_simd
+i40e_get_max_simd_bitwidth(void)
+{
+ return ci_get_x86_max_simd_bitwidth();
+}
--
2.34.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [RFC PATCH 09/14] net/iavf: remove redundant field from iavf adapter struct
2025-07-25 12:49 [RFC PATCH 00/14] net/intel: rx path selection simplification Ciara Loftus
` (7 preceding siblings ...)
2025-07-25 12:49 ` [RFC PATCH 08/14] net/i40e: " Ciara Loftus
@ 2025-07-25 12:49 ` Ciara Loftus
2025-07-25 14:51 ` Bruce Richardson
2025-07-25 12:49 ` [RFC PATCH 10/14] net/intel: introduce infrastructure for Rx path selection Ciara Loftus
` (4 subsequent siblings)
13 siblings, 1 reply; 24+ messages in thread
From: Ciara Loftus @ 2025-07-25 12:49 UTC (permalink / raw)
To: dev; +Cc: Ciara Loftus
The variable rx_vec_allowed was only used in one function, so
it's not necessary to have it part of the iavf_adapater structure.
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
drivers/net/intel/iavf/iavf.h | 1 -
drivers/net/intel/iavf/iavf_ethdev.c | 1 -
drivers/net/intel/iavf/iavf_rxtx.c | 6 ++----
3 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/net/intel/iavf/iavf.h b/drivers/net/intel/iavf/iavf.h
index dacfb92d5f..69f9abbef3 100644
--- a/drivers/net/intel/iavf/iavf.h
+++ b/drivers/net/intel/iavf/iavf.h
@@ -375,7 +375,6 @@ struct iavf_adapter {
bool rx_bulk_alloc_allowed;
/* For vector PMD */
- bool rx_vec_allowed;
bool tx_vec_allowed;
alignas(RTE_CACHE_LINE_MIN_SIZE) uint32_t ptype_tbl[IAVF_MAX_PKT_TYPE];
bool stopped;
diff --git a/drivers/net/intel/iavf/iavf_ethdev.c b/drivers/net/intel/iavf/iavf_ethdev.c
index 335a8126c4..33b00e8ae4 100644
--- a/drivers/net/intel/iavf/iavf_ethdev.c
+++ b/drivers/net/intel/iavf/iavf_ethdev.c
@@ -668,7 +668,6 @@ iavf_dev_configure(struct rte_eth_dev *dev)
/* Initialize to TRUE. If any of Rx queues doesn't meet the
* vector Rx/Tx preconditions, it will be reset.
*/
- ad->rx_vec_allowed = true;
ad->tx_vec_allowed = true;
if (dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG)
diff --git a/drivers/net/intel/iavf/iavf_rxtx.c b/drivers/net/intel/iavf/iavf_rxtx.c
index e36a07d5ac..367dde89ca 100644
--- a/drivers/net/intel/iavf/iavf_rxtx.c
+++ b/drivers/net/intel/iavf/iavf_rxtx.c
@@ -725,12 +725,10 @@ iavf_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
ad->rx_bulk_alloc_allowed = false;
}
- if (!ci_rxq_vec_capable(rxq->nb_rx_desc, rxq->rx_free_thresh, rxq->offloads))
- ad->rx_vec_allowed = false;
-
#if defined RTE_ARCH_X86 || defined RTE_ARCH_ARM
/* check vector conflict */
- if (ad->rx_vec_allowed && iavf_rxq_vec_setup(rxq)) {
+ if (ci_rxq_vec_capable(rxq->nb_rx_desc, rxq->rx_free_thresh, rxq->offloads) &&
+ iavf_rxq_vec_setup(rxq)) {
PMD_DRV_LOG(ERR, "Failed vector rx setup.");
return -EINVAL;
}
--
2.34.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [RFC PATCH 10/14] net/intel: introduce infrastructure for Rx path selection
2025-07-25 12:49 [RFC PATCH 00/14] net/intel: rx path selection simplification Ciara Loftus
` (8 preceding siblings ...)
2025-07-25 12:49 ` [RFC PATCH 09/14] net/iavf: remove redundant field from iavf adapter struct Ciara Loftus
@ 2025-07-25 12:49 ` Ciara Loftus
2025-07-25 15:21 ` Bruce Richardson
2025-07-25 12:49 ` [RFC PATCH 11/14] net/ice: remove unsupported Rx offload Ciara Loftus
` (3 subsequent siblings)
13 siblings, 1 reply; 24+ messages in thread
From: Ciara Loftus @ 2025-07-25 12:49 UTC (permalink / raw)
To: dev; +Cc: Ciara Loftus
The code for determining which Rx path to select during initialisation
has become complicated in many intel drivers due to the amount of
different paths and features available within each path. This commit
aims to simplify and genericize the path selection logic.
The following information about each Rx burst function is stored and
used by the new common function to select the appropriate Rx path:
- Rx Offloads
- SIMD bitwidth
- Flexible RXD usage
- Bulk alloc function
- Scattered function
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
drivers/net/intel/common/rx.h | 110 ++++++++++++++++++++++++++++++++++
1 file changed, 110 insertions(+)
diff --git a/drivers/net/intel/common/rx.h b/drivers/net/intel/common/rx.h
index 70b597e8dc..6e9d81fecf 100644
--- a/drivers/net/intel/common/rx.h
+++ b/drivers/net/intel/common/rx.h
@@ -10,6 +10,7 @@
#include <unistd.h>
#include <rte_mbuf.h>
#include <rte_ethdev.h>
+#include <rte_vect.h>
#include "desc.h"
@@ -20,6 +21,12 @@
#define CI_VPMD_DESCS_PER_LOOP_WIDE 8
#define CI_VPMD_RX_REARM_THRESH 64
+#define CI_RX_BURST_NO_FEATURES 0
+#define CI_RX_BURST_FEATURE_SCATTERED RTE_BIT32(0)
+#define CI_RX_BURST_FEATURE_FLEX RTE_BIT32(1)
+#define CI_RX_BURST_FEATURE_BULK_ALLOC RTE_BIT32(2)
+#define CI_RX_BURST_FEATURE_IS_DISABLED RTE_BIT32(3)
+
struct ci_rx_queue;
struct ci_rx_entry {
@@ -125,6 +132,19 @@ struct ci_rx_queue {
};
};
+
+struct ci_rx_burst_features {
+ uint32_t rx_offloads;
+ enum rte_vect_max_simd simd_width;
+ uint32_t other_features_mask;
+};
+
+struct ci_rx_burst_info {
+ eth_rx_burst_t pkt_burst;
+ const char *info;
+ struct ci_rx_burst_features features;
+};
+
static inline uint16_t
ci_rx_reassemble_packets(struct rte_mbuf **rx_bufs, uint16_t nb_bufs, uint8_t *split_flags,
struct rte_mbuf **pkt_first_seg, struct rte_mbuf **pkt_last_seg,
@@ -222,4 +242,94 @@ ci_rxq_vec_capable(uint16_t nb_desc, uint16_t rx_free_thresh, uint64_t offloads)
return true;
}
+/**
+ * Select the best matching Rx burst mode function based on features
+ *
+ * @param req_features
+ * The requested features for the Rx burst mode
+ *
+ * @return
+ * The packet burst function index that best matches the requested features
+ */
+static inline int
+ci_rx_burst_mode_select(const struct ci_rx_burst_info *infos,
+ struct ci_rx_burst_features req_features,
+ int num_paths,
+ int default_path)
+{
+ int i, idx = -1;
+ const struct ci_rx_burst_features *info_features;
+ bool req_flex = req_features.other_features_mask & CI_RX_BURST_FEATURE_FLEX;
+ bool req_scattered = req_features.other_features_mask & CI_RX_BURST_FEATURE_SCATTERED;
+ bool req_bulk_alloc = req_features.other_features_mask & CI_RX_BURST_FEATURE_BULK_ALLOC;
+ bool info_flex, info_scattered, info_bulk_alloc;
+
+ for (i = 0; i < num_paths; i++) {
+ info_features = &infos[i].features;
+
+ /* Do not select a disabled rx burst function. */
+ if (info_features->other_features_mask & CI_RX_BURST_FEATURE_IS_DISABLED)
+ continue;
+
+ /* If requested, ensure the function uses the flexible descriptor. */
+ info_flex = info_features->other_features_mask & CI_RX_BURST_FEATURE_FLEX;
+ if (info_flex != req_flex)
+ continue;
+
+ /* If requested, ensure the function supports scattered RX. */
+ info_scattered = info_features->other_features_mask & CI_RX_BURST_FEATURE_SCATTERED;
+ if (info_scattered != req_scattered)
+ continue;
+
+ /* Do not use a bulk alloc function if not requested. However if it is the only
+ * feature requested, ensure it is supported in the selected function.
+ */
+ info_bulk_alloc =
+ info_features->other_features_mask & CI_RX_BURST_FEATURE_BULK_ALLOC;
+ if ((info_bulk_alloc && !req_bulk_alloc) ||
+ (req_features.other_features_mask ==
+ CI_RX_BURST_FEATURE_BULK_ALLOC &&
+ !info_bulk_alloc))
+ continue;
+
+ /* Ensure the function supports the requested RX offloads. */
+ if ((info_features->rx_offloads & req_features.rx_offloads) !=
+ req_features.rx_offloads)
+ continue;
+
+ /* Ensure the function's SIMD width is compatible with the requested width. */
+ if (info_features->simd_width > req_features.simd_width)
+ continue;
+
+ /* If this is the first valid path found, select it. */
+ if (idx == -1) {
+ idx = i;
+ continue;
+ }
+
+ /* At this point, at least one path has already been found that has met the
+ * requested criteria. Analyse the current path and select it if it is
+ * better than the previously selected one. i.e. if it has a larger SIMD width or
+ * if it has the same SIMD width but fewer offloads enabled.
+ */
+
+ if (info_features->simd_width > infos[idx].features.simd_width) {
+ idx = i;
+ continue;
+ }
+
+ /* Use the path with the least offloads that satisfies the requested offloads. */
+ if (info_features->simd_width == infos[idx].features.simd_width &&
+ (rte_popcount32(info_features->rx_offloads) <
+ rte_popcount32(infos[idx].features.rx_offloads)))
+ idx = i;
+ }
+
+ /* No path was found so use the default. */
+ if (idx == -1)
+ return default_path;
+
+ return idx;
+}
+
#endif /* _COMMON_INTEL_RX_H_ */
--
2.34.1
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [RFC PATCH 10/14] net/intel: introduce infrastructure for Rx path selection
2025-07-25 12:49 ` [RFC PATCH 10/14] net/intel: introduce infrastructure for Rx path selection Ciara Loftus
@ 2025-07-25 15:21 ` Bruce Richardson
0 siblings, 0 replies; 24+ messages in thread
From: Bruce Richardson @ 2025-07-25 15:21 UTC (permalink / raw)
To: Ciara Loftus; +Cc: dev
On Fri, Jul 25, 2025 at 12:49:15PM +0000, Ciara Loftus wrote:
> The code for determining which Rx path to select during initialisation
> has become complicated in many intel drivers due to the amount of
> different paths and features available within each path. This commit
> aims to simplify and genericize the path selection logic.
>
> The following information about each Rx burst function is stored and
> used by the new common function to select the appropriate Rx path:
> - Rx Offloads
> - SIMD bitwidth
> - Flexible RXD usage
> - Bulk alloc function
> - Scattered function
>
> Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
> ---
This is a good idea to simplify things. Some comments inline below.
/Bruce
> drivers/net/intel/common/rx.h | 110 ++++++++++++++++++++++++++++++++++
> 1 file changed, 110 insertions(+)
>
> diff --git a/drivers/net/intel/common/rx.h b/drivers/net/intel/common/rx.h
> index 70b597e8dc..6e9d81fecf 100644
> --- a/drivers/net/intel/common/rx.h
> +++ b/drivers/net/intel/common/rx.h
> @@ -10,6 +10,7 @@
> #include <unistd.h>
> #include <rte_mbuf.h>
> #include <rte_ethdev.h>
> +#include <rte_vect.h>
>
> #include "desc.h"
>
> @@ -20,6 +21,12 @@
> #define CI_VPMD_DESCS_PER_LOOP_WIDE 8
> #define CI_VPMD_RX_REARM_THRESH 64
>
> +#define CI_RX_BURST_NO_FEATURES 0
> +#define CI_RX_BURST_FEATURE_SCATTERED RTE_BIT32(0)
> +#define CI_RX_BURST_FEATURE_FLEX RTE_BIT32(1)
> +#define CI_RX_BURST_FEATURE_BULK_ALLOC RTE_BIT32(2)
> +#define CI_RX_BURST_FEATURE_IS_DISABLED RTE_BIT32(3)
> +
> struct ci_rx_queue;
>
> struct ci_rx_entry {
> @@ -125,6 +132,19 @@ struct ci_rx_queue {
> };
> };
>
> +
> +struct ci_rx_burst_features {
> + uint32_t rx_offloads;
> + enum rte_vect_max_simd simd_width;
> + uint32_t other_features_mask;
Rather than using a bitmask here and having to do bit ops, how about just
using individual boolean variables for each setting. Given that we only
have 4 settings right now (disabled, scattered, flex, and bulk-alloc), the
actual struct size here will be the same, but the code will be simpler.
Since this is not a datapath function, I'm not worried if the overall
struct size grows a bit over time.
I'd also note that in the structure below, we need an extra 4-bytes of
padding anyway, since the pointers require it to be 8-byte aligned, so we
can have up to 8 flags in the rx_burst_features struct without affecting
the size of the burst_info struct.
> +};
> +
> +struct ci_rx_burst_info {
> + eth_rx_burst_t pkt_burst;
> + const char *info;
> + struct ci_rx_burst_features features;
> +};
> +
Just on struct naming - would it be better to use the word "path" instead
of "burst" in the struct names, as in:
ci_rx_burst_features -> ci_rx_path_features
ci_rx_burst_info -> ci_rx_path_info
Given that the mode_select function below takes as parameter "num_paths", I
think this would make the names more consistent and meaningful.
> static inline uint16_t
> ci_rx_reassemble_packets(struct rte_mbuf **rx_bufs, uint16_t nb_bufs, uint8_t *split_flags,
> struct rte_mbuf **pkt_first_seg, struct rte_mbuf **pkt_last_seg,
> @@ -222,4 +242,94 @@ ci_rxq_vec_capable(uint16_t nb_desc, uint16_t rx_free_thresh, uint64_t offloads)
> return true;
> }
>
> +/**
> + * Select the best matching Rx burst mode function based on features
> + *
> + * @param req_features
> + * The requested features for the Rx burst mode
> + *
> + * @return
> + * The packet burst function index that best matches the requested features
> + */
Missing doxygen documentation for some of the parameters.
> +static inline int
> +ci_rx_burst_mode_select(const struct ci_rx_burst_info *infos,
> + struct ci_rx_burst_features req_features,
I would swap the order of these first two parameters, so that the request
comes first. As well as (at least to me) making more sense having the
request first, it also means that the "num_paths" parameter immediately
follows the array to which it refers.
> + int num_paths,
> + int default_path)
> +{
> + int i, idx = -1;
> + const struct ci_rx_burst_features *info_features;
This can be defined inside the loop.
> + bool req_flex = req_features.other_features_mask & CI_RX_BURST_FEATURE_FLEX;
> + bool req_scattered = req_features.other_features_mask & CI_RX_BURST_FEATURE_SCATTERED;
> + bool req_bulk_alloc = req_features.other_features_mask & CI_RX_BURST_FEATURE_BULK_ALLOC;
> + bool info_flex, info_scattered, info_bulk_alloc;
> +
> + for (i = 0; i < num_paths; i++) {
> + info_features = &infos[i].features;
> +
"path_features" is probably a better name for this, since it refers to the
current path we are examining.
> + /* Do not select a disabled rx burst function. */
> + if (info_features->other_features_mask & CI_RX_BURST_FEATURE_IS_DISABLED)
> + continue;
> +
> + /* If requested, ensure the function uses the flexible descriptor. */
> + info_flex = info_features->other_features_mask & CI_RX_BURST_FEATURE_FLEX;
> + if (info_flex != req_flex)
> + continue;
> +
> + /* If requested, ensure the function supports scattered RX. */
> + info_scattered = info_features->other_features_mask & CI_RX_BURST_FEATURE_SCATTERED;
> + if (info_scattered != req_scattered)
> + continue;
> +
> + /* Do not use a bulk alloc function if not requested. However if it is the only
> + * feature requested, ensure it is supported in the selected function.
> + */
What the is benefit or reason for ths second part of this - checking if
it's the only feature requested, vs being requested with other features?
Can you please explain a bit?
> + info_bulk_alloc =
> + info_features->other_features_mask & CI_RX_BURST_FEATURE_BULK_ALLOC;
> + if ((info_bulk_alloc && !req_bulk_alloc) ||
> + (req_features.other_features_mask ==
> + CI_RX_BURST_FEATURE_BULK_ALLOC &&
> + !info_bulk_alloc))
> + continue;
> +
> + /* Ensure the function supports the requested RX offloads. */
> + if ((info_features->rx_offloads & req_features.rx_offloads) !=
> + req_features.rx_offloads)
> + continue;
> +
> + /* Ensure the function's SIMD width is compatible with the requested width. */
> + if (info_features->simd_width > req_features.simd_width)
> + continue;
> +
> + /* If this is the first valid path found, select it. */
> + if (idx == -1) {
> + idx = i;
> + continue;
> + }
> +
> + /* At this point, at least one path has already been found that has met the
> + * requested criteria. Analyse the current path and select it if it is
> + * better than the previously selected one. i.e. if it has a larger SIMD width or
> + * if it has the same SIMD width but fewer offloads enabled.
> + */
> +
> + if (info_features->simd_width > infos[idx].features.simd_width) {
> + idx = i;
> + continue;
> + }
> +
> + /* Use the path with the least offloads that satisfies the requested offloads. */
> + if (info_features->simd_width == infos[idx].features.simd_width &&
I'd probably make this an "else if", since we don't want to bother with
this if we have just updated idx based on the simd_width.
> + (rte_popcount32(info_features->rx_offloads) <
> + rte_popcount32(infos[idx].features.rx_offloads)))
> + idx = i;
> + }
> +
> + /* No path was found so use the default. */
> + if (idx == -1)
> + return default_path;
> +
> + return idx;
> +}
> +
> #endif /* _COMMON_INTEL_RX_H_ */
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 24+ messages in thread
* [RFC PATCH 11/14] net/ice: remove unsupported Rx offload
2025-07-25 12:49 [RFC PATCH 00/14] net/intel: rx path selection simplification Ciara Loftus
` (9 preceding siblings ...)
2025-07-25 12:49 ` [RFC PATCH 10/14] net/intel: introduce infrastructure for Rx path selection Ciara Loftus
@ 2025-07-25 12:49 ` Ciara Loftus
2025-07-25 15:22 ` Bruce Richardson
2025-07-25 12:49 ` [RFC PATCH 12/14] net/ice: use the common Rx path selection infrastructure Ciara Loftus
` (2 subsequent siblings)
13 siblings, 1 reply; 24+ messages in thread
From: Ciara Loftus @ 2025-07-25 12:49 UTC (permalink / raw)
To: dev; +Cc: Ciara Loftus
The offload RTE_ETH_RX_OFFLOAD_SCTP_CKSUM is not supported in the ice
driver so remove the one erronous use of it.
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
drivers/net/intel/ice/ice_rxtx_vec_common.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/net/intel/ice/ice_rxtx_vec_common.h b/drivers/net/intel/ice/ice_rxtx_vec_common.h
index 9430a99ba5..5529e06a8d 100644
--- a/drivers/net/intel/ice/ice_rxtx_vec_common.h
+++ b/drivers/net/intel/ice/ice_rxtx_vec_common.h
@@ -71,7 +71,6 @@ _ice_rx_queue_release_mbufs_vec(struct ci_rx_queue *rxq)
#define ICE_RX_VECTOR_OFFLOAD ( \
RTE_ETH_RX_OFFLOAD_CHECKSUM | \
- RTE_ETH_RX_OFFLOAD_SCTP_CKSUM | \
RTE_ETH_RX_OFFLOAD_VLAN | \
RTE_ETH_RX_OFFLOAD_RSS_HASH)
--
2.34.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [RFC PATCH 12/14] net/ice: use the common Rx path selection infrastructure
2025-07-25 12:49 [RFC PATCH 00/14] net/intel: rx path selection simplification Ciara Loftus
` (10 preceding siblings ...)
2025-07-25 12:49 ` [RFC PATCH 11/14] net/ice: remove unsupported Rx offload Ciara Loftus
@ 2025-07-25 12:49 ` Ciara Loftus
2025-07-25 12:49 ` [RFC PATCH 13/14] net/iavf: " Ciara Loftus
2025-07-25 12:49 ` [RFC PATCH 14/14] net/i40e: " Ciara Loftus
13 siblings, 0 replies; 24+ messages in thread
From: Ciara Loftus @ 2025-07-25 12:49 UTC (permalink / raw)
To: dev; +Cc: Ciara Loftus
Replace the existing complicated logic with the use of the common
function.
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
drivers/net/intel/ice/ice_ethdev.h | 1 -
drivers/net/intel/ice/ice_rxtx.c | 157 +++++++++-----------
drivers/net/intel/ice/ice_rxtx.h | 28 ++++
drivers/net/intel/ice/ice_rxtx_vec_common.h | 17 +--
4 files changed, 100 insertions(+), 103 deletions(-)
diff --git a/drivers/net/intel/ice/ice_ethdev.h b/drivers/net/intel/ice/ice_ethdev.h
index 992fcc9175..5684fe27f6 100644
--- a/drivers/net/intel/ice/ice_ethdev.h
+++ b/drivers/net/intel/ice/ice_ethdev.h
@@ -651,7 +651,6 @@ struct ice_adapter {
struct ice_hw hw;
struct ice_pf pf;
bool rx_bulk_alloc_allowed;
- bool rx_vec_allowed;
bool tx_vec_allowed;
bool tx_simple_allowed;
enum ice_rx_func_type rx_func_type;
diff --git a/drivers/net/intel/ice/ice_rxtx.c b/drivers/net/intel/ice/ice_rxtx.c
index 79217249b9..8887b06db2 100644
--- a/drivers/net/intel/ice/ice_rxtx.c
+++ b/drivers/net/intel/ice/ice_rxtx.c
@@ -3662,29 +3662,46 @@ ice_xmit_pkts_simple(void *tx_queue,
return nb_tx;
}
-static const struct {
- eth_rx_burst_t pkt_burst;
- const char *info;
-} ice_rx_burst_infos[] = {
- [ICE_RX_SCATTERED] = { ice_recv_scattered_pkts, "Scalar Scattered" },
- [ICE_RX_BULK_ALLOC] = { ice_recv_pkts_bulk_alloc, "Scalar Bulk Alloc" },
- [ICE_RX_DEFAULT] = { ice_recv_pkts, "Scalar" },
+static const struct ci_rx_burst_info ice_rx_burst_infos[] = {
+ [ICE_RX_SCATTERED] = {ice_recv_scattered_pkts, "Scalar Scattered",
+ {ICE_RX_SCALAR_OFFLOADS, RTE_VECT_SIMD_DISABLED, CI_RX_BURST_FEATURE_SCATTERED}},
+ [ICE_RX_BULK_ALLOC] = {ice_recv_pkts_bulk_alloc, "Scalar Bulk Alloc",
+ {ICE_RX_SCALAR_OFFLOADS, RTE_VECT_SIMD_DISABLED, CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [ICE_RX_DEFAULT] = {ice_recv_pkts, "Scalar",
+ {ICE_RX_SCALAR_OFFLOADS, RTE_VECT_SIMD_DISABLED, CI_RX_BURST_NO_FEATURES}},
#ifdef RTE_ARCH_X86
#ifdef CC_AVX512_SUPPORT
- [ICE_RX_AVX512_SCATTERED] = {
- ice_recv_scattered_pkts_vec_avx512, "Vector AVX512 Scattered" },
+ [ICE_RX_AVX512_SCATTERED] = {ice_recv_scattered_pkts_vec_avx512, "Vector AVX512 Scattered",
+ {ICE_RX_VECTOR_OFFLOADS, RTE_VECT_SIMD_512,
+ CI_RX_BURST_FEATURE_SCATTERED | CI_RX_BURST_FEATURE_BULK_ALLOC}},
[ICE_RX_AVX512_SCATTERED_OFFLOAD] = {
- ice_recv_scattered_pkts_vec_avx512_offload, "Offload Vector AVX512 Scattered" },
- [ICE_RX_AVX512] = { ice_recv_pkts_vec_avx512, "Vector AVX512" },
- [ICE_RX_AVX512_OFFLOAD] = { ice_recv_pkts_vec_avx512_offload, "Offload Vector AVX512" },
+ ice_recv_scattered_pkts_vec_avx512_offload, "Offload Vector AVX512 Scattered",
+ {ICE_RX_VECTOR_OFFLOAD_OFFLOADS, RTE_VECT_SIMD_512,
+ CI_RX_BURST_FEATURE_SCATTERED | CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [ICE_RX_AVX512] = {ice_recv_pkts_vec_avx512, "Vector AVX512",
+ {ICE_RX_VECTOR_OFFLOADS, RTE_VECT_SIMD_512, CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [ICE_RX_AVX512_OFFLOAD] = {ice_recv_pkts_vec_avx512_offload, "Offload Vector AVX512",
+ {ICE_RX_VECTOR_OFFLOAD_OFFLOADS, RTE_VECT_SIMD_512,
+ CI_RX_BURST_FEATURE_BULK_ALLOC}},
#endif
- [ICE_RX_AVX2_SCATTERED] = { ice_recv_scattered_pkts_vec_avx2, "Vector AVX2 Scattered" },
+ [ICE_RX_AVX2_SCATTERED] = {ice_recv_scattered_pkts_vec_avx2, "Vector AVX2 Scattered",
+ {ICE_RX_VECTOR_OFFLOADS, RTE_VECT_SIMD_256,
+ CI_RX_BURST_FEATURE_SCATTERED | CI_RX_BURST_FEATURE_BULK_ALLOC}},
[ICE_RX_AVX2_SCATTERED_OFFLOAD] = {
- ice_recv_scattered_pkts_vec_avx2_offload, "Offload Vector AVX2 Scattered" },
- [ICE_RX_AVX2] = { ice_recv_pkts_vec_avx2, "Vector AVX2" },
- [ICE_RX_AVX2_OFFLOAD] = { ice_recv_pkts_vec_avx2_offload, "Offload Vector AVX2" },
- [ICE_RX_SSE_SCATTERED] = { ice_recv_scattered_pkts_vec, "Vector SSE Scattered" },
- [ICE_RX_SSE] = { ice_recv_pkts_vec, "Vector SSE" },
+ ice_recv_scattered_pkts_vec_avx2_offload, "Offload Vector AVX2 Scattered",
+ {ICE_RX_VECTOR_OFFLOAD_OFFLOADS, RTE_VECT_SIMD_256,
+ CI_RX_BURST_FEATURE_SCATTERED | CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [ICE_RX_AVX2] = {ice_recv_pkts_vec_avx2, "Vector AVX2",
+ {ICE_RX_VECTOR_OFFLOADS, RTE_VECT_SIMD_256, CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [ICE_RX_AVX2_OFFLOAD] = {ice_recv_pkts_vec_avx2_offload, "Offload Vector AVX2",
+ {ICE_RX_VECTOR_OFFLOAD_OFFLOADS, RTE_VECT_SIMD_256,
+ CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [ICE_RX_SSE_SCATTERED] = {ice_recv_scattered_pkts_vec, "Vector SSE Scattered",
+ {ICE_RX_VECTOR_OFFLOAD_OFFLOADS, RTE_VECT_SIMD_128,
+ CI_RX_BURST_FEATURE_SCATTERED | CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [ICE_RX_SSE] = {ice_recv_pkts_vec, "Vector SSE",
+ {ICE_RX_VECTOR_OFFLOAD_OFFLOADS, RTE_VECT_SIMD_128,
+ CI_RX_BURST_FEATURE_BULK_ALLOC}},
#endif
};
@@ -3694,89 +3711,53 @@ ice_set_rx_function(struct rte_eth_dev *dev)
PMD_INIT_FUNC_TRACE();
struct ice_adapter *ad =
ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
+ enum rte_vect_max_simd rx_simd_width = RTE_VECT_SIMD_DISABLED;
+ struct ci_rx_burst_features req_features = {
+ .rx_offloads = dev->data->dev_conf.rxmode.offloads,
+ .simd_width = RTE_VECT_SIMD_DISABLED,
+ .other_features_mask = CI_RX_BURST_NO_FEATURES
+ };
+ int rx_func_type = ICE_RX_DEFAULT;
/* The primary process selects the rx path for all processes. */
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
goto out;
#ifdef RTE_ARCH_X86
- struct ci_rx_queue *rxq;
- int i;
- int rx_check_ret = -1;
- enum rte_vect_max_simd rx_simd_width = RTE_VECT_SIMD_DISABLED;
-
- rx_check_ret = ice_rx_vec_dev_check(dev);
- if (ad->ptp_ena)
- rx_check_ret = -1;
- ad->rx_vec_offload_support =
- (rx_check_ret == ICE_VECTOR_OFFLOAD_PATH);
- if (rx_check_ret >= 0 && ad->rx_bulk_alloc_allowed &&
- rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
- ad->rx_vec_allowed = true;
- for (i = 0; i < dev->data->nb_rx_queues; i++) {
- rxq = dev->data->rx_queues[i];
- if (rxq && ice_rxq_vec_setup(rxq)) {
- ad->rx_vec_allowed = false;
- break;
- }
- }
- rx_simd_width = ice_get_max_simd_bitwidth();
-
+ if (ad->ptp_ena || !ad->rx_bulk_alloc_allowed) {
+ rx_simd_width = RTE_VECT_SIMD_DISABLED;
} else {
- ad->rx_vec_allowed = false;
- }
-
- if (ad->rx_vec_allowed) {
- if (dev->data->scattered_rx) {
- if (rx_simd_width == RTE_VECT_SIMD_512) {
-#ifdef CC_AVX512_SUPPORT
- if (ad->rx_vec_offload_support)
- ad->rx_func_type = ICE_RX_AVX512_SCATTERED_OFFLOAD;
- else
- ad->rx_func_type = ICE_RX_AVX512_SCATTERED;
-#endif
- } else if (rx_simd_width == RTE_VECT_SIMD_256) {
- if (ad->rx_vec_offload_support)
- ad->rx_func_type = ICE_RX_AVX2_SCATTERED_OFFLOAD;
- else
- ad->rx_func_type = ICE_RX_AVX2_SCATTERED;
- } else {
- ad->rx_func_type = ICE_RX_SSE_SCATTERED;
- }
- } else {
- if (rx_simd_width == RTE_VECT_SIMD_512) {
-#ifdef CC_AVX512_SUPPORT
- if (ad->rx_vec_offload_support)
- ad->rx_func_type = ICE_RX_AVX512_OFFLOAD;
- else
- ad->rx_func_type = ICE_RX_AVX512;
-#endif
- } else if (rx_simd_width == RTE_VECT_SIMD_256) {
- if (ad->rx_vec_offload_support)
- ad->rx_func_type = ICE_RX_AVX2_OFFLOAD;
- else
- ad->rx_func_type = ICE_RX_AVX2;
- } else {
- ad->rx_func_type = ICE_RX_SSE;
- }
- }
- goto out;
+ rx_simd_width = ice_get_max_simd_bitwidth();
+ if (rx_simd_width >= RTE_VECT_SIMD_128)
+ if (ice_rx_vec_dev_check(dev) == -1)
+ rx_simd_width = RTE_VECT_SIMD_DISABLED;
}
-
#endif
+ req_features.simd_width = rx_simd_width;
if (dev->data->scattered_rx)
- /* Set the non-LRO scattered function */
- ad->rx_func_type = ICE_RX_SCATTERED;
- else if (ad->rx_bulk_alloc_allowed)
- ad->rx_func_type = ICE_RX_BULK_ALLOC;
- else
- ad->rx_func_type = ICE_RX_DEFAULT;
+ req_features.other_features_mask |= CI_RX_BURST_FEATURE_SCATTERED;
+ if (ad->rx_bulk_alloc_allowed)
+ req_features.other_features_mask |= CI_RX_BURST_FEATURE_BULK_ALLOC;
+
+ rx_func_type = ci_rx_burst_mode_select(&ice_rx_burst_infos[0],
+ req_features,
+ RTE_DIM(ice_rx_burst_infos),
+ ICE_RX_DEFAULT);
+#ifdef RTE_ARCH_X86
+ int i;
+
+ if (ice_rx_burst_infos[rx_func_type].features.simd_width >= RTE_VECT_SIMD_128)
+ /* Vector function selected. Prepare the rxq accordingly. */
+ for (i = 0; i < dev->data->nb_rx_queues; i++)
+ if (dev->data->rx_queues[i])
+ ice_rxq_vec_setup(dev->data->rx_queues[i]);
+#endif
out:
- dev->rx_pkt_burst = ice_rx_burst_infos[ad->rx_func_type].pkt_burst;
- PMD_DRV_LOG(NOTICE, "Using %s Rx burst function (port %d).",
- ice_rx_burst_infos[ad->rx_func_type].info, dev->data->port_id);
+ dev->rx_pkt_burst = ice_rx_burst_infos[rx_func_type].pkt_burst;
+ PMD_DRV_LOG(NOTICE, "Using %s (port %d).",
+ ice_rx_burst_infos[rx_func_type].info, dev->data->port_id);
}
int
diff --git a/drivers/net/intel/ice/ice_rxtx.h b/drivers/net/intel/ice/ice_rxtx.h
index 8c3d6c413a..e6a18310a0 100644
--- a/drivers/net/intel/ice/ice_rxtx.h
+++ b/drivers/net/intel/ice/ice_rxtx.h
@@ -80,6 +80,34 @@
#define ICE_TX_OFFLOAD_NOTSUP_MASK \
(RTE_MBUF_F_TX_OFFLOAD_MASK ^ ICE_TX_OFFLOAD_MASK)
+#define ICE_RX_NO_OFFLOADS 0
+/* basic scalar path */
+#define ICE_RX_SCALAR_OFFLOADS ( \
+ RTE_ETH_RX_OFFLOAD_VLAN_STRIP | \
+ RTE_ETH_RX_OFFLOAD_KEEP_CRC | \
+ RTE_ETH_RX_OFFLOAD_SCATTER | \
+ RTE_ETH_RX_OFFLOAD_VLAN_FILTER | \
+ RTE_ETH_RX_OFFLOAD_IPV4_CKSUM | \
+ RTE_ETH_RX_OFFLOAD_UDP_CKSUM | \
+ RTE_ETH_RX_OFFLOAD_TCP_CKSUM | \
+ RTE_ETH_RX_OFFLOAD_QINQ_STRIP | \
+ RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM | \
+ RTE_ETH_RX_OFFLOAD_VLAN_EXTEND | \
+ RTE_ETH_RX_OFFLOAD_RSS_HASH | \
+ RTE_ETH_RX_OFFLOAD_TIMESTAMP | \
+ RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT)
+/* basic vector paths */
+#define ICE_RX_VECTOR_OFFLOADS ( \
+ RTE_ETH_RX_OFFLOAD_KEEP_CRC | \
+ RTE_ETH_RX_OFFLOAD_SCATTER | \
+ RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM)
+/* vector offload paths */
+#define ICE_RX_VECTOR_OFFLOAD_OFFLOADS ( \
+ ICE_RX_VECTOR_OFFLOADS | \
+ RTE_ETH_RX_OFFLOAD_CHECKSUM | \
+ RTE_ETH_RX_OFFLOAD_VLAN | \
+ RTE_ETH_RX_OFFLOAD_RSS_HASH)
+
/* Max header size can be 2K - 64 bytes */
#define ICE_RX_HDR_BUF_SIZE (2048 - 64)
diff --git a/drivers/net/intel/ice/ice_rxtx_vec_common.h b/drivers/net/intel/ice/ice_rxtx_vec_common.h
index 5529e06a8d..07996ab2b7 100644
--- a/drivers/net/intel/ice/ice_rxtx_vec_common.h
+++ b/drivers/net/intel/ice/ice_rxtx_vec_common.h
@@ -69,11 +69,6 @@ _ice_rx_queue_release_mbufs_vec(struct ci_rx_queue *rxq)
RTE_ETH_TX_OFFLOAD_UDP_CKSUM | \
RTE_ETH_TX_OFFLOAD_TCP_CKSUM)
-#define ICE_RX_VECTOR_OFFLOAD ( \
- RTE_ETH_RX_OFFLOAD_CHECKSUM | \
- RTE_ETH_RX_OFFLOAD_VLAN | \
- RTE_ETH_RX_OFFLOAD_RSS_HASH)
-
#define ICE_VECTOR_PATH 0
#define ICE_VECTOR_OFFLOAD_PATH 1
@@ -89,10 +84,7 @@ ice_rx_vec_queue_default(struct ci_rx_queue *rxq)
if (rxq->proto_xtr != PROTO_XTR_NONE)
return -1;
- if (rxq->offloads & ICE_RX_VECTOR_OFFLOAD)
- return ICE_VECTOR_OFFLOAD_PATH;
-
- return ICE_VECTOR_PATH;
+ return 0;
}
static inline int
@@ -120,18 +112,15 @@ ice_rx_vec_dev_check_default(struct rte_eth_dev *dev)
int i;
struct ci_rx_queue *rxq;
int ret = 0;
- int result = 0;
for (i = 0; i < dev->data->nb_rx_queues; i++) {
rxq = dev->data->rx_queues[i];
ret = (ice_rx_vec_queue_default(rxq));
if (ret < 0)
- return -1;
- if (ret == ICE_VECTOR_OFFLOAD_PATH)
- result = ret;
+ break;
}
- return result;
+ return ret;
}
static inline int
--
2.34.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [RFC PATCH 13/14] net/iavf: use the common Rx path selection infrastructure
2025-07-25 12:49 [RFC PATCH 00/14] net/intel: rx path selection simplification Ciara Loftus
` (11 preceding siblings ...)
2025-07-25 12:49 ` [RFC PATCH 12/14] net/ice: use the common Rx path selection infrastructure Ciara Loftus
@ 2025-07-25 12:49 ` Ciara Loftus
2025-07-25 12:49 ` [RFC PATCH 14/14] net/i40e: " Ciara Loftus
13 siblings, 0 replies; 24+ messages in thread
From: Ciara Loftus @ 2025-07-25 12:49 UTC (permalink / raw)
To: dev; +Cc: Ciara Loftus
Replace the existing complicated logic with the use of the common
function.
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
drivers/net/intel/iavf/iavf_rxtx.c | 292 +++++++-----------
drivers/net/intel/iavf/iavf_rxtx.h | 50 ++-
drivers/net/intel/iavf/iavf_rxtx_vec_common.h | 14 +-
drivers/net/intel/iavf/iavf_rxtx_vec_neon.c | 6 +
4 files changed, 165 insertions(+), 197 deletions(-)
diff --git a/drivers/net/intel/iavf/iavf_rxtx.c b/drivers/net/intel/iavf/iavf_rxtx.c
index 367dde89ca..01a470ce0c 100644
--- a/drivers/net/intel/iavf/iavf_rxtx.c
+++ b/drivers/net/intel/iavf/iavf_rxtx.c
@@ -3690,70 +3690,105 @@ static uint16_t
iavf_xmit_pkts_no_poll(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts);
-static const struct {
- eth_rx_burst_t pkt_burst;
- const char *info;
-} iavf_rx_pkt_burst_ops[] = {
- [IAVF_RX_DISABLED] = {iavf_recv_pkts_no_poll, "Disabled"},
- [IAVF_RX_DEFAULT] = {iavf_recv_pkts, "Scalar"},
- [IAVF_RX_FLEX_RXD] = {iavf_recv_pkts_flex_rxd, "Scalar Flex"},
- [IAVF_RX_BULK_ALLOC] = {iavf_recv_pkts_bulk_alloc,
- "Scalar Bulk Alloc"},
- [IAVF_RX_SCATTERED] = {iavf_recv_scattered_pkts,
- "Scalar Scattered"},
- [IAVF_RX_SCATTERED_FLEX_RXD] = {iavf_recv_scattered_pkts_flex_rxd,
- "Scalar Scattered Flex"},
+static const struct ci_rx_burst_info iavf_rx_pkt_burst_infos[] = {
+ [IAVF_RX_DISABLED] = {iavf_recv_pkts_no_poll, "Disabled",
+ {IAVF_RX_NO_OFFLOADS, RTE_VECT_SIMD_DISABLED, CI_RX_BURST_FEATURE_IS_DISABLED}},
+ [IAVF_RX_DEFAULT] = {iavf_recv_pkts, "Scalar",
+ {IAVF_RX_SCALAR_OFFLOADS, RTE_VECT_SIMD_DISABLED, CI_RX_BURST_NO_FEATURES}},
+ [IAVF_RX_FLEX_RXD] = {iavf_recv_pkts_flex_rxd, "Scalar Flex",
+ {IAVF_RX_SCALAR_FLEX_OFFLOADS, RTE_VECT_SIMD_DISABLED, CI_RX_BURST_FEATURE_FLEX}},
+ [IAVF_RX_BULK_ALLOC] = {iavf_recv_pkts_bulk_alloc, "Scalar Bulk Alloc",
+ {IAVF_RX_SCALAR_OFFLOADS, RTE_VECT_SIMD_DISABLED, CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [IAVF_RX_SCATTERED] = {iavf_recv_scattered_pkts, "Scalar Scattered",
+ {IAVF_RX_SCALAR_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER, RTE_VECT_SIMD_DISABLED,
+ CI_RX_BURST_FEATURE_SCATTERED}},
+ [IAVF_RX_SCATTERED_FLEX_RXD] = {iavf_recv_scattered_pkts_flex_rxd, "Scalar Scattered Flex",
+ {IAVF_RX_SCALAR_FLEX_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER, RTE_VECT_SIMD_DISABLED,
+ CI_RX_BURST_FEATURE_FLEX | CI_RX_BURST_FEATURE_SCATTERED}},
#ifdef RTE_ARCH_X86
- [IAVF_RX_SSE] = {iavf_recv_pkts_vec, "Vector SSE"},
- [IAVF_RX_AVX2] = {iavf_recv_pkts_vec_avx2, "Vector AVX2"},
- [IAVF_RX_AVX2_OFFLOAD] = {iavf_recv_pkts_vec_avx2_offload,
- "Vector AVX2 Offload"},
- [IAVF_RX_SSE_FLEX_RXD] = {iavf_recv_pkts_vec_flex_rxd,
- "Vector Flex SSE"},
- [IAVF_RX_AVX2_FLEX_RXD] = {iavf_recv_pkts_vec_avx2_flex_rxd,
- "Vector AVX2 Flex"},
+ [IAVF_RX_SSE] = {iavf_recv_pkts_vec, "Vector SSE",
+ {IAVF_RX_VECTOR_OFFLOAD_OFFLOADS, RTE_VECT_SIMD_128,
+ CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [IAVF_RX_AVX2] = {iavf_recv_pkts_vec_avx2, "Vector AVX2",
+ {IAVF_RX_VECTOR_OFFLOADS, RTE_VECT_SIMD_256, CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [IAVF_RX_AVX2_OFFLOAD] = {iavf_recv_pkts_vec_avx2_offload, "Vector AVX2 Offload",
+ {IAVF_RX_VECTOR_OFFLOAD_OFFLOADS, RTE_VECT_SIMD_256,
+ CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [IAVF_RX_SSE_FLEX_RXD] = {iavf_recv_pkts_vec_flex_rxd, "Vector Flex SSE",
+ {IAVF_RX_VECTOR_OFFLOAD_FLEX_OFFLOADS, RTE_VECT_SIMD_128,
+ CI_RX_BURST_FEATURE_FLEX | CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [IAVF_RX_AVX2_FLEX_RXD] = {iavf_recv_pkts_vec_avx2_flex_rxd, "Vector AVX2 Flex",
+ {IAVF_RX_VECTOR_FLEX_OFFLOADS, RTE_VECT_SIMD_256,
+ CI_RX_BURST_FEATURE_FLEX | CI_RX_BURST_FEATURE_BULK_ALLOC}},
[IAVF_RX_AVX2_FLEX_RXD_OFFLOAD] = {
- iavf_recv_pkts_vec_avx2_flex_rxd_offload,
- "Vector AVX2 Flex Offload"},
- [IAVF_RX_SSE_SCATTERED] = {iavf_recv_scattered_pkts_vec,
- "Vector Scattered SSE"},
- [IAVF_RX_AVX2_SCATTERED] = {iavf_recv_scattered_pkts_vec_avx2,
- "Vector Scattered AVX2"},
+ iavf_recv_pkts_vec_avx2_flex_rxd_offload, "Vector AVX2 Flex Offload",
+ {IAVF_RX_VECTOR_OFFLOADS, RTE_VECT_SIMD_256,
+ CI_RX_BURST_FEATURE_FLEX | CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [IAVF_RX_SSE_SCATTERED] = {iavf_recv_scattered_pkts_vec, "Vector Scattered SSE",
+ {IAVF_RX_VECTOR_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER, RTE_VECT_SIMD_128,
+ CI_RX_BURST_FEATURE_SCATTERED | CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [IAVF_RX_AVX2_SCATTERED] = {iavf_recv_scattered_pkts_vec_avx2, "Vector Scattered AVX2",
+ {IAVF_RX_VECTOR_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER, RTE_VECT_SIMD_256,
+ CI_RX_BURST_FEATURE_SCATTERED | CI_RX_BURST_FEATURE_BULK_ALLOC}},
[IAVF_RX_AVX2_SCATTERED_OFFLOAD] = {
- iavf_recv_scattered_pkts_vec_avx2_offload,
- "Vector Scattered AVX2 offload"},
+ iavf_recv_scattered_pkts_vec_avx2_offload, "Vector Scattered AVX2 offload",
+ {IAVF_RX_VECTOR_OFFLOAD_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER, RTE_VECT_SIMD_256,
+ CI_RX_BURST_FEATURE_SCATTERED | CI_RX_BURST_FEATURE_BULK_ALLOC}},
[IAVF_RX_SSE_SCATTERED_FLEX_RXD] = {
- iavf_recv_scattered_pkts_vec_flex_rxd,
- "Vector Scattered SSE Flex"},
+ iavf_recv_scattered_pkts_vec_flex_rxd, "Vector Scattered SSE Flex",
+ {IAVF_RX_VECTOR_OFFLOAD_FLEX_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER,
+ RTE_VECT_SIMD_128,
+ CI_RX_BURST_FEATURE_FLEX | CI_RX_BURST_FEATURE_SCATTERED |
+ CI_RX_BURST_FEATURE_BULK_ALLOC}},
[IAVF_RX_AVX2_SCATTERED_FLEX_RXD] = {
- iavf_recv_scattered_pkts_vec_avx2_flex_rxd,
- "Vector Scattered AVX2 Flex"},
+ iavf_recv_scattered_pkts_vec_avx2_flex_rxd, "Vector Scattered AVX2 Flex",
+ {IAVF_RX_VECTOR_FLEX_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER, RTE_VECT_SIMD_256,
+ CI_RX_BURST_FEATURE_FLEX | CI_RX_BURST_FEATURE_SCATTERED |
+ CI_RX_BURST_FEATURE_BULK_ALLOC}},
[IAVF_RX_AVX2_SCATTERED_FLEX_RXD_OFFLOAD] = {
iavf_recv_scattered_pkts_vec_avx2_flex_rxd_offload,
- "Vector Scattered AVX2 Flex Offload"},
+ "Vector Scattered AVX2 Flex Offload",
+ {IAVF_RX_VECTOR_OFFLOAD_FLEX_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER,
+ RTE_VECT_SIMD_256,
+ CI_RX_BURST_FEATURE_FLEX | CI_RX_BURST_FEATURE_SCATTERED |
+ CI_RX_BURST_FEATURE_BULK_ALLOC}},
#ifdef CC_AVX512_SUPPORT
- [IAVF_RX_AVX512] = {iavf_recv_pkts_vec_avx512, "Vector AVX512"},
- [IAVF_RX_AVX512_OFFLOAD] = {iavf_recv_pkts_vec_avx512_offload,
- "Vector AVX512 Offload"},
- [IAVF_RX_AVX512_FLEX_RXD] = {iavf_recv_pkts_vec_avx512_flex_rxd,
- "Vector AVX512 Flex"},
+ [IAVF_RX_AVX512] = {iavf_recv_pkts_vec_avx512, "Vector AVX512",
+ {IAVF_RX_VECTOR_OFFLOADS, RTE_VECT_SIMD_512, CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [IAVF_RX_AVX512_OFFLOAD] = {iavf_recv_pkts_vec_avx512_offload, "Vector AVX512 Offload",
+ {IAVF_RX_VECTOR_OFFLOAD_OFFLOADS, RTE_VECT_SIMD_512,
+ CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [IAVF_RX_AVX512_FLEX_RXD] = {iavf_recv_pkts_vec_avx512_flex_rxd, "Vector AVX512 Flex",
+ {IAVF_RX_VECTOR_FLEX_OFFLOADS, RTE_VECT_SIMD_512,
+ CI_RX_BURST_FEATURE_FLEX | CI_RX_BURST_FEATURE_BULK_ALLOC}},
[IAVF_RX_AVX512_FLEX_RXD_OFFLOAD] = {
- iavf_recv_pkts_vec_avx512_flex_rxd_offload,
- "Vector AVX512 Flex Offload"},
- [IAVF_RX_AVX512_SCATTERED] = {iavf_recv_scattered_pkts_vec_avx512,
- "Vector Scattered AVX512"},
+ iavf_recv_pkts_vec_avx512_flex_rxd_offload, "Vector AVX512 Flex Offload",
+ {IAVF_RX_VECTOR_OFFLOAD_FLEX_OFFLOADS, RTE_VECT_SIMD_512,
+ CI_RX_BURST_FEATURE_FLEX | CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [IAVF_RX_AVX512_SCATTERED] = {
+ iavf_recv_scattered_pkts_vec_avx512, "Vector Scattered AVX512",
+ {IAVF_RX_VECTOR_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER, RTE_VECT_SIMD_512,
+ CI_RX_BURST_FEATURE_SCATTERED | CI_RX_BURST_FEATURE_BULK_ALLOC}},
[IAVF_RX_AVX512_SCATTERED_OFFLOAD] = {
- iavf_recv_scattered_pkts_vec_avx512_offload,
- "Vector Scattered AVX512 offload"},
+ iavf_recv_scattered_pkts_vec_avx512_offload, "Vector Scattered AVX512 offload",
+ {IAVF_RX_VECTOR_OFFLOAD_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER, RTE_VECT_SIMD_512,
+ CI_RX_BURST_FEATURE_SCATTERED | CI_RX_BURST_FEATURE_BULK_ALLOC}},
[IAVF_RX_AVX512_SCATTERED_FLEX_RXD] = {
- iavf_recv_scattered_pkts_vec_avx512_flex_rxd,
- "Vector Scattered AVX512 Flex"},
+ iavf_recv_scattered_pkts_vec_avx512_flex_rxd, "Vector Scattered AVX512 Flex",
+ {IAVF_RX_VECTOR_FLEX_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER, RTE_VECT_SIMD_512,
+ CI_RX_BURST_FEATURE_FLEX | CI_RX_BURST_FEATURE_SCATTERED |
+ CI_RX_BURST_FEATURE_BULK_ALLOC}},
[IAVF_RX_AVX512_SCATTERED_FLEX_RXD_OFFLOAD] = {
iavf_recv_scattered_pkts_vec_avx512_flex_rxd_offload,
- "Vector Scattered AVX512 Flex offload"},
+ "Vector Scattered AVX512 Flex offload",
+ {IAVF_RX_VECTOR_OFFLOAD_FLEX_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER,
+ RTE_VECT_SIMD_512,
+ CI_RX_BURST_FEATURE_FLEX | CI_RX_BURST_FEATURE_SCATTERED |
+ CI_RX_BURST_FEATURE_BULK_ALLOC}},
#endif
#elif defined RTE_ARCH_ARM
- [IAVF_RX_SSE] = {iavf_recv_pkts_vec, "Vector Neon"},
+ [IAVF_RX_SSE] = {iavf_recv_pkts_vec, "Vector Neon",
+ {IAVF_RX_SCALAR_OFFLOADS, RTE_VECT_SIMD_128, CI_RX_BURST_FEATURE_BULK_ALLOC}},
#endif
};
@@ -3765,10 +3800,10 @@ iavf_rx_burst_mode_get(struct rte_eth_dev *dev,
eth_rx_burst_t pkt_burst = dev->rx_pkt_burst;
size_t i;
- for (i = 0; i < RTE_DIM(iavf_rx_pkt_burst_ops); i++) {
- if (pkt_burst == iavf_rx_pkt_burst_ops[i].pkt_burst) {
+ for (i = 0; i < RTE_DIM(iavf_rx_pkt_burst_infos); i++) {
+ if (pkt_burst == iavf_rx_pkt_burst_infos[i].pkt_burst) {
snprintf(mode->info, sizeof(mode->info), "%s",
- iavf_rx_pkt_burst_ops[i].info);
+ iavf_rx_pkt_burst_infos[i].info);
return 0;
}
}
@@ -3831,7 +3866,7 @@ iavf_recv_pkts_no_poll(void *rx_queue, struct rte_mbuf **rx_pkts,
rx_func_type = rxq->iavf_vsi->adapter->rx_func_type;
- return iavf_rx_pkt_burst_ops[rx_func_type].pkt_burst(rx_queue,
+ return iavf_rx_pkt_burst_infos[rx_func_type].pkt_burst(rx_queue,
rx_pkts, nb_pkts);
}
@@ -3942,10 +3977,16 @@ iavf_set_rx_function(struct rte_eth_dev *dev)
struct iavf_adapter *adapter =
IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
+ enum iavf_rx_func_type default_path = IAVF_RX_DEFAULT;
int no_poll_on_link_down = adapter->devargs.no_poll_on_link_down;
int i;
struct ci_rx_queue *rxq;
bool use_flex = true;
+ struct ci_rx_burst_features req_features = {
+ .rx_offloads = dev->data->dev_conf.rxmode.offloads,
+ .simd_width = RTE_VECT_SIMD_DISABLED,
+ .other_features_mask = CI_RX_BURST_NO_FEATURES
+ };
/* The primary process selects the rx path for all processes. */
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
@@ -3964,143 +4005,32 @@ iavf_set_rx_function(struct rte_eth_dev *dev)
}
}
-#ifdef RTE_ARCH_X86
- int check_ret;
- bool use_avx2 = false;
- bool use_avx512 = false;
- enum rte_vect_max_simd rx_simd_path = iavf_get_max_simd_bitwidth();
-
- check_ret = iavf_rx_vec_dev_check(dev);
- if (check_ret >= 0 &&
- rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
- use_avx2 = rx_simd_path == RTE_VECT_SIMD_256;
- use_avx512 = rx_simd_path == RTE_VECT_SIMD_512;
-
- for (i = 0; i < dev->data->nb_rx_queues; i++) {
- rxq = dev->data->rx_queues[i];
- (void)iavf_rxq_vec_setup(rxq);
- }
-
- if (dev->data->scattered_rx) {
- if (use_flex) {
- adapter->rx_func_type = IAVF_RX_SSE_SCATTERED_FLEX_RXD;
- if (use_avx2) {
- if (check_ret == IAVF_VECTOR_PATH)
- adapter->rx_func_type =
- IAVF_RX_AVX2_SCATTERED_FLEX_RXD;
- else
- adapter->rx_func_type =
- IAVF_RX_AVX2_SCATTERED_FLEX_RXD_OFFLOAD;
- }
-#ifdef CC_AVX512_SUPPORT
- if (use_avx512) {
- if (check_ret == IAVF_VECTOR_PATH)
- adapter->rx_func_type =
- IAVF_RX_AVX512_SCATTERED_FLEX_RXD;
- else
- adapter->rx_func_type =
- IAVF_RX_AVX512_SCATTERED_FLEX_RXD_OFFLOAD;
- }
-#endif
- } else {
- adapter->rx_func_type = IAVF_RX_SSE_SCATTERED;
- if (use_avx2) {
- if (check_ret == IAVF_VECTOR_PATH)
- adapter->rx_func_type =
- IAVF_RX_AVX2_SCATTERED;
- else
- adapter->rx_func_type =
- IAVF_RX_AVX2_SCATTERED_OFFLOAD;
- }
-#ifdef CC_AVX512_SUPPORT
- if (use_avx512) {
- if (check_ret == IAVF_VECTOR_PATH)
- adapter->rx_func_type =
- IAVF_RX_AVX512_SCATTERED;
- else
- adapter->rx_func_type =
- IAVF_RX_AVX512_SCATTERED_OFFLOAD;
- }
-#endif
- }
- } else {
- if (use_flex) {
- adapter->rx_func_type = IAVF_RX_SSE_FLEX_RXD;
- if (use_avx2) {
- if (check_ret == IAVF_VECTOR_PATH)
- adapter->rx_func_type = IAVF_RX_AVX2_FLEX_RXD;
- else
- adapter->rx_func_type =
- IAVF_RX_AVX2_FLEX_RXD_OFFLOAD;
- }
-#ifdef CC_AVX512_SUPPORT
- if (use_avx512) {
- if (check_ret == IAVF_VECTOR_PATH)
- adapter->rx_func_type = IAVF_RX_AVX512_FLEX_RXD;
- else
- adapter->rx_func_type =
- IAVF_RX_AVX512_FLEX_RXD_OFFLOAD;
- }
+ if (use_flex)
+ req_features.other_features_mask |= CI_RX_BURST_FEATURE_FLEX;
+ if (dev->data->scattered_rx)
+ req_features.other_features_mask |= CI_RX_BURST_FEATURE_SCATTERED;
+ if (adapter->rx_bulk_alloc_allowed) {
+ req_features.other_features_mask |= CI_RX_BURST_FEATURE_BULK_ALLOC;
+ default_path = IAVF_RX_BULK_ALLOC;
+#if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM)
+ if (iavf_rx_vec_dev_check(dev) != -1)
+ req_features.simd_width = iavf_get_max_simd_bitwidth();
#endif
- } else {
- adapter->rx_func_type = IAVF_RX_SSE;
- if (use_avx2) {
- if (check_ret == IAVF_VECTOR_PATH)
- adapter->rx_func_type = IAVF_RX_AVX2;
- else
- adapter->rx_func_type = IAVF_RX_AVX2_OFFLOAD;
- }
-#ifdef CC_AVX512_SUPPORT
- if (use_avx512) {
- if (check_ret == IAVF_VECTOR_PATH)
- adapter->rx_func_type = IAVF_RX_AVX512;
- else
- adapter->rx_func_type = IAVF_RX_AVX512_OFFLOAD;
- }
-#endif
- }
- }
- goto out;
}
-#elif defined RTE_ARCH_ARM
- int check_ret;
-
- check_ret = iavf_rx_vec_dev_check(dev);
- if (check_ret >= 0 &&
- rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
- PMD_DRV_LOG(DEBUG, "Using a Vector Rx callback (port=%d).",
- dev->data->port_id);
- for (i = 0; i < dev->data->nb_rx_queues; i++) {
- rxq = dev->data->rx_queues[i];
- (void)iavf_rxq_vec_setup(rxq);
- }
- adapter->rx_func_type = IAVF_RX_SSE;
- goto out;
- }
-#endif
- if (dev->data->scattered_rx) {
- if (use_flex)
- adapter->rx_func_type = IAVF_RX_SCATTERED_FLEX_RXD;
- else
- adapter->rx_func_type = IAVF_RX_SCATTERED;
- } else if (adapter->rx_bulk_alloc_allowed) {
- adapter->rx_func_type = IAVF_RX_BULK_ALLOC;
- } else {
- if (use_flex)
- adapter->rx_func_type = IAVF_RX_FLEX_RXD;
- else
- adapter->rx_func_type = IAVF_RX_DEFAULT;
- }
+ adapter->rx_func_type = ci_rx_burst_mode_select(&iavf_rx_pkt_burst_infos[0],
+ req_features,
+ RTE_DIM(iavf_rx_pkt_burst_infos),
+ default_path);
out:
if (no_poll_on_link_down)
dev->rx_pkt_burst = iavf_recv_pkts_no_poll;
else
- dev->rx_pkt_burst = iavf_rx_pkt_burst_ops[adapter->rx_func_type].pkt_burst;
+ dev->rx_pkt_burst = iavf_rx_pkt_burst_infos[adapter->rx_func_type].pkt_burst;
- PMD_DRV_LOG(NOTICE, "Using %s Rx burst function (port %d).",
- iavf_rx_pkt_burst_ops[adapter->rx_func_type].info, dev->data->port_id);
+ PMD_DRV_LOG(NOTICE, "Using %s (port %d).",
+ iavf_rx_pkt_burst_infos[adapter->rx_func_type].info, dev->data->port_id);
}
/* choose tx function*/
diff --git a/drivers/net/intel/iavf/iavf_rxtx.h b/drivers/net/intel/iavf/iavf_rxtx.h
index 36157003e3..2e85348cb2 100644
--- a/drivers/net/intel/iavf/iavf_rxtx.h
+++ b/drivers/net/intel/iavf/iavf_rxtx.h
@@ -56,12 +56,50 @@
RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM | \
RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM)
-#define IAVF_RX_VECTOR_OFFLOAD ( \
- RTE_ETH_RX_OFFLOAD_CHECKSUM | \
- RTE_ETH_RX_OFFLOAD_SCTP_CKSUM | \
- RTE_ETH_RX_OFFLOAD_VLAN | \
- RTE_ETH_RX_OFFLOAD_RSS_HASH | \
- RTE_ETH_RX_OFFLOAD_TIMESTAMP)
+#define IAVF_RX_NO_OFFLOADS 0
+/* basic scalar path */
+#define IAVF_RX_SCALAR_OFFLOADS ( \
+ RTE_ETH_RX_OFFLOAD_VLAN_STRIP | \
+ RTE_ETH_RX_OFFLOAD_QINQ_STRIP | \
+ RTE_ETH_RX_OFFLOAD_IPV4_CKSUM | \
+ RTE_ETH_RX_OFFLOAD_UDP_CKSUM | \
+ RTE_ETH_RX_OFFLOAD_TCP_CKSUM | \
+ RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM | \
+ RTE_ETH_RX_OFFLOAD_SCATTER | \
+ RTE_ETH_RX_OFFLOAD_VLAN_FILTER | \
+ RTE_ETH_RX_OFFLOAD_VLAN_EXTEND | \
+ RTE_ETH_RX_OFFLOAD_SCATTER | \
+ RTE_ETH_RX_OFFLOAD_RSS_HASH | \
+ RTE_ETH_RX_OFFLOAD_OUTER_UDP_CKSUM | \
+ RTE_ETH_RX_OFFLOAD_KEEP_CRC)
+/* scalar path that uses the flex rx desc */
+#define IAVF_RX_SCALAR_FLEX_OFFLOADS ( \
+ IAVF_RX_SCALAR_OFFLOADS | \
+ RTE_ETH_RX_OFFLOAD_TIMESTAMP | \
+ RTE_ETH_RX_OFFLOAD_SECURITY)
+/* basic vector paths */
+#define IAVF_RX_VECTOR_OFFLOADS ( \
+ RTE_ETH_RX_OFFLOAD_KEEP_CRC | \
+ RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM | \
+ RTE_ETH_RX_OFFLOAD_SCATTER)
+/* vector paths that use the flex rx desc */
+#define IAVF_RX_VECTOR_FLEX_OFFLOADS ( \
+ IAVF_RX_VECTOR_OFFLOADS | \
+ RTE_ETH_RX_OFFLOAD_TIMESTAMP | \
+ RTE_ETH_RX_OFFLOAD_SECURITY)
+/* vector offload paths */
+#define IAVF_RX_VECTOR_OFFLOAD_OFFLOADS ( \
+ IAVF_RX_VECTOR_OFFLOADS | \
+ RTE_ETH_RX_OFFLOAD_CHECKSUM | \
+ RTE_ETH_RX_OFFLOAD_SCTP_CKSUM | \
+ RTE_ETH_RX_OFFLOAD_VLAN | \
+ RTE_ETH_RX_OFFLOAD_RSS_HASH)
+/* vector offload paths that use the flex rx desc */
+#define IAVF_RX_VECTOR_OFFLOAD_FLEX_OFFLOADS ( \
+ IAVF_RX_VECTOR_OFFLOAD_OFFLOADS | \
+ RTE_ETH_RX_OFFLOAD_TIMESTAMP | \
+ RTE_ETH_RX_OFFLOAD_SECURITY)
+
/**
* According to the vlan capabilities returned by the driver and FW, the vlan tci
diff --git a/drivers/net/intel/iavf/iavf_rxtx_vec_common.h b/drivers/net/intel/iavf/iavf_rxtx_vec_common.h
index 9b14fc7d12..0d0bde6cb3 100644
--- a/drivers/net/intel/iavf/iavf_rxtx_vec_common.h
+++ b/drivers/net/intel/iavf/iavf_rxtx_vec_common.h
@@ -67,10 +67,7 @@ iavf_rx_vec_queue_default(struct ci_rx_queue *rxq)
if (rxq->proto_xtr != IAVF_PROTO_XTR_NONE)
return -1;
- if (rxq->offloads & IAVF_RX_VECTOR_OFFLOAD)
- return IAVF_VECTOR_OFFLOAD_PATH;
-
- return IAVF_VECTOR_PATH;
+ return 0;
}
static inline int
@@ -117,20 +114,17 @@ iavf_rx_vec_dev_check_default(struct rte_eth_dev *dev)
{
int i;
struct ci_rx_queue *rxq;
- int ret;
- int result = 0;
+ int ret = 0;
for (i = 0; i < dev->data->nb_rx_queues; i++) {
rxq = dev->data->rx_queues[i];
ret = iavf_rx_vec_queue_default(rxq);
if (ret < 0)
- return -1;
- if (ret > result)
- result = ret;
+ break;
}
- return result;
+ return ret;
}
static inline int
diff --git a/drivers/net/intel/iavf/iavf_rxtx_vec_neon.c b/drivers/net/intel/iavf/iavf_rxtx_vec_neon.c
index 4ed4e9b336..28c90b2a72 100644
--- a/drivers/net/intel/iavf/iavf_rxtx_vec_neon.c
+++ b/drivers/net/intel/iavf/iavf_rxtx_vec_neon.c
@@ -360,3 +360,9 @@ iavf_rx_vec_dev_check(struct rte_eth_dev *dev)
{
return iavf_rx_vec_dev_check_default(dev);
}
+
+enum rte_vect_max_simd
+iavf_get_max_simd_bitwidth(void)
+{
+ return RTE_MIN(128, rte_vect_get_max_simd_bitwidth());
+}
--
2.34.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [RFC PATCH 14/14] net/i40e: use the common Rx path selection infrastructure
2025-07-25 12:49 [RFC PATCH 00/14] net/intel: rx path selection simplification Ciara Loftus
` (12 preceding siblings ...)
2025-07-25 12:49 ` [RFC PATCH 13/14] net/iavf: " Ciara Loftus
@ 2025-07-25 12:49 ` Ciara Loftus
13 siblings, 0 replies; 24+ messages in thread
From: Ciara Loftus @ 2025-07-25 12:49 UTC (permalink / raw)
To: dev; +Cc: Ciara Loftus
Replace the existing complicated logic with the use of the common function.
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
drivers/net/intel/i40e/i40e_rxtx.c | 145 +++++++++---------
drivers/net/intel/i40e/i40e_rxtx.h | 15 ++
.../net/intel/i40e/i40e_rxtx_vec_altivec.c | 6 +
drivers/net/intel/i40e/i40e_rxtx_vec_common.h | 9 +-
drivers/net/intel/i40e/i40e_rxtx_vec_neon.c | 6 +
5 files changed, 98 insertions(+), 83 deletions(-)
diff --git a/drivers/net/intel/i40e/i40e_rxtx.c b/drivers/net/intel/i40e/i40e_rxtx.c
index c0e217cd73..5adb134667 100644
--- a/drivers/net/intel/i40e/i40e_rxtx.c
+++ b/drivers/net/intel/i40e/i40e_rxtx.c
@@ -3284,29 +3284,43 @@ i40e_recycle_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
}
}
-static const struct {
- eth_rx_burst_t pkt_burst;
- const char *info;
-} i40e_rx_burst_infos[] = {
- [I40E_RX_SCATTERED] = { i40e_recv_scattered_pkts, "Scalar Scattered" },
- [I40E_RX_BULK_ALLOC] = { i40e_recv_pkts_bulk_alloc, "Scalar Bulk Alloc" },
- [I40E_RX_DEFAULT] = { i40e_recv_pkts, "Scalar" },
+static const struct ci_rx_burst_info i40e_rx_burst_infos[] = {
+ [I40E_RX_SCATTERED] = { i40e_recv_scattered_pkts, "Scalar Scattered",
+ {I40E_RX_SCALAR_OFFLOADS, RTE_VECT_SIMD_DISABLED, CI_RX_BURST_FEATURE_SCATTERED}},
+ [I40E_RX_BULK_ALLOC] = { i40e_recv_pkts_bulk_alloc, "Scalar Bulk Alloc",
+ {I40E_RX_SCALAR_OFFLOADS, RTE_VECT_SIMD_DISABLED, CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [I40E_RX_DEFAULT] = { i40e_recv_pkts, "Scalar",
+ {I40E_RX_SCALAR_OFFLOADS, RTE_VECT_SIMD_DISABLED, CI_RX_BURST_NO_FEATURES}},
#ifdef RTE_ARCH_X86
#ifdef CC_AVX512_SUPPORT
- [I40E_RX_AVX512_SCATTERED] = {
- i40e_recv_scattered_pkts_vec_avx512, "Vector AVX512 Scattered" },
- [I40E_RX_AVX512] = { i40e_recv_pkts_vec_avx512, "Vector AVX512" },
+ [I40E_RX_AVX512_SCATTERED] = { i40e_recv_scattered_pkts_vec_avx512,
+ "Vector AVX512 Scattered", {I40E_RX_VECTOR_OFFLOADS, RTE_VECT_SIMD_512,
+ CI_RX_BURST_FEATURE_SCATTERED | CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [I40E_RX_AVX512] = { i40e_recv_pkts_vec_avx512, "Vector AVX512",
+ {I40E_RX_VECTOR_OFFLOADS, RTE_VECT_SIMD_512, CI_RX_BURST_FEATURE_BULK_ALLOC}},
#endif
- [I40E_RX_AVX2_SCATTERED] = { i40e_recv_scattered_pkts_vec_avx2, "Vector AVX2 Scattered" },
- [I40E_RX_AVX2] = { i40e_recv_pkts_vec_avx2, "Vector AVX2" },
- [I40E_RX_SSE_SCATTERED] = { i40e_recv_scattered_pkts_vec, "Vector SSE Scattered" },
- [I40E_RX_SSE] = { i40e_recv_pkts_vec, "Vector SSE" },
-#elif defined(RTE_ARCH_ARM64)
- [I40E_RX_NEON_SCATTERED] = { i40e_recv_scattered_pkts_vec, "Vector Neon Scattered" },
- [I40E_RX_NEON] = { i40e_recv_pkts_vec, "Vector Neon" },
+ [I40E_RX_AVX2_SCATTERED] = { i40e_recv_scattered_pkts_vec_avx2, "Vector AVX2 Scattered",
+ {I40E_RX_VECTOR_OFFLOADS, RTE_VECT_SIMD_256,
+ CI_RX_BURST_FEATURE_SCATTERED | CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [I40E_RX_AVX2] = { i40e_recv_pkts_vec_avx2, "Vector AVX2",
+ {I40E_RX_VECTOR_OFFLOADS, RTE_VECT_SIMD_256, CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [I40E_RX_SSE_SCATTERED] = { i40e_recv_scattered_pkts_vec, "Vector SSE Scattered",
+ {I40E_RX_VECTOR_OFFLOADS, RTE_VECT_SIMD_128,
+ CI_RX_BURST_FEATURE_SCATTERED | CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [I40E_RX_SSE] = { i40e_recv_pkts_vec, "Vector SSE",
+ {I40E_RX_VECTOR_OFFLOADS, RTE_VECT_SIMD_128, CI_RX_BURST_FEATURE_BULK_ALLOC}},
+#elif defined(RTE_ARCH_ARM64) /* TODO: update offloads for NEON and Altivec */
+ [I40E_RX_NEON_SCATTERED] = { i40e_recv_scattered_pkts_vec, "Vector Neon Scattered",
+ {I40E_RX_SCALAR_OFFLOADS, RTE_VECT_SIMD_128,
+ CI_RX_BURST_FEATURE_SCATTERED | CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [I40E_RX_NEON] = { i40e_recv_pkts_vec, "Vector Neon",
+ {I40E_RX_SCALAR_OFFLOADS, RTE_VECT_SIMD_128, CI_RX_BURST_FEATURE_BULK_ALLOC}},
#elif defined(RTE_ARCH_PPC_64)
- [I40E_RX_ALTIVEC_SCATTERED] = { i40e_recv_scattered_pkts_vec, "Vector AltiVec Scattered" },
- [I40E_RX_ALTIVEC] = { i40e_recv_pkts_vec, "Vector AltiVec" },
+ [I40E_RX_ALTIVEC_SCATTERED] = { i40e_recv_scattered_pkts_vec, "Vector AltiVec Scattered",
+ {I40E_RX_SCALAR_OFFLOADS, RTE_VECT_SIMD_128,
+ CI_RX_BURST_FEATURE_SCATTERED | CI_RX_BURST_FEATURE_BULK_ALLOC}},
+ [I40E_RX_ALTIVEC] = { i40e_recv_pkts_vec, "Vector AltiVec",
+ {I40E_RX_SCALAR_OFFLOADS, RTE_VECT_SIMD_128, CI_RX_BURST_FEATURE_BULK_ALLOC}},
#endif
};
@@ -3315,7 +3329,13 @@ i40e_set_rx_function(struct rte_eth_dev *dev)
{
struct i40e_adapter *ad =
I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
+ struct ci_rx_burst_features req_features = {
+ .rx_offloads = dev->data->dev_conf.rxmode.offloads,
+ .simd_width = RTE_VECT_SIMD_DISABLED,
+ .other_features_mask = CI_RX_BURST_NO_FEATURES
+ };
uint16_t vector_rx, i;
+ enum rte_vect_max_simd rx_simd_width = i40e_get_max_simd_bitwidth();
/* The primary process selects the rx path for all processes. */
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
@@ -3324,76 +3344,51 @@ i40e_set_rx_function(struct rte_eth_dev *dev)
/* In order to allow Vector Rx there are a few configuration
* conditions to be met and Rx Bulk Allocation should be allowed.
*/
-#ifdef RTE_ARCH_X86
- enum rte_vect_max_simd rx_simd_width = i40e_get_max_simd_bitwidth();
-#endif
+
if (i40e_rx_vec_dev_conf_condition_check(dev) || !ad->rx_bulk_alloc_allowed) {
PMD_INIT_LOG(DEBUG, "Port[%d] doesn't meet"
" Vector Rx preconditions",
dev->data->port_id);
- ad->rx_vec_allowed = false;
+ rx_simd_width = RTE_VECT_SIMD_DISABLED;
}
- if (ad->rx_vec_allowed) {
+ if (rx_simd_width != RTE_VECT_SIMD_DISABLED) {
for (i = 0; i < dev->data->nb_rx_queues; i++) {
struct ci_rx_queue *rxq =
dev->data->rx_queues[i];
if (rxq && i40e_rxq_vec_setup(rxq)) {
- ad->rx_vec_allowed = false;
+ rx_simd_width = RTE_VECT_SIMD_DISABLED;
break;
}
}
}
- if (ad->rx_vec_allowed && rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
-#ifdef RTE_ARCH_X86
- if (dev->data->scattered_rx) {
- if (rx_simd_width == RTE_VECT_SIMD_512) {
-#ifdef CC_AVX512_SUPPORT
- ad->rx_func_type = I40E_RX_AVX512_SCATTERED;
-#endif
- } else {
- ad->rx_func_type = (rx_simd_width == RTE_VECT_SIMD_256) ?
- I40E_RX_AVX2_SCATTERED :
- I40E_RX_SCATTERED;
- dev->recycle_rx_descriptors_refill =
- i40e_recycle_rx_descriptors_refill_vec;
- }
- } else {
- if (rx_simd_width == RTE_VECT_SIMD_512) {
-#ifdef CC_AVX512_SUPPORT
- ad->rx_func_type = I40E_RX_AVX512;
-#endif
- } else {
- ad->rx_func_type = (rx_simd_width == RTE_VECT_SIMD_256) ?
- I40E_RX_AVX2 :
- I40E_RX_SSE;
- dev->recycle_rx_descriptors_refill =
- i40e_recycle_rx_descriptors_refill_vec;
- }
- }
-#elif defined(RTE_ARCH_ARM64)
+ req_features.simd_width = rx_simd_width;
+ if (dev->data->scattered_rx)
+ req_features.other_features_mask |= CI_RX_BURST_FEATURE_SCATTERED;
+ if (ad->rx_bulk_alloc_allowed)
+ req_features.other_features_mask |= CI_RX_BURST_FEATURE_BULK_ALLOC;
+
+ ad->rx_func_type = ci_rx_burst_mode_select(&i40e_rx_burst_infos[0],
+ req_features,
+ RTE_DIM(i40e_rx_burst_infos),
+ I40E_RX_DEFAULT);
+ if (i40e_rx_burst_infos[ad->rx_func_type].features.simd_width >= RTE_VECT_SIMD_128)
+ /* Vector function selected. Prepare the rxq accordingly. */
+ for (i = 0; i < dev->data->nb_rx_queues; i++)
+ if (dev->data->rx_queues[i])
+ i40e_rxq_vec_setup(dev->data->rx_queues[i]);
+
+ if (i40e_rx_burst_infos[ad->rx_func_type].features.simd_width >= RTE_VECT_SIMD_128 &&
+ i40e_rx_burst_infos[ad->rx_func_type].features.simd_width <
+ RTE_VECT_SIMD_512)
dev->recycle_rx_descriptors_refill = i40e_recycle_rx_descriptors_refill_vec;
- if (dev->data->scattered_rx)
- ad->rx_func_type = I40E_RX_NEON_SCATTERED;
- else
- ad->rx_func_type = I40E_RX_NEON;
-#elif defined(RTE_ARCH_PPC_64)
- dev->recycle_rx_descriptors_refill = i40e_recycle_rx_descriptors_refill_vec;
- if (dev->data->scattered_rx)
- ad->rx_func_type = I40E_RX_ALTIVEC_SCATTERED;
- else
- ad->rx_func_type = I40E_RX_ALTIVEC;
-#endif /* RTE_ARCH_X86 */
- } else if (!dev->data->scattered_rx && ad->rx_bulk_alloc_allowed) {
- dev->rx_pkt_burst = i40e_recv_pkts_bulk_alloc;
- } else {
- /* Simple Rx Path. */
- dev->rx_pkt_burst = dev->data->scattered_rx ?
- i40e_recv_scattered_pkts :
- i40e_recv_pkts;
- }
+
+out:
+ dev->rx_pkt_burst = i40e_rx_burst_infos[ad->rx_func_type].pkt_burst;
+ PMD_DRV_LOG(NOTICE, "Using %s (port %d).",
+ i40e_rx_burst_infos[ad->rx_func_type].info, dev->data->port_id);
/* Propagate information about RX function choice through all queues. */
if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
@@ -3415,10 +3410,8 @@ i40e_set_rx_function(struct rte_eth_dev *dev)
}
}
-out:
- dev->rx_pkt_burst = i40e_rx_burst_infos[ad->rx_func_type].pkt_burst;
- PMD_DRV_LOG(NOTICE, "Using %s Rx burst function (port %d).",
- i40e_rx_burst_infos[ad->rx_func_type].info, dev->data->port_id);
+ ad->rx_vec_allowed = i40e_rx_burst_infos[ad->rx_func_type].features.simd_width >=
+ RTE_VECT_SIMD_128;
}
int
diff --git a/drivers/net/intel/i40e/i40e_rxtx.h b/drivers/net/intel/i40e/i40e_rxtx.h
index b867e18daf..5d5d4e08b0 100644
--- a/drivers/net/intel/i40e/i40e_rxtx.h
+++ b/drivers/net/intel/i40e/i40e_rxtx.h
@@ -67,6 +67,21 @@ enum i40e_header_split_mode {
I40E_HEADER_SPLIT_UDP_TCP | \
I40E_HEADER_SPLIT_SCTP)
+#define I40E_RX_SCALAR_OFFLOADS ( \
+ RTE_ETH_RX_OFFLOAD_VLAN_STRIP | \
+ RTE_ETH_RX_OFFLOAD_QINQ_STRIP | \
+ RTE_ETH_RX_OFFLOAD_IPV4_CKSUM | \
+ RTE_ETH_RX_OFFLOAD_UDP_CKSUM | \
+ RTE_ETH_RX_OFFLOAD_TCP_CKSUM | \
+ RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM | \
+ RTE_ETH_RX_OFFLOAD_KEEP_CRC | \
+ RTE_ETH_RX_OFFLOAD_SCATTER | \
+ RTE_ETH_RX_OFFLOAD_VLAN_EXTEND | \
+ RTE_ETH_RX_OFFLOAD_VLAN_FILTER | \
+ RTE_ETH_RX_OFFLOAD_RSS_HASH)
+
+#define I40E_RX_VECTOR_OFFLOADS I40E_RX_SCALAR_OFFLOADS
+
/** Offload features */
union i40e_tx_offload {
uint64_t data;
diff --git a/drivers/net/intel/i40e/i40e_rxtx_vec_altivec.c b/drivers/net/intel/i40e/i40e_rxtx_vec_altivec.c
index 8a4a1a77bf..87a57e7520 100644
--- a/drivers/net/intel/i40e/i40e_rxtx_vec_altivec.c
+++ b/drivers/net/intel/i40e/i40e_rxtx_vec_altivec.c
@@ -558,3 +558,9 @@ i40e_rx_vec_dev_conf_condition_check(struct rte_eth_dev *dev)
{
return i40e_rx_vec_dev_conf_condition_check_default(dev);
}
+
+enum rte_vect_max_simd
+i40e_get_max_simd_bitwidth(void)
+{
+ return rte_vect_get_max_simd_bitwidth();
+}
diff --git a/drivers/net/intel/i40e/i40e_rxtx_vec_common.h b/drivers/net/intel/i40e/i40e_rxtx_vec_common.h
index d19b9e4bf4..e118df9ce0 100644
--- a/drivers/net/intel/i40e/i40e_rxtx_vec_common.h
+++ b/drivers/net/intel/i40e/i40e_rxtx_vec_common.h
@@ -54,8 +54,6 @@ static inline int
i40e_rx_vec_dev_conf_condition_check_default(struct rte_eth_dev *dev)
{
#ifndef RTE_LIBRTE_IEEE1588
- struct i40e_adapter *ad =
- I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
/* no QinQ support */
@@ -66,15 +64,12 @@ i40e_rx_vec_dev_conf_condition_check_default(struct rte_eth_dev *dev)
* Vector mode is allowed only when number of Rx queue
* descriptor is power of 2.
*/
- ad->rx_vec_allowed = true;
for (uint16_t i = 0; i < dev->data->nb_rx_queues; i++) {
struct ci_rx_queue *rxq = dev->data->rx_queues[i];
if (!rxq)
continue;
- if (!ci_rxq_vec_capable(rxq->nb_rx_desc, rxq->rx_free_thresh, rxq->offloads)) {
- ad->rx_vec_allowed = false;
- break;
- }
+ if (!ci_rxq_vec_capable(rxq->nb_rx_desc, rxq->rx_free_thresh, rxq->offloads))
+ return -1;
}
return 0;
diff --git a/drivers/net/intel/i40e/i40e_rxtx_vec_neon.c b/drivers/net/intel/i40e/i40e_rxtx_vec_neon.c
index 64ffb2f6df..c9098e4c1a 100644
--- a/drivers/net/intel/i40e/i40e_rxtx_vec_neon.c
+++ b/drivers/net/intel/i40e/i40e_rxtx_vec_neon.c
@@ -708,3 +708,9 @@ i40e_rx_vec_dev_conf_condition_check(struct rte_eth_dev *dev)
{
return i40e_rx_vec_dev_conf_condition_check_default(dev);
}
+
+enum rte_vect_max_simd
+i40e_get_max_simd_bitwidth(void)
+{
+ return rte_vect_get_max_simd_bitwidth();
+}
--
2.34.1
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