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From: Bruce Richardson <bruce.richardson@intel.com>
To: Ciara Loftus <ciara.loftus@intel.com>
Cc: <dev@dpdk.org>
Subject: Re: [RFC PATCH 05/14] net/intel: introduce common vector capability function
Date: Fri, 25 Jul 2025 14:45:36 +0100	[thread overview]
Message-ID: <aIOKgBVNzju4AsI3@bricha3-mobl1.ger.corp.intel.com> (raw)
In-Reply-To: <20250725124919.3564890-6-ciara.loftus@intel.com>

On Fri, Jul 25, 2025 at 12:49:10PM +0000, Ciara Loftus wrote:
> From: Bruce Richardson <bruce.richardson@intel.com>
> 
> A common need within the drivers is to select between SSE, AVX2 and
> AVX-512 code paths. Provide a common function which helps with this
> decision making, that returns the max simd bandwidth based on any
> user configured maximums and available CPU flags.
> 
> Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
> Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
> ---
>  drivers/net/intel/common/rx_vec_x86.h | 23 +++++++++++++++++++++++
>  1 file changed, 23 insertions(+)
> 
> diff --git a/drivers/net/intel/common/rx_vec_x86.h b/drivers/net/intel/common/rx_vec_x86.h
> index 3d7343b1ff..314fa24b41 100644
> --- a/drivers/net/intel/common/rx_vec_x86.h
> +++ b/drivers/net/intel/common/rx_vec_x86.h
> @@ -346,4 +346,27 @@ ci_rxq_rearm(struct ci_rx_queue *rxq, const enum ci_rx_vec_level vec_level)
>  	rte_write32_wc(rte_cpu_to_le_32(rx_id), rxq->qrx_tail);
>  }
>  
> +#ifdef CC_AVX512_SUPPORT
> +#define X86_MAX_SIMD_BITWIDTH (rte_vect_get_max_simd_bitwidth())
> +#else
> +#define X86_MAX_SIMD_BITWIDTH RTE_MIN(256, rte_vect_get_max_simd_bitwidth())
> +#endif /* CC_AVX512_SUPPORT */
> +
> +static inline enum rte_vect_max_simd
> +ci_get_x86_max_simd_bitwidth(void)
> +{
> +	int ret = RTE_VECT_SIMD_DISABLED;
> +	int simd = X86_MAX_SIMD_BITWIDTH;
> +
> +	if (simd >= 512 && rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&
> +			rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) == 1)
> +		ret = RTE_VECT_SIMD_512;
> +	else if (simd >= 256 && (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||
> +			rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1))

Don't need to check the AVX512 flag here.

> +		ret = RTE_VECT_SIMD_256;
> +	else if (simd >= 128)
> +		ret = RTE_VECT_SIMD_128;
> +	return ret;
> +}
> +
>  #endif /* _COMMON_INTEL_RX_VEC_X86_H_ */
> -- 
> 2.34.1
> 

  reply	other threads:[~2025-07-25 13:45 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-25 12:49 [RFC PATCH 00/14] net/intel: rx path selection simplification Ciara Loftus
2025-07-25 12:49 ` [RFC PATCH 01/14] net/ice: use the same Rx path across process types Ciara Loftus
2025-07-25 13:40   ` Bruce Richardson
2025-07-25 12:49 ` [RFC PATCH 02/14] net/iavf: rename Rx/Tx function type variables Ciara Loftus
2025-07-25 13:40   ` Bruce Richardson
2025-07-25 12:49 ` [RFC PATCH 03/14] net/iavf: use the same Rx path across process types Ciara Loftus
2025-07-25 13:41   ` Bruce Richardson
2025-07-25 12:49 ` [RFC PATCH 04/14] net/i40e: " Ciara Loftus
2025-07-25 13:43   ` Bruce Richardson
2025-07-25 12:49 ` [RFC PATCH 05/14] net/intel: introduce common vector capability function Ciara Loftus
2025-07-25 13:45   ` Bruce Richardson [this message]
2025-07-25 12:49 ` [RFC PATCH 06/14] net/ice: use the new " Ciara Loftus
2025-07-25 13:56   ` Bruce Richardson
2025-07-25 12:49 ` [RFC PATCH 07/14] net/iavf: " Ciara Loftus
2025-07-25 12:49 ` [RFC PATCH 08/14] net/i40e: " Ciara Loftus
2025-07-25 12:49 ` [RFC PATCH 09/14] net/iavf: remove redundant field from iavf adapter struct Ciara Loftus
2025-07-25 14:51   ` Bruce Richardson
2025-07-25 12:49 ` [RFC PATCH 10/14] net/intel: introduce infrastructure for Rx path selection Ciara Loftus
2025-07-25 15:21   ` Bruce Richardson
2025-07-25 12:49 ` [RFC PATCH 11/14] net/ice: remove unsupported Rx offload Ciara Loftus
2025-07-25 15:22   ` Bruce Richardson
2025-07-25 12:49 ` [RFC PATCH 12/14] net/ice: use the common Rx path selection infrastructure Ciara Loftus
2025-07-25 12:49 ` [RFC PATCH 13/14] net/iavf: " Ciara Loftus
2025-07-25 12:49 ` [RFC PATCH 14/14] net/i40e: " Ciara Loftus

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