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Mon, 11 Aug 2025 10:53:47 +0000 Date: Mon, 11 Aug 2025 11:53:39 +0100 From: Bruce Richardson To: Ciara Loftus CC: Subject: Re: [PATCH v2 08/15] net/i40e: use the new common vector capability function Message-ID: References: <20250725124919.3564890-1-ciara.loftus@intel.com> <20250807123949.4063416-1-ciara.loftus@intel.com> <20250807123949.4063416-9-ciara.loftus@intel.com> Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20250807123949.4063416-9-ciara.loftus@intel.com> X-ClientProxiedBy: DU2P251CA0010.EURP251.PROD.OUTLOOK.COM (2603:10a6:10:230::25) To DS0PR11MB7309.namprd11.prod.outlook.com (2603:10b6:8:13e::17) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS0PR11MB7309:EE_|PH7PR11MB5944:EE_ X-MS-Office365-Filtering-Correlation-Id: 6379915a-bca4-40e5-904c-08ddd8c55965 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|366016; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?p050tKQJQXselesN/29BOn9jTqZw1OshMypRX77pl2tlVbVQOujSoQNHodOy?= =?us-ascii?Q?AQFa2oWriRlU5/D5dQ3N3uwFShDX+oAE2B/0u7q+IbAPRn6Z9a9qJAeIhO+c?= =?us-ascii?Q?3vXH+VhQtNCIYU6e71wtPIOXT69MS78+hVKkEkNld9YHmrcObX8UYi/aJzUM?= =?us-ascii?Q?FCaiiuxP+sQCFUv+K+gzQwUCn7qjaAS78HV1boAe7OzHolHscpYHgT4uQzoz?= =?us-ascii?Q?pvfoRNy7CF6jp+2DGBUlR53Pj8PodLkKjBGXPLBzz1H3Afl7e26HEgBPCa/P?= =?us-ascii?Q?4OaEZDBW7NHvUYWfu4omcmee2WlgKUSXGAUSg5ysk4qIWyuZj7L8RDHP5I34?= =?us-ascii?Q?9z60JwBapSCUT86mhbl9/x1BSgsHnW2mAMYjyWZVfljYG8whLc3HrRjb+qEN?= =?us-ascii?Q?MEIx9UG1f2opINvpUl6lXbeDLS5l9qF9fXYF0IHxkz81p3Yc5Ce4Ko5ainAx?= =?us-ascii?Q?KR509tVPuHzgevBbbPSQdbToJH2rVf8bwLac3QZGF9+B1q+ozv0oarXq3OhQ?= =?us-ascii?Q?uD/OdsPprBMhybki67kHjp8o7ykJuD/oAKVxTxJtkNXrDaP0/M1RfTAMpqkC?= =?us-ascii?Q?ZxJLGfMAiZIYv7zYzcJqA+4Iw5neZCkyElDhrK97WQD2MpCCyEj906ZRmN7c?= =?us-ascii?Q?sxjOaHHKYRY5yOgl0jgLSgHCSzJOdS6kVKlUFh6LSuED6wa1NrGjJuBgVYA4?= =?us-ascii?Q?dF/3AM+L+jCEtxpIxs4PLJbmIJQ7PKIH6S6Q/bHMZ/JAjN/eXjDXLgA+QKh8?= =?us-ascii?Q?zqWMa6jMmRsedKVWVWJeoGos88y0ua981OWkzLlw6Ws4u8+4Y0RVGo7eDyfA?= =?us-ascii?Q?54hO1HW6v3QgxkxJXaZgmR4ebDYmA2r5Kd/q7rmVdO8m1uDDwsv1hiGV8qMI?= =?us-ascii?Q?iEno7yRqhSY3ewJwgOAJUdIBEfRPQVAxvGHhiHs+XBo3qtN/2r7U2XKywDTu?= =?us-ascii?Q?kvdJLLYMUbT6iAkXVhKYkM2t1c9NJZcfD5Mg26CFtv/4ixq4a60VTq8gna5b?= =?us-ascii?Q?3WfHk1Su+QGQ99WzrAsjcS1dkQg07bQGK3I3jRBqK8nO8AjcfZivhNvcqJCt?= =?us-ascii?Q?oeL3yojzgX6Z5TvCWEf1wffsMehCnq0p+iqVMqHIlhySke5RA+CBpSa8QDRw?= =?us-ascii?Q?RLSTn5NeQArS8Xn5mg+/QPeQIV8fdTOp0k83SRXYu5LDPhudq2+GttNKbVjl?= =?us-ascii?Q?cHqrM0JmpQ219kr1jI+NXMTQHduWR8hXwdGJ/x6n2iPwPjgPC/g87M7amhtX?= =?us-ascii?Q?pXkx+hejHztdQL1d0GpLMs9tJDaiU76uNkwd9yGycEW9x3DxuXJGMwbL8K76?= =?us-ascii?Q?ofiDZNiqD/3+fxDKkNmXowiTagXSnBVhAAjrmx/X/xnXxPhgHuNYLFAli43t?= =?us-ascii?Q?1RcDVH1ufKHCsyjwKRt70Dvh3WK6b/nfIJvEX9cH//GXYjIFPF/xfn79bQDA?= =?us-ascii?Q?1lDEcrOHFtQ=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255; 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> > - /* used only on x86, zero on other architectures */ > - bool tx_use_avx2; > - bool tx_use_avx512; > + enum rte_vect_max_simd tx_simd_width; > }; > > /** > diff --git a/drivers/net/intel/i40e/i40e_rxtx.c b/drivers/net/intel/i40e/i40e_rxtx.c > index c89359e625..2a6b74ecc7 100644 > --- a/drivers/net/intel/i40e/i40e_rxtx.c > +++ b/drivers/net/intel/i40e/i40e_rxtx.c > @@ -3284,32 +3284,6 @@ i40e_recycle_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, > } > } > > -#ifdef RTE_ARCH_X86 > -static inline bool > -get_avx_supported(bool request_avx512) > -{ > - if (request_avx512) { > - if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_512 && > - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 && > - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) == 1) > -#ifdef CC_AVX512_SUPPORT > - return true; > -#else > - PMD_DRV_LOG(NOTICE, > - "AVX512 is not supported in build env"); > - return false; > -#endif > - } else { > - if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256 && > - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 && > - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) > - return true; > - } > - > - return false; > -} > -#endif /* RTE_ARCH_X86 */ > - > static const struct { > eth_rx_burst_t pkt_burst; > const char *info; > @@ -3351,7 +3325,7 @@ i40e_set_rx_function(struct rte_eth_dev *dev) > * conditions to be met and Rx Bulk Allocation should be allowed. > */ > #ifdef RTE_ARCH_X86 > - bool rx_use_avx512 = false, rx_use_avx2 = false; > + enum rte_vect_max_simd rx_simd_width = i40e_get_max_simd_bitwidth(); > #endif > if (i40e_rx_vec_dev_conf_condition_check(dev) || !ad->rx_bulk_alloc_allowed) { > PMD_INIT_LOG(DEBUG, "Port[%d] doesn't meet" > @@ -3370,35 +3344,29 @@ i40e_set_rx_function(struct rte_eth_dev *dev) > break; > } > } > -#ifdef RTE_ARCH_X86 > - rx_use_avx512 = get_avx_supported(1); > - > - if (!rx_use_avx512) > - rx_use_avx2 = get_avx_supported(0); > -#endif > } > > if (ad->rx_vec_allowed && rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) { > #ifdef RTE_ARCH_X86 > if (dev->data->scattered_rx) { > - if (rx_use_avx512) { > + if (rx_simd_width == RTE_VECT_SIMD_512) { > #ifdef CC_AVX512_SUPPORT > ad->rx_func_type = I40E_RX_AVX512_SCATTERED; > #endif As with the "ice" patch, I suspect you probably don't need these guards. > } else { > - ad->rx_func_type = rx_use_avx2 ? > + ad->rx_func_type = (rx_simd_width == RTE_VECT_SIMD_256) ? > I40E_RX_AVX2_SCATTERED : > I40E_RX_SCATTERED; > dev->recycle_rx_descriptors_refill = > i40e_recycle_rx_descriptors_refill_vec; > } > } else { > - if (rx_use_avx512) { > + if (rx_simd_width == RTE_VECT_SIMD_512) { > #ifdef CC_AVX512_SUPPORT > ad->rx_func_type = I40E_RX_AVX512; > #endif Ditto. > } else { > - ad->rx_func_type = rx_use_avx2 ? > + ad->rx_func_type = (rx_simd_width == RTE_VECT_SIMD_256) ? > I40E_RX_AVX2 : > I40E_RX_SSE; > dev->recycle_rx_descriptors_refill = > @@ -3509,8 +3477,7 @@ i40e_set_tx_function(struct rte_eth_dev *dev) > > if (rte_eal_process_type() == RTE_PROC_PRIMARY) { > #ifdef RTE_ARCH_X86 > - ad->tx_use_avx2 = false; > - ad->tx_use_avx512 = false; > + ad->tx_simd_width = i40e_get_max_simd_bitwidth(); > #endif > if (ad->tx_vec_allowed) { > for (i = 0; i < dev->data->nb_tx_queues; i++) { > @@ -3522,12 +3489,6 @@ i40e_set_tx_function(struct rte_eth_dev *dev) > break; > } > } > -#ifdef RTE_ARCH_X86 > - ad->tx_use_avx512 = get_avx_supported(1); > - > - if (!ad->tx_use_avx512) > - ad->tx_use_avx2 = get_avx_supported(0); > -#endif > } > } > > @@ -3537,7 +3498,7 @@ i40e_set_tx_function(struct rte_eth_dev *dev) > if (ad->tx_simple_allowed) { > if (ad->tx_vec_allowed) { > #ifdef RTE_ARCH_X86 > - if (ad->tx_use_avx512) { > + if (ad->tx_simd_width == RTE_VECT_SIMD_512) { > #ifdef CC_AVX512_SUPPORT > PMD_DRV_LOG(NOTICE, "Using AVX512 Vector Tx (port %d).", > dev->data->port_id); Whether or not the whole block needs and AVX512_SUPPORT guard, the print statement definitely doesn't need to be inside it. In fact, if the guard is necessary, there should also be an else block, giving an error that we got into the block without CC_AVX512_SUPPORT being set. That should never occur. > @@ -3545,9 +3506,9 @@ i40e_set_tx_function(struct rte_eth_dev *dev) > #endif > } else { > PMD_INIT_LOG(DEBUG, "Using %sVector Tx (port %d).", > - ad->tx_use_avx2 ? "avx2 " : "", > + ad->tx_simd_width == RTE_VECT_SIMD_256 ? "avx2 " : "", > dev->data->port_id); > - dev->tx_pkt_burst = ad->tx_use_avx2 ? > + dev->tx_pkt_burst = ad->tx_simd_width == RTE_VECT_SIMD_256 ? > i40e_xmit_pkts_vec_avx2 : > i40e_xmit_pkts_vec; > dev->recycle_tx_mbufs_reuse = i40e_recycle_tx_mbufs_reuse_vec; > diff --git a/drivers/net/intel/i40e/i40e_rxtx.h b/drivers/net/intel/i40e/i40e_rxtx.h > index 984532c507..b867e18daf 100644 > --- a/drivers/net/intel/i40e/i40e_rxtx.h > +++ b/drivers/net/intel/i40e/i40e_rxtx.h > @@ -167,6 +167,7 @@ uint16_t i40e_recv_scattered_pkts_vec_avx512(void *rx_queue, > uint16_t i40e_xmit_pkts_vec_avx512(void *tx_queue, > struct rte_mbuf **tx_pkts, > uint16_t nb_pkts); > +enum rte_vect_max_simd i40e_get_max_simd_bitwidth(void); > > /* For each value it means, datasheet of hardware can tell more details > * > diff --git a/drivers/net/intel/i40e/i40e_rxtx_vec_sse.c b/drivers/net/intel/i40e/i40e_rxtx_vec_sse.c > index 15cf07e548..c035408dcc 100644 > --- a/drivers/net/intel/i40e/i40e_rxtx_vec_sse.c > +++ b/drivers/net/intel/i40e/i40e_rxtx_vec_sse.c > @@ -715,3 +715,9 @@ i40e_rx_vec_dev_conf_condition_check(struct rte_eth_dev *dev) > { > return i40e_rx_vec_dev_conf_condition_check_default(dev); > } > + > +enum rte_vect_max_simd > +i40e_get_max_simd_bitwidth(void) > +{ > + return ci_get_x86_max_simd_bitwidth(); > +} > -- > 2.34.1 >