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From: Hemant Agrawal <hemant.agrawal@oss.nxp.com>
To: Gagandeep Singh <g.singh@nxp.com>,
	dev@dpdk.org, Hemant Agrawal <hemant.agrawal@nxp.com>,
	Sachin Saxena <sachin.saxena@nxp.com>,
	Franck Lenormand <franck.lenormand@nxp.com>,
	Akhil Goyal <gakhil@marvell.com>
Cc: stable@dpdk.org
Subject: Re: [PATCH 1/9] common/dpaax: fix invalid key command error
Date: Tue, 20 May 2025 11:46:17 +0530	[thread overview]
Message-ID: <ae4e769e-80fd-a4fc-7f80-ae71815a9d9a@oss.nxp.com> (raw)
In-Reply-To: <20250520055133.506071-1-g.singh@nxp.com>


On 20-05-2025 11:21, Gagandeep Singh wrote:
> Due to race between KEY loading to CAAM’s internal memory
> and initiating crypto operations can SEC errors in PDCP
> AES algo combinations.
Please fix grammar.
> To mitigate this, adding CALM instruction in SN 12bit case
> and using older version of descriptor for SN 18bit case.
>
> Fixes: 6127fff842a7 ("common/dpaax: remove outdated caamflib code")
> Cc: franck.lenormand@nxp.com
> Cc: stable@dpdk.org
>
> Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
> ---

Please send cover-letter for multi patch series.

>   drivers/common/dpaax/caamflib/desc/pdcp.h | 6 +++---
>   1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/common/dpaax/caamflib/desc/pdcp.h b/drivers/common/dpaax/caamflib/desc/pdcp.h
> index 9ada3905c5..f4379ede2c 100644
> --- a/drivers/common/dpaax/caamflib/desc/pdcp.h
> +++ b/drivers/common/dpaax/caamflib/desc/pdcp.h
> @@ -1,6 +1,6 @@
>   /* SPDX-License-Identifier: BSD-3-Clause or GPL-2.0+
>    * Copyright 2008-2013 Freescale Semiconductor, Inc.
> - * Copyright 2019-2023 NXP
> + * Copyright 2019-2025 NXP
>    */
>   
>   #ifndef __DESC_PDCP_H__
> @@ -1981,8 +1981,7 @@ pdcp_insert_uplane_no_int_op(struct program *p,
>   	KEY(p, KEY1, cipherdata->key_enc_flags, cipherdata->key,
>   	    cipherdata->keylen, INLINE_KEY(cipherdata));
>   
> -	if ((sn_size == PDCP_SN_SIZE_15) ||
> -			(rta_sec_era >= RTA_SEC_ERA_10)) {
> +	if (sn_size == PDCP_SN_SIZE_15) {

In description, you mentioned 18 bit SN case, however here you are 
modifying  15 bit code?

am I missing the changes for 18 bit ?

>   		PROTOCOL(p, dir, OP_PCLID_LTE_PDCP_USER,
>   			 (uint16_t)cipherdata->algtype);
>   		return 0;
> @@ -2747,6 +2746,7 @@ cnstr_shdsc_pdcp_u_plane_encap(uint32_t *descbuf,
>   			    (uint64_t)cipherdata->key, cipherdata->keylen,
>   			    INLINE_KEY(cipherdata));
>   
> +			JUMP(p, 1, LOCAL_JUMP, ALL_TRUE, CALM);
>   			if (authdata)
>   				PROTOCOL(p, OP_TYPE_ENCAP_PROTOCOL,
>   					 OP_PCLID_LTE_PDCP_USER_RN,

      parent reply	other threads:[~2025-05-20  6:16 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-20  5:51 Gagandeep Singh
2025-05-20  5:51 ` [PATCH 2/9] common/dpaax: fix for PDCP AES only 12bit SN case Gagandeep Singh
2025-05-20  5:51 ` [PATCH 3/9] common/dpaax: support 12bit SN in pdcp uplane Gagandeep Singh
2025-05-20  6:18   ` Hemant Agrawal
2025-05-20  5:51 ` [PATCH 4/9] crypto/dpaa2_sec: change custom device API to standard Gagandeep Singh
2025-05-20  5:51 ` [PATCH 5/9] crypto/dpaa2_sec: fix coverity Issues Gagandeep Singh
2025-05-20  5:51 ` [PATCH 6/9] crypto/dpaa2_sec: add null algo capability Gagandeep Singh
2025-05-20  6:20   ` Hemant Agrawal
2025-05-20  5:51 ` [PATCH 7/9] net/dpaa2: configure buffer layout Gagandeep Singh
2025-05-20  5:51 ` [PATCH 8/9] mempool/dpaa2: mempool operation index Gagandeep Singh
2025-05-20  5:51 ` [PATCH 9/9] crypto/dpaa2_sec: add support for simple IPsec FD Gagandeep Singh
2025-05-20  6:16 ` Hemant Agrawal [this message]

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