From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr0-f174.google.com (mail-wr0-f174.google.com [209.85.128.174]) by dpdk.org (Postfix) with ESMTP id 9488F7CC9 for ; Wed, 21 Jun 2017 01:37:19 +0200 (CEST) Received: by mail-wr0-f174.google.com with SMTP id 77so111623070wrb.1 for ; Tue, 20 Jun 2017 16:37:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=kfN9MVQHRIKwPjxIQdCDMPtr11DpynVxql6uWBz9TRM=; b=prjCuWhHSCp1OkSQWP07KCpn8v7yRdMAK0tUNwitTF10pkzwnI60B0ImFkEHpN4Jn4 aIE9+EGu/FYPdYG/0lS9UKRQCBjenCpENmkhknJKVYZo8PZbSGoHWQuXN3YrGGGsPLKv 9+DwfN+rBF5+0/59isUXFVzJULyYQMaSo5GJ7WdsEyg5SviHQ13EajVBbs4T+bThjmOE fF4pbVz1E4EMg1GOixtB4jRy9mw/ffYtyavcCOxmbdkXxJIlU8q5FThTXrmgInzqu4Q2 ZlRUBVOEl1fek7ELTNju1Q6vFOYMKqb87Sja/NX2eCJqk0L2LeAUeJhEl7A3TTiKL/Ob hDcw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=kfN9MVQHRIKwPjxIQdCDMPtr11DpynVxql6uWBz9TRM=; b=aQOTBnIKMGs3KgFPjgj8/J4WTWiq+EK74r+AfGp8hj+7ztABRRgGFxLJX+cFN1wJv8 fqrrSXsT9YKsS6mwcnaB48h2lmoNoOmB2BihaFt2V54oiyFcNfFrfcoCyGbYyienYX7G Sj+nGKNma6bUvnvIbroMSLqMqAtxzKf4QqtUO/2EhFPqIAEL0lKgsAilyNbT0RZPf3Tp Chw0X2n3UHR4zKen8f7t/5X9qm+aVxy+m6bbqMhfSz2DsY49ntQp802eatWut6lS6cw7 pgLL+qi5Pr2JOQ+53sSaVjhnNH+N4+vqOhsNyNBnrgSKFuA1NHcsxs0MCOYW2frdmHRE sgSA== X-Gm-Message-State: AKS2vOwMy8oQS50REam2UaYy+zdhOxSjPv+4ZSXKP+TAhZHtnS/fYuWE yuRSxs20DdLc2H4idMs= X-Received: by 10.28.95.135 with SMTP id t129mr4642398wmb.61.1498001838840; Tue, 20 Jun 2017 16:37:18 -0700 (PDT) Received: from bidouze.dev.6wind.com (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id 92sm16634785wrb.55.2017.06.20.16.37.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 20 Jun 2017 16:37:18 -0700 (PDT) From: Gaetan Rivet To: dev@dpdk.org Cc: Gaetan Rivet Date: Wed, 21 Jun 2017 01:36:55 +0200 Message-Id: X-Mailer: git-send-email 2.1.4 In-Reply-To: References: In-Reply-To: References: Subject: [dpdk-dev] [PATCH v3 7/9] bus/pci: follow checkpatch X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 20 Jun 2017 23:37:20 -0000 As the PCI bus has been moved entirely to drivers/bus, it is possible to use checkpatch for the whole set and fix it, as future fixes and merges should not be impaired any more than by the move itelf. Signed-off-by: Gaetan Rivet --- drivers/bus/pci/bsd/rte_pci.c | 23 ++++---- drivers/bus/pci/include/rte_pci.h | 102 ++++++++++++++++++++++------------- drivers/bus/pci/linux/rte_pci.c | 14 +++-- drivers/bus/pci/linux/rte_pci_init.h | 2 +- drivers/bus/pci/linux/rte_pci_uio.c | 18 ++++--- drivers/bus/pci/linux/rte_pci_vfio.c | 40 ++++++++------ drivers/bus/pci/private.h | 2 + drivers/bus/pci/rte_pci_common.c | 2 - 8 files changed, 120 insertions(+), 83 deletions(-) diff --git a/drivers/bus/pci/bsd/rte_pci.c b/drivers/bus/pci/bsd/rte_pci.c index 74b0172..d051370 100644 --- a/drivers/bus/pci/bsd/rte_pci.c +++ b/drivers/bus/pci/bsd/rte_pci.c @@ -87,8 +87,6 @@ * enabling bus master. */ -extern struct rte_pci_bus rte_pci_bus; - /* Map pci device */ int rte_pci_map_device(struct rte_pci_device *dev) @@ -154,8 +152,9 @@ pci_uio_alloc_resource(struct rte_pci_device *dev, dev->addr.bus, dev->addr.devid, dev->addr.function); if (access(devname, O_RDWR) < 0) { - RTE_LOG(WARNING, EAL, " "PCI_PRI_FMT" not managed by UIO driver, " - "skipping\n", loc->domain, loc->bus, loc->devid, loc->function); + RTE_LOG(WARNING, EAL, " " PCI_PRI_FMT + " not managed by UIO driver, skipping\n", + loc->domain, loc->bus, loc->devid, loc->function); return 1; } @@ -246,12 +245,11 @@ pci_scan_one(int dev_pci_fd, struct pci_conf *conf) { struct rte_pci_device *dev; struct pci_bar_io bar; - unsigned i, max; + unsigned int i, max; dev = malloc(sizeof(*dev)); - if (dev == NULL) { + if (dev == NULL) return -1; - } memset(dev, 0, sizeof(*dev)); dev->addr.domain = conf->pc_sel.pc_domain; @@ -311,7 +309,8 @@ pci_scan_one(int dev_pci_fd, struct pci_conf *conf) dev->mem_resource[i].len = bar.pbi_length; if (PCI_BAR_IO(bar.pbi_base)) { - dev->mem_resource[i].addr = (void *)(bar.pbi_base & ~((uint64_t)0xf)); + dev->mem_resource[i].addr = + (void *)(bar.pbi_base & ~((uint64_t)0xf)); continue; } dev->mem_resource[i].phys_addr = bar.pbi_base & ~((uint64_t)0xf); @@ -320,8 +319,7 @@ pci_scan_one(int dev_pci_fd, struct pci_conf *conf) /* device is valid, add in list (sorted) */ if (TAILQ_EMPTY(&rte_pci_bus.device_list)) { rte_pci_add_device(dev); - } - else { + } else { struct rte_pci_device *dev2 = NULL; int ret; @@ -359,7 +357,7 @@ int rte_pci_scan(void) { int fd; - unsigned dev_count = 0; + unsigned int dev_count = 0; struct pci_conf matches[16]; struct pci_conf_io conf_io = { .pat_buf_len = 0, @@ -380,7 +378,8 @@ rte_pci_scan(void) } do { - unsigned i; + unsigned int i; + if (ioctl(fd, PCIOCGETCONF, &conf_io) < 0) { RTE_LOG(ERR, EAL, "%s(): error with ioctl on /dev/pci: %s\n", __func__, strerror(errno)); diff --git a/drivers/bus/pci/include/rte_pci.h b/drivers/bus/pci/include/rte_pci.h index 0c39a77..0d51ce2 100644 --- a/drivers/bus/pci/include/rte_pci.h +++ b/drivers/bus/pci/include/rte_pci.h @@ -130,7 +130,7 @@ TAILQ_HEAD(rte_pci_driver_list, rte_pci_driver); * table of these IDs for each device that it supports. */ struct rte_pci_id { - uint32_t class_id; /**< Class ID (class, subclass, pi) or RTE_CLASS_ANY_ID. */ + uint32_t class_id; /**< Class ID or RTE_CLASS_ANY_ID. */ uint16_t vendor_id; /**< Vendor ID or PCI_ANY_ID. */ uint16_t device_id; /**< Device ID or PCI_ANY_ID. */ uint16_t subsystem_vendor_id; /**< Subsystem vendor ID or PCI_ANY_ID. */ @@ -153,17 +153,17 @@ struct rte_devargs; * A structure describing a PCI device. */ struct rte_pci_device { - TAILQ_ENTRY(rte_pci_device) next; /**< Next probed PCI device. */ - struct rte_device device; /**< Inherit core device */ - struct rte_pci_addr addr; /**< PCI location. */ - struct rte_pci_id id; /**< PCI ID. */ + TAILQ_ENTRY(rte_pci_device) next; /**< Next probed PCI device. */ + struct rte_device device; /**< Inherit core device */ + struct rte_pci_addr addr; /**< PCI location. */ + struct rte_pci_id id; /**< PCI ID. */ struct rte_mem_resource mem_resource[PCI_MAX_RESOURCE]; - /**< PCI Memory Resource */ - struct rte_intr_handle intr_handle; /**< Interrupt handle */ - struct rte_pci_driver *driver; /**< Associated driver */ - uint16_t max_vfs; /**< sriov enable if not zero */ - enum rte_kernel_driver kdrv; /**< Kernel driver passthrough */ - char name[PCI_PRI_STR_SIZE+1]; /**< PCI location (ASCII) */ + /**< PCI Memory Resource */ + struct rte_intr_handle intr_handle; /**< Interrupt handle */ + struct rte_pci_driver *driver; /**< Associated driver */ + uint16_t max_vfs; /**< sriov enable if not zero */ + enum rte_kernel_driver kdrv; /**< Kernel driver passthrough */ + char name[PCI_PRI_STR_SIZE+1]; /**< PCI location (ASCII) */ }; /** @@ -208,13 +208,13 @@ typedef int (pci_remove_t)(struct rte_pci_device *); * A structure describing a PCI driver. */ struct rte_pci_driver { - TAILQ_ENTRY(rte_pci_driver) next; /**< Next in list. */ - struct rte_driver driver; /**< Inherit core driver. */ - struct rte_pci_bus *bus; /**< PCI bus reference. */ - pci_probe_t *probe; /**< Device Probe function. */ - pci_remove_t *remove; /**< Device Remove function. */ - const struct rte_pci_id *id_table; /**< ID table, NULL terminated. */ - uint32_t drv_flags; /**< Flags contolling handling of device. */ + TAILQ_ENTRY(rte_pci_driver) next; /**< Next in list. */ + struct rte_driver driver; /**< Inherit core driver. */ + struct rte_pci_bus *bus; /**< PCI bus reference. */ + pci_probe_t *probe; /**< Device Probe function. */ + pci_remove_t *remove; /**< Device Remove function. */ + const struct rte_pci_id *id_table; /**< ID table, NULL terminated. */ + uint32_t drv_flags; /**< Flags contolling handling of device. */ }; /** @@ -263,18 +263,22 @@ struct mapped_pci_resource { /** mapped pci device list */ TAILQ_HEAD(mapped_pci_res_list, mapped_pci_resource); -/**< Internal use only - Macro used by pci addr parsing functions **/ -#define GET_PCIADDR_FIELD(in, fd, lim, dlm) \ -do { \ - unsigned long val; \ - char *end; \ - errno = 0; \ - val = strtoul((in), &end, 16); \ - if (errno != 0 || end[0] != (dlm) || val > (lim)) \ - return -EINVAL; \ - (fd) = (typeof (fd))val; \ - (in) = end + 1; \ -} while(0) +static const char * +get_u8_pciaddr_field(const char *in, void *_u8, char dlm) +{ + unsigned long val; + uint8_t *u8 = _u8; + char *end; + + errno = 0; + val = strtoul(in, &end, 16); + if (errno != 0 || end[0] != dlm || val > UINT8_MAX) { + errno = errno ? errno : EINVAL; + return NULL; + } + *u8 = (uint8_t)val; + return end + 1; +} /** * Utility function to produce a PCI Bus-Device-Function value @@ -292,10 +296,18 @@ do { \ static inline int eal_parse_pci_BDF(const char *input, struct rte_pci_addr *dev_addr) { + const char *in = input; + dev_addr->domain = 0; - GET_PCIADDR_FIELD(input, dev_addr->bus, UINT8_MAX, ':'); - GET_PCIADDR_FIELD(input, dev_addr->devid, UINT8_MAX, '.'); - GET_PCIADDR_FIELD(input, dev_addr->function, UINT8_MAX, 0); + in = get_u8_pciaddr_field(in, &dev_addr->bus, ':'); + if (in == NULL) + return -EINVAL; + in = get_u8_pciaddr_field(in, &dev_addr->devid, '.'); + if (in == NULL) + return -EINVAL; + in = get_u8_pciaddr_field(in, &dev_addr->function, '\0'); + if (in == NULL) + return -EINVAL; return 0; } @@ -314,13 +326,27 @@ eal_parse_pci_BDF(const char *input, struct rte_pci_addr *dev_addr) static inline int eal_parse_pci_DomBDF(const char *input, struct rte_pci_addr *dev_addr) { - GET_PCIADDR_FIELD(input, dev_addr->domain, UINT16_MAX, ':'); - GET_PCIADDR_FIELD(input, dev_addr->bus, UINT8_MAX, ':'); - GET_PCIADDR_FIELD(input, dev_addr->devid, UINT8_MAX, '.'); - GET_PCIADDR_FIELD(input, dev_addr->function, UINT8_MAX, 0); + const char *in = input; + unsigned long val; + char *end; + + errno = 0; + val = strtoul(in, &end, 16); + if (errno != 0 || end[0] != ':' || val > UINT16_MAX) + return -EINVAL; + dev_addr->domain = (uint16_t)val; + in = end + 1; + in = get_u8_pciaddr_field(in, &dev_addr->bus, ':'); + if (in == NULL) + return -EINVAL; + in = get_u8_pciaddr_field(in, &dev_addr->devid, '.'); + if (in == NULL) + return -EINVAL; + in = get_u8_pciaddr_field(in, &dev_addr->function, '\0'); + if (in == NULL) + return -EINVAL; return 0; } -#undef GET_PCIADDR_FIELD /** * Utility function to write a pci device name, this device name can later be diff --git a/drivers/bus/pci/linux/rte_pci.c b/drivers/bus/pci/linux/rte_pci.c index 3c4b425..5a6de9d 100644 --- a/drivers/bus/pci/linux/rte_pci.c +++ b/drivers/bus/pci/linux/rte_pci.c @@ -56,8 +56,6 @@ * IGB_UIO driver (or doesn't initialize, if the device wasn't bound to it). */ -extern struct rte_pci_bus rte_pci_bus; - static int pci_get_kernel_driver_by_path(const char *filename, char *dri_name) { @@ -147,7 +145,7 @@ pci_find_max_end_va(void) { const struct rte_memseg *seg = rte_eal_get_physmem_layout(); const struct rte_memseg *last = seg; - unsigned i = 0; + unsigned int i = 0; for (i = 0; i < RTE_MAX_MEMSEG; i++, seg++) { if (seg->addr == NULL) @@ -209,8 +207,7 @@ pci_parse_sysfs_resource(const char *filename, struct rte_pci_device *dev) return -1; } - for (i = 0; idomain, loc->bus, loc->devid, loc->function); + RTE_LOG(WARNING, EAL, " " PCI_PRI_FMT + " not managed by UIO driver, skipping\n", + loc->domain, loc->bus, loc->devid, loc->function); return 1; } snprintf(devname, sizeof(devname), "/dev/uio%u", uio_num); @@ -394,7 +397,8 @@ pci_uio_ioport_map(struct rte_pci_device *dev, int bar, return -1; } /* ensure we don't get anything funny here, read/write will cast to - * uin16_t */ + * uin16_t. + */ if (start > UINT16_MAX) return -1; diff --git a/drivers/bus/pci/linux/rte_pci_vfio.c b/drivers/bus/pci/linux/rte_pci_vfio.c index 81b67c9..e5a60e8 100644 --- a/drivers/bus/pci/linux/rte_pci_vfio.c +++ b/drivers/bus/pci/linux/rte_pci_vfio.c @@ -127,8 +127,9 @@ pci_vfio_get_msix_bar(int fd, int *msix_bar, uint32_t *msix_table_offset, /* if we haven't reached MSI-X, check next capability */ if (cap_id != PCI_CAP_ID_MSIX) { ret = pread64(fd, ®, sizeof(reg), - VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + - cap_offset); + VFIO_GET_REGION_ADDR( + VFIO_PCI_CONFIG_REGION_INDEX + ) + cap_offset); if (ret != sizeof(reg)) { RTE_LOG(ERR, EAL, "Cannot read capability pointer from PCI " "config space!\n"); @@ -144,8 +145,9 @@ pci_vfio_get_msix_bar(int fd, int *msix_bar, uint32_t *msix_table_offset, else { /* table offset resides in the next 4 bytes */ ret = pread64(fd, ®, sizeof(reg), - VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + - cap_offset + 4); + VFIO_GET_REGION_ADDR( + VFIO_PCI_CONFIG_REGION_INDEX + ) + cap_offset + 4); if (ret != sizeof(reg)) { RTE_LOG(ERR, EAL, "Cannot read table offset from PCI config " "space!\n"); @@ -153,8 +155,9 @@ pci_vfio_get_msix_bar(int fd, int *msix_bar, uint32_t *msix_table_offset, } ret = pread64(fd, &flags, sizeof(flags), - VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + - cap_offset + 2); + VFIO_GET_REGION_ADDR( + VFIO_PCI_CONFIG_REGION_INDEX + ) + cap_offset + 2); if (ret != sizeof(flags)) { RTE_LOG(ERR, EAL, "Cannot read table flags from PCI config " "space!\n"); @@ -254,14 +257,15 @@ pci_vfio_setup_interrupts(struct rte_pci_device *dev, int vfio_dev_fd) } /* if this vector cannot be used with eventfd, fail if we explicitly - * specified interrupt type, otherwise continue */ + * specified interrupt type, otherwise continue. + */ if ((irq.flags & VFIO_IRQ_INFO_EVENTFD) == 0) { if (internal_config.vfio_intr_mode != RTE_INTR_MODE_NONE) { RTE_LOG(ERR, EAL, " interrupt vector does not support eventfd!\n"); return -1; - } else - continue; + } + continue; } /* set up an eventfd for interrupts */ @@ -313,7 +317,8 @@ pci_vfio_map_resource(struct rte_pci_device *dev) struct rte_pci_addr *loc = &dev->addr; int i, ret, msix_bar; struct mapped_pci_resource *vfio_res = NULL; - struct mapped_pci_res_list *vfio_res_list = RTE_TAILQ_CAST(rte_vfio_tailq.head, mapped_pci_res_list); + struct mapped_pci_res_list *vfio_res_list = + RTE_TAILQ_CAST(rte_vfio_tailq.head, mapped_pci_res_list); struct pci_map *maps; uint32_t msix_table_offset = 0; @@ -331,8 +336,10 @@ pci_vfio_map_resource(struct rte_pci_device *dev) &vfio_dev_fd, &device_info))) return ret; - /* get MSI-X BAR, if any (we have to know where it is because we can't - * easily mmap it when using VFIO) */ + /* + * get MSI-X BAR, if any (we have to know where it is because we can't + * easily mmap it when using VFIO) + */ msix_bar = -1; ret = pci_vfio_get_msix_bar(vfio_dev_fd, &msix_bar, &msix_table_offset, &msix_table_size); @@ -389,7 +396,8 @@ pci_vfio_map_resource(struct rte_pci_device *dev) if (ret) { RTE_LOG(ERR, EAL, " %s cannot get device region info " - "error %i (%s)\n", pci_addr, errno, strerror(errno)); + "error %i (%s)\n", + pci_addr, errno, strerror(errno)); close(vfio_dev_fd); if (internal_config.process_type == RTE_PROC_PRIMARY) rte_free(vfio_res); @@ -515,7 +523,8 @@ pci_vfio_map_resource(struct rte_pci_device *dev) /* if secondary process, do not set up interrupts */ if (internal_config.process_type == RTE_PROC_PRIMARY) { if (pci_vfio_setup_interrupts(dev, vfio_dev_fd) != 0) { - RTE_LOG(ERR, EAL, " %s error setting up interrupts!\n", pci_addr); + RTE_LOG(ERR, EAL, " %s error setting up interrupts!\n", + pci_addr); close(vfio_dev_fd); rte_free(vfio_res); return -1; @@ -523,7 +532,8 @@ pci_vfio_map_resource(struct rte_pci_device *dev) /* set bus mastering for the device */ if (pci_vfio_set_bus_master(vfio_dev_fd, true)) { - RTE_LOG(ERR, EAL, " %s cannot set up bus mastering!\n", pci_addr); + RTE_LOG(ERR, EAL, " %s cannot set up bus mastering!\n", + pci_addr); close(vfio_dev_fd); rte_free(vfio_res); return -1; diff --git a/drivers/bus/pci/private.h b/drivers/bus/pci/private.h index e5ccfd5..d28b63c 100644 --- a/drivers/bus/pci/private.h +++ b/drivers/bus/pci/private.h @@ -41,6 +41,8 @@ struct rte_pci_driver; struct rte_pci_device; +extern struct rte_pci_bus rte_pci_bus; + /** * Add a PCI device to the PCI Bus (append to PCI Device list). This function * also updates the bus references of the PCI Device (and the generic device diff --git a/drivers/bus/pci/rte_pci_common.c b/drivers/bus/pci/rte_pci_common.c index 75c4f64..3816005 100644 --- a/drivers/bus/pci/rte_pci_common.c +++ b/drivers/bus/pci/rte_pci_common.c @@ -56,8 +56,6 @@ #include "private.h" -extern struct rte_pci_bus rte_pci_bus; - #define SYSFS_PCI_DEVICES "/sys/bus/pci/devices" const char *pci_get_sysfs_path(void) -- 2.1.4