-unsigned int rte_get_next_lcore(unsigned int i, int skip_main, int wrap)
+#define LCORE_GET_LLC   \
+             "ls -d /sys/bus/cpu/devices/cpu%u/cache/index[0-9] | sort  -r
| grep -m1 index[0-9] | awk -F '[x]' '{print $2}' "

This won't work for some SOCs.

Thank you for your response. please find our response and queries below

How to ensure the index you got is for an LLC?

we referred to How CPU topology info is exported via sysfs — The Linux Kernel documentation and linux/Documentation/ABI/stable/sysfs-devices-system-cpu at master · torvalds/linux (github.com) and

Get Cache Info in Linux on ARMv8 64-bit Platform (zhiyisun.github.io). Based on my current understanding on bare metal 64Bit Linux OS (which is supported by most Distros), the cache topology are populated into sysfs.

 Some SOCs may only show upper-level caches here, therefore cannot be use blindly without knowing the SOC.

1. if there are specific SoC which do not populate the information at all? If yes are they in DTS?

2. If there are specific SoC which does not export to hypervisor like Qemu or Xen?

We can work together to make it compatible.

Also, unacceptable to execute a shell script, consider implementing in C.

--wathsala