From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id A55A1A0540; Mon, 13 Jul 2020 13:56:45 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C3C3A1D663; Mon, 13 Jul 2020 13:56:41 +0200 (CEST) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id 01A121D633 for ; Mon, 13 Jul 2020 13:56:37 +0200 (CEST) IronPort-SDR: oK7Pm5rBlNzgWiQRHH4xhJAi1v8iZTJVac/VQvB8OZu3I15yEREBUyD4d8np5u4NxCFg5lJpMr EYYn7lyuv8vg== X-IronPort-AV: E=McAfee;i="6000,8403,9680"; a="233454698" X-IronPort-AV: E=Sophos;i="5.75,347,1589266800"; d="scan'208";a="233454698" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jul 2020 04:56:38 -0700 IronPort-SDR: P0BUr6IO8vam08Es/QFTKkKhJBRmy2lYNLzE0J+cB7I8KLwC9ydgxuFsFiho9WKh0c4yn0toU4 pF8RQ0t0CS1g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,347,1589266800"; d="scan'208";a="429360199" Received: from silpixa00400322.ir.intel.com ([10.237.214.86]) by orsmga004.jf.intel.com with ESMTP; 13 Jul 2020 04:56:36 -0700 From: Vladimir Medvedkin To: dev@dpdk.org Cc: david.marchand@redhat.com, jerinj@marvell.com, mdr@ashroe.eu, thomas@monjalon.net, konstantin.ananyev@intel.com, bruce.richardson@intel.com Date: Mon, 13 Jul 2020 12:56:25 +0100 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Subject: [dpdk-dev] [PATCH v7 1/8] eal/x86: introduce AVX 512-bit type X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" New data type to manipulate 512 bit AVX values. Signed-off-by: Vladimir Medvedkin Acked-by: Konstantin Ananyev --- lib/librte_eal/x86/include/rte_vect.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/lib/librte_eal/x86/include/rte_vect.h b/lib/librte_eal/x86/include/rte_vect.h index df5a60762..64383c360 100644 --- a/lib/librte_eal/x86/include/rte_vect.h +++ b/lib/librte_eal/x86/include/rte_vect.h @@ -13,6 +13,7 @@ #include #include +#include #include "generic/rte_vect.h" #if (defined(__ICC) || \ @@ -90,6 +91,24 @@ __extension__ ({ \ }) #endif /* (defined(__ICC) && __ICC < 1210) */ +#ifdef __AVX512F__ + +#define RTE_X86_ZMM_SIZE (sizeof(__m512i)) +#define RTE_X86_ZMM_MASK (RTE_X86_ZMM_SIZE - 1) + +typedef union __rte_x86_zmm { + __m512i z; + ymm_t y[RTE_X86_ZMM_SIZE / sizeof(ymm_t)]; + xmm_t x[RTE_X86_ZMM_SIZE / sizeof(xmm_t)]; + uint8_t u8[RTE_X86_ZMM_SIZE / sizeof(uint8_t)]; + uint16_t u16[RTE_X86_ZMM_SIZE / sizeof(uint16_t)]; + uint32_t u32[RTE_X86_ZMM_SIZE / sizeof(uint32_t)]; + uint64_t u64[RTE_X86_ZMM_SIZE / sizeof(uint64_t)]; + double pd[RTE_X86_ZMM_SIZE / sizeof(double)]; +} __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm_t; + +#endif /* __AVX512F__ */ + #ifdef __cplusplus } #endif -- 2.17.1