From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 63FE945500; Wed, 26 Jun 2024 13:58:29 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 062F143394; Wed, 26 Jun 2024 13:55:33 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by mails.dpdk.org (Postfix) with ESMTP id C18BE42E95 for ; Wed, 26 Jun 2024 13:43:53 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1719402234; x=1750938234; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VkTXdu9b7j5jbMJOlqtkeq4wGBIHWmHTzn6wdGQYNZo=; b=RFYrh6hJKwo2pPQRxRXl19C1ieK+MpEhWTifvVsHNJzDefaFRcw3wOzP AAM5f3s/WrKtm4LGOR64B9MdLEl4fyJMKIr9Tt+T8b8MuMlvPglaFcJQJ 62UJGmKOM5MaAVtbzBQkxGpnL7ivaTMEx724g0R+aDQM2GGDfwp35+FK+ d9Wc+coWH8Fu476B5H1QyVksCDfrud5MJEajHxI4xsueLgRv1v5/yTbyt aeejo1l87atfWOaT+lukZpE4WGlCKnJK55SB+Kkw1L1WGPY+GEdLYQCGE A+wKK0sxocxKezmL7YToT7DZcKeHB+xqVHt1LZLKnS2wtOYkGDe6orJmZ Q==; X-CSE-ConnectionGUID: NLeoaxF4QYKdfpuPR2D8FQ== X-CSE-MsgGUID: R+aJ9/ozRkCMLUOyCo8A9Q== X-IronPort-AV: E=McAfee;i="6700,10204,11114"; a="38979378" X-IronPort-AV: E=Sophos;i="6.08,266,1712646000"; d="scan'208";a="38979378" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jun 2024 04:43:53 -0700 X-CSE-ConnectionGUID: a2yEAA4nToOCGFIjjDdhFg== X-CSE-MsgGUID: WV2p1rxwT2iqaLoNCRM0qg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,266,1712646000"; d="scan'208";a="43873660" Received: from unknown (HELO silpixa00401119.ir.intel.com) ([10.55.129.167]) by orviesa010.jf.intel.com with ESMTP; 26 Jun 2024 04:43:52 -0700 From: Anatoly Burakov To: dev@dpdk.org Cc: "Temerkhanov, Sergey" , ian.stokes@intel.com, bruce.richardson@intel.com Subject: [PATCH v4 031/103] net/ice/base: parse 1PPS GPIO in 1588 function caps Date: Wed, 26 Jun 2024 12:41:19 +0100 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: "Temerkhanov, Sergey" Check for 1PPS GPIO association in 1588 function caps. Remove legacy code related to a workaround setting 1588 capabilities to a fixed value. Signed-off-by: Temerkhanov, Sergey Signed-off-by: Nitka, Grzegorz Signed-off-by: Ian Stokes --- drivers/net/ice/base/ice_common.c | 4 +++- drivers/net/ice/base/ice_type.h | 2 ++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index e1476d6794..b81d3a15a0 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -2614,7 +2614,7 @@ ice_parse_1588_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p, u32 number = LE32_TO_CPU(cap->number); u8 clk_freq; - ice_debug(hw, ICE_DBG_INIT, "1588 func caps: raw value %x\n", number); + ice_debug(hw, ICE_DBG_INIT, "1588 func caps: raw value %#x\n", number); info->ena = ((number & ICE_TS_FUNC_ENA_M) != 0); func_p->common_cap.ieee_1588 = info->ena; @@ -2624,6 +2624,8 @@ ice_parse_1588_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p, info->tmr_index_owned = ((number & ICE_TS_TMR_IDX_OWND_M) != 0); info->tmr_index_assoc = ((number & ICE_TS_TMR_IDX_ASSOC_M) != 0); + info->gpio_1pps = ((number & ICE_TS_GPIO_1PPS_ASSOC) != 0); + info->clk_src = ((number & ICE_TS_CLK_SRC_M) != 0); clk_freq = (number & ICE_TS_CLK_FREQ_M) >> ICE_TS_CLK_FREQ_S; if (clk_freq < NUM_ICE_TIME_REF_FREQ) { diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index 08e3498c6e..c94567b83c 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -732,6 +732,7 @@ struct ice_hw_common_caps { #define ICE_TS_TMR_ENA_M BIT(2) #define ICE_TS_TMR_IDX_OWND_S 4 #define ICE_TS_TMR_IDX_OWND_M BIT(4) +#define ICE_TS_GPIO_1PPS_ASSOC BIT(12) #define ICE_TS_CLK_FREQ_S 16 #define ICE_TS_CLK_FREQ_M MAKEMASK(0x7, ICE_TS_CLK_FREQ_S) #define ICE_TS_CLK_SRC_S 20 @@ -768,6 +769,7 @@ struct ice_ts_func_info { u8 tmr_index_owned : 1; u8 src_tmr_owned : 1; u8 tmr_ena : 1; + u8 gpio_1pps : 1; }; /* Device specific definitions */ -- 2.43.0