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From: bugzilla@dpdk.org
To: dev@dpdk.org
Subject: [DPDK/cryptodev Bug 1395] crypto/qat debug build failure with
RTE_ENABLE_ASSERT (ICP_QAT_FW_SYM_COMM_ADDR_SGL undeclared)
Date: Tue, 05 Mar 2024 06:29:19 +0000
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X-Bugzilla-Product: DPDK
X-Bugzilla-Component: cryptodev
X-Bugzilla-Version: 23.11
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--17096201590.a3E6d72f.2660811
Date: Tue, 5 Mar 2024 07:29:19 +0100
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https://bugs.dpdk.org/show_bug.cgi?id=3D1395
Bug ID: 1395
Summary: crypto/qat debug build failure with RTE_ENABLE_ASSERT
(ICP_QAT_FW_SYM_COMM_ADDR_SGL undeclared)
Product: DPDK
Version: 23.11
Hardware: All
OS: All
Status: UNCONFIRMED
Severity: normal
Priority: Normal
Component: cryptodev
Assignee: dev@dpdk.org
Reporter: alialnu@nvidia.com
Target Milestone: ---
$ meson --werror --buildtype=3Ddebug -Dc_args=3D'-DRTE_ENABLE_ASSERT' build=
&&
ninja -C build
"""
In file included from ../../root/dpdk/lib/eal/x86/include/rte_spinlock.h:15,
from ../../root/dpdk/lib/mempool/rte_mempool.h:43,
from ../../root/dpdk/lib/mbuf/rte_mbuf.h:38,
from ../../root/dpdk/lib/cryptodev/rte_crypto.h:19,
from ../../root/dpdk/lib/cryptodev/rte_cryptodev.h:23,
from
../../root/dpdk/drivers/crypto/qat/dev/qat_crypto_pmd_gen_lce.c:5:
../../root/dpdk/drivers/crypto/qat/dev/qat_crypto_pmd_gen_lce.c: In function
'qat_sym_build_op_aead_gen_lce':
../../root/dpdk/drivers/crypto/qat/dev/qat_crypto_pmd_gen_lce.c:160:56: err=
or:
'ICP_QAT_FW_SYM_COMM_ADDR_SGL' undeclared (first use in this function); did=
you
mean 'ICP_QAT_FW_SYM_AEAD_ALGO_SET'?
160 | RTE_ASSERT((qat_req->comn_hdr.comn_req_flags &
ICP_QAT_FW_SYM_COMM_ADDR_SGL) =3D=3D 1);
|=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20
^~~~~~~~~~~~~~~~~~~~~~~~~~~~
../../root/dpdk/lib/eal/include/rte_branch_prediction.h:47:45: note: in
definition of macro 'unlikely'
47 | #define unlikely(x) __builtin_expect(!!(x), 0)
| ^
../../root/dpdk/lib/eal/include/rte_debug.h:47:25: note: in expansion of ma=
cro
'RTE_VERIFY'
47 | #define RTE_ASSERT(exp) RTE_VERIFY(exp)
| ^~~~~~~~~~
../../root/dpdk/drivers/crypto/qat/dev/qat_crypto_pmd_gen_lce.c:160:9: note=
: in
expansion of macro 'RTE_ASSERT'
160 | RTE_ASSERT((qat_req->comn_hdr.comn_req_flags &
ICP_QAT_FW_SYM_COMM_ADDR_SGL) =3D=3D 1);
| ^~~~~~~~~~
../../root/dpdk/drivers/crypto/qat/dev/qat_crypto_pmd_gen_lce.c:160:56: not=
e:
each undeclared identifier is reported only once for each function it appea=
rs
in
160 | RTE_ASSERT((qat_req->comn_hdr.comn_req_flags &
ICP_QAT_FW_SYM_COMM_ADDR_SGL) =3D=3D 1);
|=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20
^~~~~~~~~~~~~~~~~~~~~~~~~~~~
../../root/dpdk/lib/eal/include/rte_branch_prediction.h:47:45: note: in
definition of macro 'unlikely'
47 | #define unlikely(x) __builtin_expect(!!(x), 0)
| ^
../../root/dpdk/lib/eal/include/rte_debug.h:47:25: note: in expansion of ma=
cro
'RTE_VERIFY'
47 | #define RTE_ASSERT(exp) RTE_VERIFY(exp)
| ^~~~~~~~~~
../../root/dpdk/drivers/crypto/qat/dev/qat_crypto_pmd_gen_lce.c:160:9: note=
: in
expansion of macro 'RTE_ASSERT'
160 | RTE_ASSERT((qat_req->comn_hdr.comn_req_flags &
ICP_QAT_FW_SYM_COMM_ADDR_SGL) =3D=3D 1);
| ^~~~~~~~~~
[826/2503] Compiling C object
drivers/common/sfc_efx/base/libsfc_base.a.p/ef10_nic.c.o
ninja: build stopped: subcommand failed.
"""
Doesn't reproduce without -Dc_args=3D'-DRTE_ENABLE_ASSERT'.
OS: Debian 12
Meson: 1.0.1
gcc: 12.2.0 (Debian 12.2.0-14)
--=20
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--17096201590.a3E6d72f.2660811
Date: Tue, 5 Mar 2024 07:29:19 +0100
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Bug ID |
1395
|
Summary |
crypto/qat debug build failure with RTE_ENABLE_ASSERT (ICP_QA=
T_FW_SYM_COMM_ADDR_SGL undeclared)
|
Product |
DPDK
|
Version |
23.11
|
Hardware |
All
|
OS |
All
|
Status |
UNCONFIRMED
|
Severity |
normal
|
Priority |
Normal
|
Component |
cryptodev
|
Assignee |
dev@dpdk.org
|
Reporter |
alialnu@nvidia.com
|
Target Milestone |
---
|
You are receiving this mail because:
- You are the assignee for the bug.
=20=20=20=20=20=20=20=20=20=20
=
--17096201590.a3E6d72f.2660811--