From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1EB9CA04E1; Tue, 22 Sep 2020 08:14:58 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id F25E21D67A; Tue, 22 Sep 2020 08:14:57 +0200 (CEST) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by dpdk.org (Postfix) with ESMTP id 5DC811D674 for ; Tue, 22 Sep 2020 08:14:56 +0200 (CEST) IronPort-SDR: U9JTS4fpQSiEz+6xcWlLTtaUZ1+olMbLmETyH1gzi6Yn9KoNVOcKcnWqk00E0EvvaibwfaUm5O E0e/dVILuEeA== X-IronPort-AV: E=McAfee;i="6000,8403,9751"; a="140543616" X-IronPort-AV: E=Sophos;i="5.77,289,1596524400"; d="scan'208";a="140543616" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Sep 2020 23:14:55 -0700 IronPort-SDR: LZcM4y5JFGMrGlSFCRsNq2B0bUGk9DQxCGVNC0leo1fblvOu3saHZ0O0gSrqqtpfZHIHMQWysv 4DNtzk9i/vgw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,289,1596524400"; d="scan'208";a="511036819" Received: from fmsmsx606.amr.corp.intel.com ([10.18.126.86]) by fmsmga005.fm.intel.com with ESMTP; 21 Sep 2020 23:14:55 -0700 Received: from shsmsx601.ccr.corp.intel.com (10.109.6.141) by fmsmsx606.amr.corp.intel.com (10.18.126.86) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Mon, 21 Sep 2020 23:14:54 -0700 Received: from shsmsx601.ccr.corp.intel.com (10.109.6.141) by SHSMSX601.ccr.corp.intel.com (10.109.6.141) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Tue, 22 Sep 2020 14:14:52 +0800 Received: from shsmsx601.ccr.corp.intel.com ([10.109.6.141]) by SHSMSX601.ccr.corp.intel.com ([10.109.6.141]) with mapi id 15.01.1713.004; Tue, 22 Sep 2020 14:14:52 +0800 From: "Guo, Jia" To: "Wang, Haiyue" , "dev@dpdk.org" CC: "Zhang, Qi Z" , "Jiang, JunyuX" , "Rong, Leyi" , "Yang, Qiming" , "Sun, GuinanX" , "Guo, Junfeng" Thread-Topic: [PATCH v3] net/ice: refactor the Rx FlexiMD handling Thread-Index: AQHWjVqGsoqCf+Q0+0qVVpR7y2Zz86l0IpMg//+C3QCAAIcrkP//gGGAgACGfSA= Date: Tue, 22 Sep 2020 06:14:52 +0000 Message-ID: References: <20200917115332.45663-1-haiyue.wang@intel.com> <20200918010535.27089-1-haiyue.wang@intel.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-reaction: no-action dlp-version: 11.5.1.3 x-originating-ip: [10.239.127.36] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v3] net/ice: refactor the Rx FlexiMD handling X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Wang, Haiyue > Sent: Tuesday, September 22, 2020 2:09 PM > To: Guo, Jia ; dev@dpdk.org > Cc: Zhang, Qi Z ; Jiang, JunyuX > ; Rong, Leyi ; Yang, Qiming > ; Sun, GuinanX ; Guo, > Junfeng > Subject: RE: [PATCH v3] net/ice: refactor the Rx FlexiMD handling >=20 > > -----Original Message----- > > From: Guo, Jia > > Sent: Tuesday, September 22, 2020 13:51 > > To: Wang, Haiyue ; dev@dpdk.org > > Cc: Zhang, Qi Z ; Jiang, JunyuX > > ; Rong, Leyi ; Yang, > > Qiming ; Sun, GuinanX ; > > Guo, Junfeng > > Subject: RE: [PATCH v3] net/ice: refactor the Rx FlexiMD handling > > > > > > > -----Original Message----- > > > From: Wang, Haiyue > > > Sent: Tuesday, September 22, 2020 1:42 PM > > > To: Guo, Jia ; dev@dpdk.org > > > Cc: Zhang, Qi Z ; Jiang, JunyuX > > > ; Rong, Leyi ; Yang, > > > Qiming ; Sun, GuinanX > > > ; Guo, Junfeng > > > Subject: RE: [PATCH v3] net/ice: refactor the Rx FlexiMD handling > > > > > > Hi Jeff, > > > > > > > -----Original Message----- > > > > From: Guo, Jia > > > > Sent: Tuesday, September 22, 2020 13:35 > > > > To: Wang, Haiyue ; dev@dpdk.org > > > > Cc: Zhang, Qi Z ; Jiang, JunyuX > > > > ; Rong, Leyi ; Yang, > > > > Qiming ; Sun, GuinanX > > > > ; Guo, Junfeng > > > > Subject: RE: [PATCH v3] net/ice: refactor the Rx FlexiMD handling > > > > > > > > Hi, haiyue > > > > >=20 > > > > > + struct rte_mbuf *mb, > > > > > + volatile union ice_rx_flex_desc *rxdp) { volatile struct > > > > > +ice_32b_rx_flex_desc_comms_ovs *desc =3D (volatile struct > > > > > +ice_32b_rx_flex_desc_comms_ovs > > > > > *)rxdp; #ifndef > > > > > +RTE_LIBRTE_ICE_16BYTE_RX_DESC > > > > > +uint16_t stat_err; > > > > > +#endif > > > > > > > > This #ifndef could be better combine with below #ifndef. > > > > > > > > > > I changed it to according to the different offsets, like ovs has rss > > > hash in Qword 3, which is after flow Id Qword 1, others are > > > opposite. So that this handling order can reflect the offset > > > difference, although, it MAY looks not so beautiful. What do you > > > think ? :) > > > > > > > I am not sure I got you point about the order reason, but I think in > > or out #ifndef should be clear show the offset difference, >=20 > You mean below ? If so, 'uint16_t stat_err;' is not so good in the middle= of > two code blocks. >=20 > #ifndef RTE_LIBRTE_ICE_16BYTE_RX_DESC > uint16_t stat_err; >=20 > stat_err =3D rte_le_to_cpu_16(desc->status_error0); > if (likely(stat_err & (1 << ICE_RX_FLEX_DESC_STATUS0_RSS_VALID_S))) { > mb->ol_flags |=3D PKT_RX_RSS_HASH; > mb->hash.rss =3D rte_le_to_cpu_32(desc->rss_hash); > } > #endif >=20 Sorry, let me show clear as below #ifndef RTE_LIBRTE_ICE_16BYTE_RX_DESC uint16_t stat_err; stat_err =3D rte_le_to_cpu_16(desc->status_error0); if (likely(stat_err & (1 << ICE_RX_FLEX_DESC_STATUS0_RSS_VALID_S))) { mb->ol_flags |=3D PKT_RX_RSS_HASH; mb->hash.rss =3D rte_le_to_cpu_32(desc->rss_hash); } #endif =09 if (desc->flow_id !=3D 0xFFFFFFFF) { mb->ol_flags |=3D PKT_RX_FDIR | PKT_RX_FDIR_ID; mb->hash.fdir.hi =3D rte_le_to_cpu_32(desc->flow_id); } >=20 > I am insist about that but if other also agree. And I still have 2 > > comments assume you are default agree and could I expect a new version > or not? > > >=20 > Oh, I missed you other two comments. Your reply is embedded into my > original many code lines. You can remove the unnecessary codes, so that > people can get your comments quickly without moving mouse down to check > line by line. ;-) >=20 >=20 That is a good idea. > > > > > +if (rxq->xtr_ol_flag) { > > > > > +uint32_t metadata =3D 0; > > > > > + > > > > > +if (desc->flex_ts.flex.aux0 !=3D 0xFFFF) metadata =3D > > > > > +rte_le_to_cpu_16(desc- > > > > > >flex_ts.flex.aux0); > > > > > +else if (desc->flex_ts.flex.aux1 !=3D 0xFFFF) metadata =3D > > > > > +rte_le_to_cpu_16(desc- > > > > > >flex_ts.flex.aux1); > > > > > > > > So you mean the ICE_RX_FLEX_DESC_STATUS1_XTRMD4_VALID_S and > > > > ICE_RX_FLEX_DESC_STATUS1_XTRMD5_VALID_S > > > > could not use to identify the IPv4 hdr offset and IPv6 hdr offset > > > > here in > > > rxdid # 25? > > > > And if yes they can and they will not set at the same time, is > > > > that separate > > > this v2 from v1 necessary? >=20 > XTRMD4/5_VALID_S can't detect the value of IP offset available, non > 0xffffffff is the right check condition. >=20 Ok, just clarify me now. > > > > > +uint64_t xtr_ol_flag; /* Protocol extraction offload flag */ > > > > > +ice_rxd_to_pkt_fields_t rxd_to_pkt_fields; > > > > > > > > If create a function pointer here in .h, it is better add some doc. >=20 > C comments: /* .... */ ? >=20 Yes. > > > > > > > > > ice_rx_release_mbufs_t rx_rel_mbufs; }; > > > > > > > > > > -- > > > > > 2.28.0 > > > > > > > > > >=20