Acked-by: Chengwen Feng <fengchengwen@huawei.com>

On 2024/2/10 14:27, pbhagavatula@marvell.com wrote:
> From: Pavan Nikhilesh<pbhagavatula@marvell.com>
>
> Align fp_objects based on cacheline size defined
> by build configuration.
>
> Signed-off-by: Pavan Nikhilesh<pbhagavatula@marvell.com>
> ---
> v2 Changes:
> - Drop malloc changes.
>
>   lib/dmadev/rte_dmadev_core.h | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/lib/dmadev/rte_dmadev_core.h b/lib/dmadev/rte_dmadev_core.h
> index 064785686f..e8239c2d22 100644
> --- a/lib/dmadev/rte_dmadev_core.h
> +++ b/lib/dmadev/rte_dmadev_core.h
> @@ -73,7 +73,7 @@ struct rte_dma_fp_object {
>   	rte_dma_completed_t        completed;
>   	rte_dma_completed_status_t completed_status;
>   	rte_dma_burst_capacity_t   burst_capacity;
> -} __rte_aligned(128);
> +} __rte_cache_aligned;
>
>   extern struct rte_dma_fp_object *rte_dma_fp_objs;
>
> --
> 2.25.1
>