From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DAFBAA0C46; Tue, 28 Sep 2021 04:17:09 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5F36440E3C; Tue, 28 Sep 2021 04:17:09 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mails.dpdk.org (Postfix) with ESMTP id 730AB40DF6 for ; Tue, 28 Sep 2021 04:17:07 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10120"; a="288261654" X-IronPort-AV: E=Sophos;i="5.85,328,1624345200"; d="scan'208";a="288261654" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Sep 2021 19:17:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.85,328,1624345200"; d="scan'208";a="537914755" Received: from fmsmsx605.amr.corp.intel.com ([10.18.126.85]) by fmsmga004.fm.intel.com with ESMTP; 27 Sep 2021 19:17:06 -0700 Received: from shsmsx605.ccr.corp.intel.com (10.109.6.215) by fmsmsx605.amr.corp.intel.com (10.18.126.85) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2242.12; Mon, 27 Sep 2021 19:17:05 -0700 Received: from shsmsx601.ccr.corp.intel.com (10.109.6.141) by SHSMSX605.ccr.corp.intel.com (10.109.6.215) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2242.12; Tue, 28 Sep 2021 10:16:58 +0800 Received: from shsmsx601.ccr.corp.intel.com ([10.109.6.141]) by SHSMSX601.ccr.corp.intel.com ([10.109.6.141]) with mapi id 15.01.2242.012; Tue, 28 Sep 2021 10:16:58 +0800 From: "Zhang, Qi Z" To: "Su, Simei" CC: "dev@dpdk.org" , "Wang, Haiyue" Thread-Topic: [PATCH v5] net/ice: support IEEE 1588 PTP Thread-Index: AQHXs3rx7s2K0CpthU26sWQC4d9c2qu4sueg Date: Tue, 28 Sep 2021 02:16:58 +0000 Message-ID: References: <20210922084633.166409-1-simei.su@intel.com> <20210927082818.267720-1-simei.su@intel.com> In-Reply-To: <20210927082818.267720-1-simei.su@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-reaction: no-action dlp-version: 11.6.200.16 dlp-product: dlpe-windows x-originating-ip: [10.239.127.36] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v5] net/ice: support IEEE 1588 PTP X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Su, Simei > Sent: Monday, September 27, 2021 4:28 PM > To: Zhang, Qi Z > Cc: dev@dpdk.org; Wang, Haiyue ; Su, Simei > > Subject: [PATCH v5] net/ice: support IEEE 1588 PTP >=20 > Add ice support for new ethdev APIs to enable/disable and read/write/adju= st > IEEE1588 PTP timestamps. Currently, only scalar path supports 1588 PTP, > vector path doesn't. >=20 > The example command for running ptpclient is as below: > ./build/examples/dpdk-ptpclient -c 1 -n 3 -- -T 0 -p 0x1 >=20 > Signed-off-by: Simei Su > --- > v5: > * Refine patch title and commit log. > * Simplify judge logic in ice_timesync_enable and ice_program_hw_rx_queue= . > * Add flag reset in ice_timesync_disable. >=20 > v4: > * Rework code to consider ice_dev_start and ice_timesync_enable order. >=20 > v3: > * Rework code to support scalar path only. > * Update the doc/guides/nics/features/ice.ini to add "Timesync" feature. > * Add release notes. >=20 > v2: > * Change patchset to one patch based on share code update. > * Change per device offload to per queue offload. >=20 > doc/guides/nics/features/ice.ini | 1 + > doc/guides/rel_notes/release_21_11.rst | 1 + > drivers/net/ice/ice_ethdev.c | 201 > ++++++++++++++++++++++++++++++++- > drivers/net/ice/ice_ethdev.h | 6 + > drivers/net/ice/ice_rxtx.c | 41 ++++++- > drivers/net/ice/ice_rxtx.h | 1 + > 6 files changed, 248 insertions(+), 3 deletions(-) >=20 ...... >=20 > static int > +ice_timesync_enable(struct rte_eth_dev *dev) { > + struct ice_hw *hw =3D ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private); > + struct ice_adapter *ad =3D > + ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); > + int ret; > + > + if (hw->func_caps.ts_func_info.src_tmr_owned) { > + ret =3D ice_ptp_init_phc(hw); > + if (ret) { > + PMD_DRV_LOG(ERR, "Failed to initialize PHC"); > + return -1; > + } > + > + ret =3D ice_ptp_write_incval(hw, ICE_PTP_NOMINAL_INCVAL_E810); > + if (ret) { > + PMD_DRV_LOG(ERR, > + "Failed to write PHC increment time value"); > + return -1; > + } > + } > + > + /* Initialize cycle counters for system time/RX/TX timestamp */ > + memset(&ad->systime_tc, 0, sizeof(struct rte_timecounter)); > + memset(&ad->rx_tstamp_tc, 0, sizeof(struct rte_timecounter)); > + memset(&ad->tx_tstamp_tc, 0, sizeof(struct rte_timecounter)); > + > + ad->systime_tc.cc_mask =3D ICE_CYCLECOUNTER_MASK; > + ad->systime_tc.cc_shift =3D 0; > + ad->systime_tc.nsec_mask =3D 0; > + > + ad->rx_tstamp_tc.cc_mask =3D ICE_CYCLECOUNTER_MASK; > + ad->rx_tstamp_tc.cc_shift =3D 0; > + ad->rx_tstamp_tc.nsec_mask =3D 0; > + > + ad->tx_tstamp_tc.cc_mask =3D ICE_CYCLECOUNTER_MASK; > + ad->tx_tstamp_tc.cc_shift =3D 0; > + ad->tx_tstamp_tc.nsec_mask =3D 0; > + > + if (dev->data->dev_started && !(dev->data->dev_conf.rxmode.offloads & > + DEV_RX_OFFLOAD_TIMESTAMP)) { > + PMD_DRV_LOG(ERR, "Rx timestamp offload not configured"); > + return -1; > + } else { > + ad->ptp_ena =3D 1; > + } No need "else" branch if already return in "if" branch. > diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c inde= x > bb75183..7089202 100644 > --- a/drivers/net/ice/ice_rxtx.c > +++ b/drivers/net/ice/ice_rxtx.c > @@ -270,6 +270,7 @@ ice_program_hw_rx_queue(struct ice_rx_queue *rxq) > struct rte_eth_rxmode *rxmode =3D &dev_data->dev_conf.rxmode; > uint32_t rxdid =3D ICE_RXDID_COMMS_OVS; > uint32_t regval; > + struct ice_adapter *ad =3D rxq->vsi->adapter; >=20 > /* Set buffer size as the head split is disabled. */ > buf_size =3D (uint16_t)(rte_pktmbuf_data_room_size(rxq->mp) - @@ -366,7 > +367,8 @@ ice_program_hw_rx_queue(struct ice_rx_queue *rxq) > regval |=3D (0x03 << QRXFLXP_CNTXT_RXDID_PRIO_S) & > QRXFLXP_CNTXT_RXDID_PRIO_M; >=20 > - if (rxq->offloads & DEV_RX_OFFLOAD_TIMESTAMP) > + if ((!ad->ptp_ena && (rxq->offloads & DEV_RX_OFFLOAD_TIMESTAMP)) || > + ad->ptp_ena) it can be simplified to ptp_ena || offloads & TIMESTAMP.