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Tue, 06 Oct 2020 11:00:09 -0400 X-MC-Unique: y7yIIOVxMIKuvufPHhz9qg-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id B67331030984; Tue, 6 Oct 2020 15:00:07 +0000 (UTC) Received: from [10.36.110.35] (unknown [10.36.110.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id A728E1002C2F; Tue, 6 Oct 2020 15:00:05 +0000 (UTC) To: Marvin Liu , chenbo.xia@intel.com, zhihong.wang@intel.com Cc: dev@dpdk.org References: <20200819032414.51430-2-yong.liu@intel.com> <20200921064837.15957-1-yong.liu@intel.com> <20200921064837.15957-6-yong.liu@intel.com> From: Maxime Coquelin Autocrypt: addr=maxime.coquelin@redhat.com; keydata= mQINBFOEQQIBEADjNLYZZqghYuWv1nlLisptPJp+TSxE/KuP7x47e1Gr5/oMDJ1OKNG8rlNg kLgBQUki3voWhUbMb69ybqdMUHOl21DGCj0BTU3lXwapYXOAnsh8q6RRM+deUpasyT+Jvf3a gU35dgZcomRh5HPmKMU4KfeA38cVUebsFec1HuJAWzOb/UdtQkYyZR4rbzw8SbsOemtMtwOx YdXodneQD7KuRU9IhJKiEfipwqk2pufm2VSGl570l5ANyWMA/XADNhcEXhpkZ1Iwj3TWO7XR uH4xfvPl8nBsLo/EbEI7fbuUULcAnHfowQslPUm6/yaGv6cT5160SPXT1t8U9QDO6aTSo59N jH519JS8oeKZB1n1eLDslCfBpIpWkW8ZElGkOGWAN0vmpLfdyiqBNNyS3eGAfMkJ6b1A24un /TKc6j2QxM0QK4yZGfAxDxtvDv9LFXec8ENJYsbiR6WHRHq7wXl/n8guyh5AuBNQ3LIK44x0 KjGXP1FJkUhUuruGyZsMrDLBRHYi+hhDAgRjqHgoXi5XGETA1PAiNBNnQwMf5aubt+mE2Q5r qLNTgwSo2dpTU3+mJ3y3KlsIfoaxYI7XNsPRXGnZi4hbxmeb2NSXgdCXhX3nELUNYm4ArKBP LugOIT/zRwk0H0+RVwL2zHdMO1Tht1UOFGfOZpvuBF60jhMzbQARAQABtCxNYXhpbWUgQ29x dWVsaW4gPG1heGltZS5jb3F1ZWxpbkByZWRoYXQuY29tPokCOAQTAQIAIgUCV3u/5QIbAwYL CQgHAwIGFQgCCQoLBBYCAwECHgECF4AACgkQyjiNKEaHD4ma2g/+P+Hg9WkONPaY1J4AR7Uf kBneosS4NO3CRy0x4WYmUSLYMLx1I3VH6SVjqZ6uBoYy6Fs6TbF6SHNc7QbB6Qjo3neqnQR1 71Ua1MFvIob8vUEl3jAR/+oaE1UJKrxjWztpppQTukIk4oJOmXbL0nj3d8dA2QgHdTyttZ1H xzZJWWz6vqxCrUqHU7RSH9iWg9R2iuTzii4/vk1oi4Qz7y/q8ONOq6ffOy/t5xSZOMtZCspu Mll2Szzpc/trFO0pLH4LZZfz/nXh2uuUbk8qRIJBIjZH3ZQfACffgfNefLe2PxMqJZ8mFJXc RQO0ONZvwoOoHL6CcnFZp2i0P5ddduzwPdGsPq1bnIXnZqJSl3dUfh3xG5ArkliZ/++zGF1O wvpGvpIuOgLqjyCNNRoR7cP7y8F24gWE/HqJBXs1qzdj/5Hr68NVPV1Tu/l2D1KMOcL5sOrz 2jLXauqDWn1Okk9hkXAP7+0Cmi6QwAPuBT3i6t2e8UdtMtCE4sLesWS/XohnSFFscZR6Vaf3 gKdWiJ/fW64L6b9gjkWtHd4jAJBAIAx1JM6xcA1xMbAFsD8gA2oDBWogHGYcScY/4riDNKXi lw92d6IEHnSf6y7KJCKq8F+Jrj2BwRJiFKTJ6ChbOpyyR6nGTckzsLgday2KxBIyuh4w+hMq TGDSp2rmWGJjASq5Ag0EVPSbkwEQAMkaNc084Qvql+XW+wcUIY+Dn9A2D1gMr2BVwdSfVDN7 0ZYxo9PvSkzh6eQmnZNQtl8WSHl3VG3IEDQzsMQ2ftZn2sxjcCadexrQQv3Lu60Tgj7YVYRM H+fLYt9W5YuWduJ+FPLbjIKynBf6JCRMWr75QAOhhhaI0tsie3eDsKQBA0w7WCuPiZiheJaL 4MDe9hcH4rM3ybnRW7K2dLszWNhHVoYSFlZGYh+MGpuODeQKDS035+4H2rEWgg+iaOwqD7bg CQXwTZ1kSrm8NxIRVD3MBtzp9SZdUHLfmBl/tLVwDSZvHZhhvJHC6Lj6VL4jPXF5K2+Nn/Su CQmEBisOmwnXZhhu8ulAZ7S2tcl94DCo60ReheDoPBU8PR2TLg8rS5f9w6mLYarvQWL7cDtT d2eX3Z6TggfNINr/RTFrrAd7NHl5h3OnlXj7PQ1f0kfufduOeCQddJN4gsQfxo/qvWVB7PaE 1WTIggPmWS+Xxijk7xG6x9McTdmGhYaPZBpAxewK8ypl5+yubVsE9yOOhKMVo9DoVCjh5To5 aph7CQWfQsV7cd9PfSJjI2lXI0dhEXhQ7lRCFpf3V3mD6CyrhpcJpV6XVGjxJvGUale7+IOp sQIbPKUHpB2F+ZUPWds9yyVxGwDxD8WLqKKy0WLIjkkSsOb9UBNzgRyzrEC9lgQ/ABEBAAGJ Ah8EGAECAAkFAlT0m5MCGwwACgkQyjiNKEaHD4nU8hAAtt0xFJAy0sOWqSmyxTc7FUcX+pbD KVyPlpl6urKKMk1XtVMUPuae/+UwvIt0urk1mXi6DnrAN50TmQqvdjcPTQ6uoZ8zjgGeASZg jj0/bJGhgUr9U7oG7Hh2F8vzpOqZrdd65MRkxmc7bWj1k81tOU2woR/Gy8xLzi0k0KUa8ueB iYOcZcIGTcs9CssVwQjYaXRoeT65LJnTxYZif2pfNxfINFzCGw42s3EtZFteczClKcVSJ1+L +QUY/J24x0/ocQX/M1PwtZbB4c/2Pg/t5FS+s6UB1Ce08xsJDcwyOPIH6O3tccZuriHgvqKP yKz/Ble76+NFlTK1mpUlfM7PVhD5XzrDUEHWRTeTJSvJ8TIPL4uyfzhjHhlkCU0mw7Pscyxn DE8G0UYMEaNgaZap8dcGMYH/96EfE5s/nTX0M6MXV0yots7U2BDb4soLCxLOJz4tAFDtNFtA wLBhXRSvWhdBJZiig/9CG3dXmKfi2H+wdUCSvEFHRpgo7GK8/Kh3vGhgKmnnxhl8ACBaGy9n fxjSxjSO6rj4/MeenmlJw1yebzkX8ZmaSi8BHe+n6jTGEFNrbiOdWpJgc5yHIZZnwXaW54QT UhhSjDL1rV2B4F28w30jYmlRmm2RdN7iCZfbyP3dvFQTzQ4ySquuPkIGcOOHrvZzxbRjzMx1 Mwqu3GQ= Message-ID: Date: Tue, 6 Oct 2020 17:00:03 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20200921064837.15957-6-yong.liu@intel.com> X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=maxime.coquelin@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Subject: Re: [dpdk-dev] [PATCH v2 5/5] vhost: add packed ring vectorized enqueue X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 9/21/20 8:48 AM, Marvin Liu wrote: > Optimize vhost packed ring enqueue path with SIMD instructions. Four > descriptors status and length are batched handled with AVX512 > instructions. Address translation operations are also accelerated > by AVX512 instructions. > > Signed-off-by: Marvin Liu > > diff --git a/lib/librte_vhost/vhost.h b/lib/librte_vhost/vhost.h > index fc7daf2145..b78b2c5c1b 100644 > --- a/lib/librte_vhost/vhost.h > +++ b/lib/librte_vhost/vhost.h > @@ -1132,4 +1132,10 @@ vhost_reserve_avail_batch_packed_avx(struct virtio_net *dev, > uint16_t avail_idx, > uintptr_t *desc_addrs, > uint16_t *ids); > + > +int > +virtio_dev_rx_batch_packed_avx(struct virtio_net *dev, > + struct vhost_virtqueue *vq, > + struct rte_mbuf **pkts); > + > #endif /* _VHOST_NET_CDEV_H_ */ > diff --git a/lib/librte_vhost/vhost_vec_avx.c b/lib/librte_vhost/vhost_vec_avx.c > index dc5322d002..7d2250ed86 100644 > --- a/lib/librte_vhost/vhost_vec_avx.c > +++ b/lib/librte_vhost/vhost_vec_avx.c > @@ -35,9 +35,15 @@ > #define PACKED_AVAIL_FLAG ((0ULL | VRING_DESC_F_AVAIL) << FLAGS_BITS_OFFSET) > #define PACKED_AVAIL_FLAG_WRAP ((0ULL | VRING_DESC_F_USED) << \ > FLAGS_BITS_OFFSET) > +#define PACKED_WRITE_AVAIL_FLAG (PACKED_AVAIL_FLAG | \ > + ((0ULL | VRING_DESC_F_WRITE) << FLAGS_BITS_OFFSET)) > +#define PACKED_WRITE_AVAIL_FLAG_WRAP (PACKED_AVAIL_FLAG_WRAP | \ > + ((0ULL | VRING_DESC_F_WRITE) << FLAGS_BITS_OFFSET)) > > #define DESC_FLAGS_POS 0xaa > #define MBUF_LENS_POS 0x6666 > +#define DESC_LENS_POS 0x4444 > +#define DESC_LENS_FLAGS_POS 0xB0B0B0B0 > > int > vhost_reserve_avail_batch_packed_avx(struct virtio_net *dev, > @@ -179,3 +185,154 @@ vhost_reserve_avail_batch_packed_avx(struct virtio_net *dev, > > return -1; > } > + > +int > +virtio_dev_rx_batch_packed_avx(struct virtio_net *dev, > + struct vhost_virtqueue *vq, > + struct rte_mbuf **pkts) > +{ > + struct vring_packed_desc *descs = vq->desc_packed; > + uint16_t avail_idx = vq->last_avail_idx; > + uint64_t desc_addrs[PACKED_BATCH_SIZE]; > + uint32_t buf_offset = dev->vhost_hlen; > + uint32_t desc_status; > + uint64_t lens[PACKED_BATCH_SIZE]; > + uint16_t i; > + void *desc_addr; > + uint8_t cmp_low, cmp_high, cmp_result; > + > + if (unlikely(avail_idx & PACKED_BATCH_MASK)) > + return -1; Same comment as for patch 4. Packed ring size may not be a pow2. > + /* check refcnt and nb_segs */ > + __m256i mbuf_ref = _mm256_set1_epi64x(DEFAULT_REARM_DATA); > + > + /* load four mbufs rearm data */ > + __m256i mbufs = _mm256_set_epi64x( > + *pkts[3]->rearm_data, > + *pkts[2]->rearm_data, > + *pkts[1]->rearm_data, > + *pkts[0]->rearm_data); > + > + uint16_t cmp = _mm256_cmpneq_epu16_mask(mbufs, mbuf_ref); > + if (cmp & MBUF_LENS_POS) > + return -1; > + > + /* check desc status */ > + desc_addr = &vq->desc_packed[avail_idx]; > + __m512i desc_vec = _mm512_loadu_si512(desc_addr); > + > + __m512i avail_flag_vec; > + __m512i used_flag_vec; > + if (vq->avail_wrap_counter) { > +#if defined(RTE_ARCH_I686) Is supporting AVX512 on i686 really useful/necessary? > + avail_flag_vec = _mm512_set4_epi64(PACKED_WRITE_AVAIL_FLAG, > + 0x0, PACKED_WRITE_AVAIL_FLAG, 0x0); > + used_flag_vec = _mm512_set4_epi64(PACKED_FLAGS_MASK, 0x0, > + PACKED_FLAGS_MASK, 0x0); > +#else > + avail_flag_vec = _mm512_maskz_set1_epi64(DESC_FLAGS_POS, > + PACKED_WRITE_AVAIL_FLAG); > + used_flag_vec = _mm512_maskz_set1_epi64(DESC_FLAGS_POS, > + PACKED_FLAGS_MASK); > +#endif > + } else { > +#if defined(RTE_ARCH_I686) > + avail_flag_vec = _mm512_set4_epi64( > + PACKED_WRITE_AVAIL_FLAG_WRAP, 0x0, > + PACKED_WRITE_AVAIL_FLAG, 0x0); > + used_flag_vec = _mm512_set4_epi64(0x0, 0x0, 0x0, 0x0); > +#else > + avail_flag_vec = _mm512_maskz_set1_epi64(DESC_FLAGS_POS, > + PACKED_WRITE_AVAIL_FLAG_WRAP); > + used_flag_vec = _mm512_setzero_epi32(); > +#endif > + } > + > + desc_status = _mm512_mask_cmp_epu16_mask(BATCH_FLAGS_MASK, desc_vec, > + avail_flag_vec, _MM_CMPINT_NE); > + if (desc_status) > + return -1; > + > + if (dev->features & (1ULL << VIRTIO_F_IOMMU_PLATFORM)) { > + vhost_for_each_try_unroll(i, 0, PACKED_BATCH_SIZE) { > + uint64_t size = (uint64_t)descs[avail_idx + i].len; > + desc_addrs[i] = __vhost_iova_to_vva(dev, vq, > + descs[avail_idx + i].addr, &size, > + VHOST_ACCESS_RW); > + > + if (!desc_addrs[i]) > + return -1; > + > + rte_prefetch0(rte_pktmbuf_mtod_offset(pkts[i], void *, > + 0)); > + } > + } else { > + /* check buffer fit into one region & translate address */ > + __m512i regions_low_addrs = > + _mm512_loadu_si512((void *)&dev->regions_low_addrs); > + __m512i regions_high_addrs = > + _mm512_loadu_si512((void *)&dev->regions_high_addrs); > + vhost_for_each_try_unroll(i, 0, PACKED_BATCH_SIZE) { > + uint64_t addr_low = descs[avail_idx + i].addr; > + uint64_t addr_high = addr_low + > + descs[avail_idx + i].len; > + __m512i low_addr_vec = _mm512_set1_epi64(addr_low); > + __m512i high_addr_vec = _mm512_set1_epi64(addr_high); > + > + cmp_low = _mm512_cmp_epi64_mask(low_addr_vec, > + regions_low_addrs, _MM_CMPINT_NLT); > + cmp_high = _mm512_cmp_epi64_mask(high_addr_vec, > + regions_high_addrs, _MM_CMPINT_LT); > + cmp_result = cmp_low & cmp_high; > + int index = __builtin_ctz(cmp_result); > + if (unlikely((uint32_t)index >= dev->mem->nregions)) > + return -1; > + > + desc_addrs[i] = addr_low + > + dev->mem->regions[index].host_user_addr - > + dev->mem->regions[index].guest_phys_addr; > + rte_prefetch0(rte_pktmbuf_mtod_offset(pkts[i], void *, > + 0)); > + } > + } > + > + /* check length is enough */ > + __m512i pkt_lens = _mm512_set_epi32( > + 0, pkts[3]->pkt_len, 0, 0, > + 0, pkts[2]->pkt_len, 0, 0, > + 0, pkts[1]->pkt_len, 0, 0, > + 0, pkts[0]->pkt_len, 0, 0); > + > + __m512i mbuf_len_offset = _mm512_maskz_set1_epi32(DESC_LENS_POS, > + dev->vhost_hlen); > + __m512i buf_len_vec = _mm512_add_epi32(pkt_lens, mbuf_len_offset); > + uint16_t lens_cmp = _mm512_mask_cmp_epu32_mask(DESC_LENS_POS, > + desc_vec, buf_len_vec, _MM_CMPINT_LT); > + if (lens_cmp) > + return -1; > + > + vhost_for_each_try_unroll(i, 0, PACKED_BATCH_SIZE) { > + rte_memcpy((void *)(uintptr_t)(desc_addrs[i] + buf_offset), > + rte_pktmbuf_mtod_offset(pkts[i], void *, 0), > + pkts[i]->pkt_len); > + } > + > + if (unlikely((dev->features & (1ULL << VHOST_F_LOG_ALL)))) { > + vhost_for_each_try_unroll(i, 0, PACKED_BATCH_SIZE) { > + lens[i] = descs[avail_idx + i].len; > + vhost_log_cache_write_iova(dev, vq, > + descs[avail_idx + i].addr, lens[i]); > + } > + } > + > + vq_inc_last_avail_packed(vq, PACKED_BATCH_SIZE); > + vq_inc_last_used_packed(vq, PACKED_BATCH_SIZE); > + /* save len and flags, skip addr and id */ > + __m512i desc_updated = _mm512_mask_add_epi16(desc_vec, > + DESC_LENS_FLAGS_POS, buf_len_vec, > + used_flag_vec); > + _mm512_storeu_si512(desc_addr, desc_updated); > + > + return 0; > +} > diff --git a/lib/librte_vhost/virtio_net.c b/lib/librte_vhost/virtio_net.c > index e4d2e2e7d6..5c56a8d6ff 100644 > --- a/lib/librte_vhost/virtio_net.c > +++ b/lib/librte_vhost/virtio_net.c > @@ -1354,6 +1354,21 @@ virtio_dev_rx_single_packed(struct virtio_net *dev, > return 0; > } > > +static __rte_always_inline int > +virtio_dev_rx_handle_batch_packed(struct virtio_net *dev, > + struct vhost_virtqueue *vq, > + struct rte_mbuf **pkts) > + > +{ > + if (unlikely(dev->vectorized)) > +#ifdef CC_AVX512_SUPPORT > + return virtio_dev_rx_batch_packed_avx(dev, vq, pkts); > +#else > + return virtio_dev_rx_batch_packed(dev, vq, pkts); > +#endif > + return virtio_dev_rx_batch_packed(dev, vq, pkts); It should be as below to not have any performance impact when CC_AVX512_SUPPORT is not set: #ifdef CC_AVX512_SUPPORT if (unlikely(dev->vectorized)) return virtio_dev_rx_batch_packed_avx(dev, vq, pkts); #else return virtio_dev_rx_batch_packed(dev, vq, pkts); #endif > +} > + > static __rte_noinline uint32_t > virtio_dev_rx_packed(struct virtio_net *dev, > struct vhost_virtqueue *__rte_restrict vq, > @@ -1367,8 +1382,8 @@ virtio_dev_rx_packed(struct virtio_net *dev, > rte_prefetch0(&vq->desc_packed[vq->last_avail_idx]); > > if (remained >= PACKED_BATCH_SIZE) { > - if (!virtio_dev_rx_batch_packed(dev, vq, > - &pkts[pkt_idx])) { > + if (!virtio_dev_rx_handle_batch_packed(dev, vq, > + &pkts[pkt_idx])) { > pkt_idx += PACKED_BATCH_SIZE; > remained -= PACKED_BATCH_SIZE; > continue; >