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/**< NULL if not currently sleeping */ > } __rte_cache_aligned wait_status[RTE_MAX_LCORE]; > > +/** > + * These functions uses UMONITOR/UMWAIT instructions and will enter C0.2 state. > + * For more information about usage of these instructions, please refer to > + * Intel(R) 64 and IA-32 Architectures Software Developer's Manual. > + */ > +static void intel_umonitor(volatile void *addr) > +{ > + /* UMONITOR */ > + asm volatile(".byte 0xf3, 0x0f, 0xae, 0xf7;" > + : > + : "D"(addr)); > +} > + > +static void intel_umwait(const uint64_t timeout) > +{ > + const uint32_t tsc_l = (uint32_t)timeout; > + const uint32_t tsc_h = (uint32_t)(timeout >> 32); > + /* UMWAIT */ > + asm volatile(".byte 0xf2, 0x0f, 0xae, 0xf7;" > + : /* ignore rflags */ > + : "D"(0), /* enter C0.2 */ > + "a"(tsc_l), "d"(tsc_h)); > +} > + > +/** > + * These functions uses MONITORX/MWAITX instructions and will enter C1 state. > + * For more information about usage of these instructions, please refer to > + * AMD64 Architecture Programmer’s Manual. The quote sign is wrong :) -- Thanks, Anatoly