From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C07D4A054A; Fri, 19 Feb 2021 10:06:34 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5817B40395; Fri, 19 Feb 2021 10:06:34 +0100 (CET) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id 9044B40042; Fri, 19 Feb 2021 10:06:32 +0100 (CET) IronPort-SDR: Rw9t8K449mqWWL7g7hV/0AVGEIq3hKMs/F6JCClSLYBjuMRr4huBHZLBsvBGWmAmwSicU8ZS+S MhWNcjj/FrJQ== X-IronPort-AV: E=McAfee;i="6000,8403,9899"; a="203065266" X-IronPort-AV: E=Sophos;i="5.81,189,1610438400"; d="scan'208";a="203065266" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Feb 2021 01:06:31 -0800 IronPort-SDR: R3Ql0YB9RwlIRLqr0kTS1stga1oTtsN+WkMx7Zn2mz8rqg8i5jkvZmCAorIgjjv0ELzuYGpHA+ myiJtnS4Or3w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.81,189,1610438400"; d="scan'208";a="386795359" Received: from fmsmsx604.amr.corp.intel.com ([10.18.126.84]) by fmsmga008.fm.intel.com with ESMTP; 19 Feb 2021 01:06:31 -0800 Received: from shsmsx606.ccr.corp.intel.com (10.109.6.216) by fmsmsx604.amr.corp.intel.com (10.18.126.84) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2106.2; Fri, 19 Feb 2021 01:06:29 -0800 Received: from shsmsx601.ccr.corp.intel.com (10.109.6.141) by SHSMSX606.ccr.corp.intel.com (10.109.6.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2106.2; Fri, 19 Feb 2021 17:06:27 +0800 Received: from shsmsx601.ccr.corp.intel.com ([10.109.6.141]) by SHSMSX601.ccr.corp.intel.com ([10.109.6.141]) with mapi id 15.01.2106.002; Fri, 19 Feb 2021 17:06:27 +0800 From: "Huang, ZhiminX" To: "Zhang, AlvinX" , "Zhang, Qi Z" CC: "dev@dpdk.org" , "Zhang, AlvinX" , "stable@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH] net/ice: fix VLAN filter with PF Thread-Index: AQHXBn04HiyX0RSEd0Gx/TMlJqRyQ6peaOgAgADGvZA= Date: Fri, 19 Feb 2021 09:06:27 +0000 Message-ID: References: <20210219050736.12632-1-alvinx.zhang@intel.com> <20210219051346.12992-1-alvinx.zhang@intel.com> In-Reply-To: <20210219051346.12992-1-alvinx.zhang@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.36] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH] net/ice: fix VLAN filter with PF X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Tested-by: Huang, ZhiminX Regards, HuangZhiMin > -----Original Message----- > From: dev On Behalf Of Alvin Zhang > Sent: Friday, February 19, 2021 1:14 PM > To: Zhang, Qi Z > Cc: dev@dpdk.org; Zhang, AlvinX ; > stable@dpdk.org > Subject: [dpdk-dev] [PATCH] net/ice: fix VLAN filter with PF >=20 > The macro flag DEV_RX_OFFLOAD_VLAN_FILTER is used to enable/disable > Rx VLAN filter, but not Tx VLAN filter. Therefore, Tx VLAN filter should = not > be enabled/disabled in function ice_vsi_config_vlan_filter called after > checking DEV_RX_OFFLOAD_VLAN_FILTER flag. >=20 > In addition, the kernel driver doesn't enable/disable the TX VLAN filter = in > the similar function ice_cfg_vlan_pruning. >=20 > This patch removes the setting about the TX VLAN filter in function > ice_vsi_config_vlan_filter. >=20 > Fixes: e0dcf94a0d7f ("net/ice: support VLAN ops") > Cc: stable@dpdk.org >=20 > Signed-off-by: Alvin Zhang > --- > drivers/net/ice/ice_ethdev.c | 12 ++++-------- > 1 file changed, 4 insertions(+), 8 deletions(-) >=20 > diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c > index dfd99ac..8999d44 100644 > --- a/drivers/net/ice/ice_ethdev.c > +++ b/drivers/net/ice/ice_ethdev.c > @@ -4011,20 +4011,16 @@ static int ice_macaddr_set(struct > rte_eth_dev *dev, { > struct ice_hw *hw =3D ICE_VSI_TO_HW(vsi); > struct ice_vsi_ctx ctxt; > - uint8_t sec_flags, sw_flags2; > + uint8_t sw_flags2; > int ret =3D 0; >=20 > - sec_flags =3D ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA << > - ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S; > sw_flags2 =3D ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA; >=20 > - if (on) { > - vsi->info.sec_flags |=3D sec_flags; > + if (on) > vsi->info.sw_flags2 |=3D sw_flags2; > - } else { > - vsi->info.sec_flags &=3D ~sec_flags; > + else > vsi->info.sw_flags2 &=3D ~sw_flags2; > - } > + > vsi->info.sw_id =3D hw->port_info->sw_id; > (void)rte_memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info)); > ctxt.info.valid_sections =3D > -- > 1.8.3.1