From: Ferruh Yigit <ferruh.yigit@intel.com>
To: Shahaf Shuler <shahafs@mellanox.com>,
nelio.laranjeiro@6wind.com, adrien.mazarguil@6wind.com
Cc: dev@dpdk.org
Subject: Re: [dpdk-dev] [PATCH v2 0/2] mlx5 high latency observed on send operations
Date: Tue, 29 Aug 2017 17:53:03 +0100 [thread overview]
Message-ID: <d73a3265-0364-6cc2-6612-2b98d3f7912a@intel.com> (raw)
In-Reply-To: <cover.1503816096.git.shahafs@mellanox.com>
On 8/27/2017 7:47 AM, Shahaf Shuler wrote:
> from sagi@grimberg.me:
>
> When measuring latency when running a latency critical workload on mlx5 pmd drivers we noticed high latency can occur due to delayed doorbell record update flush.
>
> This can be reproduced using the simple program [1] against testpmd macswap fwd mode. This utility sends a raw ethernet frame to the dpdk port and measures the time between send and the received mirrored frame.
>
> This patchset guarantees immediate doorbell updates visibility by making the doorbell a non-cacheble memory.
> In addition, we relax the memory barrier for dma-able memory.
>
> Without this fix the tsc delta was 3550760-5993019 cycles (which translates to 2-6 ms on 1.7 GHz processor).
>
> With the fix applied the tsc delta reduced to 17740-29663 (wich translates to 9-17 us).
>
> on v2:
> * replace compiler barrier with rte_io_wmb.
>
> Shahaf Shuler (2):
> net/mlx5: replace memory barrier type
> net/mlx5: don't map doorbell register to write combining
Series applied to dpdk-next-net/master, thanks.
prev parent reply other threads:[~2017-08-29 16:53 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-21 7:47 [dpdk-dev] [PATCH " Sagi Grimberg
2017-08-21 7:47 ` [dpdk-dev] [PATCH 1/2] net/mlx5: replace memory barrier type Sagi Grimberg
2017-08-23 11:39 ` Nélio Laranjeiro
2017-08-23 13:11 ` Bruce Richardson
2017-08-24 6:56 ` Shahaf Shuler
2017-08-24 9:27 ` Bruce Richardson
2017-08-21 7:47 ` [dpdk-dev] [PATCH 2/2] net/mlx5: don't map doorbell register to write combining Sagi Grimberg
2017-08-23 11:03 ` Ferruh Yigit
2017-08-23 12:06 ` Nélio Laranjeiro
2017-08-27 6:47 ` [dpdk-dev] [PATCH v2 0/2] mlx5 high latency observed on send operations Shahaf Shuler
2017-08-27 6:47 ` [dpdk-dev] [PATCH v2 1/2] net/mlx5: replace memory barrier type Shahaf Shuler
2017-08-27 6:47 ` [dpdk-dev] [PATCH v2 2/2] net/mlx5: don't map doorbell register to write combining Shahaf Shuler
2017-08-29 16:53 ` Ferruh Yigit [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=d73a3265-0364-6cc2-6612-2b98d3f7912a@intel.com \
--to=ferruh.yigit@intel.com \
--cc=adrien.mazarguil@6wind.com \
--cc=dev@dpdk.org \
--cc=nelio.laranjeiro@6wind.com \
--cc=shahafs@mellanox.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).