From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 28B42A04DB; Thu, 15 Oct 2020 14:04:27 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 7EBB31E53B; Thu, 15 Oct 2020 14:04:24 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 161121DEC8 for ; Thu, 15 Oct 2020 14:04:22 +0200 (CEST) IronPort-SDR: a9vfz0JF3xw9E2H2qGe9zJ0CjruxvdLw5R1e5RkFKFcqX4e7LJGjLT03Z/XuHUULw9lXmPD6EV CjuknC+7VQ2w== X-IronPort-AV: E=McAfee;i="6000,8403,9774"; a="165545795" X-IronPort-AV: E=Sophos;i="5.77,378,1596524400"; d="scan'208";a="165545795" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Oct 2020 05:04:19 -0700 IronPort-SDR: +3VsTcxapUkl6mHPD2fSXA9TxawYPL461Jak+m17c2dfAht7j4omKlmhaLn/0QNQxNmRMeE44D Hk3G3pXM2ecg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,378,1596524400"; d="scan'208";a="314485560" Received: from silpixa00399498.ir.intel.com (HELO silpixa00399498.ger.corp.intel.com) ([10.237.222.52]) by orsmga003.jf.intel.com with ESMTP; 15 Oct 2020 05:04:16 -0700 From: Anatoly Burakov To: dev@dpdk.org Cc: Liang Ma , Bruce Richardson , Konstantin Ananyev , david.hunt@intel.com, jerinjacobk@gmail.com, thomas@monjalon.net, timothy.mcdaniel@intel.com, gage.eads@intel.com, chris.macnamara@intel.com Date: Thu, 15 Oct 2020 13:04:06 +0100 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: Subject: [dpdk-dev] [PATCH v7 01/10] eal: add new x86 cpuid support for WAITPKG X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Liang Ma Add a new CPUID flag indicating processor support for UMONITOR/UMWAIT and TPAUSE instructions instruction. Signed-off-by: Liang Ma Signed-off-by: Anatoly Burakov Acked-by: Konstantin Ananyev --- Notes: v6: - Fix typos - Better commit message lib/librte_eal/x86/include/rte_cpuflags.h | 1 + lib/librte_eal/x86/rte_cpuflags.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/lib/librte_eal/x86/include/rte_cpuflags.h b/lib/librte_eal/x86/include/rte_cpuflags.h index c1d20364d1..848ba9cbfb 100644 --- a/lib/librte_eal/x86/include/rte_cpuflags.h +++ b/lib/librte_eal/x86/include/rte_cpuflags.h @@ -132,6 +132,7 @@ enum rte_cpu_flag_t { RTE_CPUFLAG_MOVDIR64B, /**< Direct Store Instructions 64B */ RTE_CPUFLAG_AVX512VP2INTERSECT, /**< AVX512 Two Register Intersection */ + RTE_CPUFLAG_WAITPKG, /**< UMONITOR/UMWAIT/TPAUSE */ /* The last item */ RTE_CPUFLAG_NUMFLAGS, /**< This should always be the last! */ }; diff --git a/lib/librte_eal/x86/rte_cpuflags.c b/lib/librte_eal/x86/rte_cpuflags.c index 30439e7951..0325c4b93b 100644 --- a/lib/librte_eal/x86/rte_cpuflags.c +++ b/lib/librte_eal/x86/rte_cpuflags.c @@ -110,6 +110,8 @@ const struct feature_entry rte_cpu_feature_table[] = { FEAT_DEF(AVX512F, 0x00000007, 0, RTE_REG_EBX, 16) FEAT_DEF(RDSEED, 0x00000007, 0, RTE_REG_EBX, 18) + FEAT_DEF(WAITPKG, 0x00000007, 0, RTE_REG_ECX, 5) + FEAT_DEF(LAHF_SAHF, 0x80000001, 0, RTE_REG_ECX, 0) FEAT_DEF(LZCNT, 0x80000001, 0, RTE_REG_ECX, 4) -- 2.17.1