From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id E1FA5A0513; Wed, 15 Jan 2020 13:28:19 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 9FD0B1BFEC; Wed, 15 Jan 2020 13:28:18 +0100 (CET) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by dpdk.org (Postfix) with ESMTP id 1E8AC1BF9D for ; Wed, 15 Jan 2020 13:28:16 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 15 Jan 2020 04:28:15 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,322,1574150400"; d="scan'208";a="219265923" Received: from fyigit-mobl.ger.corp.intel.com (HELO [10.237.221.35]) ([10.237.221.35]) by fmsmga007.fm.intel.com with ESMTP; 15 Jan 2020 04:28:12 -0800 To: Andrew Rybchenko , Bernard Iremonger , dev@dpdk.org, beilei.xing@intel.com, qi.z.zhang@intel.com, declan.doherty@intel.com Cc: konstantin.ananyev@intel.com, stephen1.byrne@intel.com, helin.zhang@intel.com, Ori Kam , Thomas Monjalon , Bruce Richardson , "Kinsella, Ray" , David Marchand , Luca Boccassi , Jerin Jacob , Olivier MATZ References: <1578669630-23866-1-git-send-email-bernard.iremonger@intel.com> <1579010128-15794-13-git-send-email-bernard.iremonger@intel.com> <43ef6a41-6114-8a0c-bc64-3933d4dc9f7d@solarflare.com> <651f4fc5-ccee-a0fd-096e-d67c25248352@intel.com> <6b5811ba-2c98-6335-a723-87f64b137b0c@solarflare.com> From: Ferruh Yigit Autocrypt: addr=ferruh.yigit@intel.com; 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charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Subject: Re: [dpdk-dev] [PATCH v5 12/14] librte_ethdev: add ESP and AH flow types to RSS X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 1/15/2020 10:55 AM, Andrew Rybchenko wrote: > On 1/15/20 1:44 PM, Ferruh Yigit wrote: >> On 1/15/2020 9:13 AM, Andrew Rybchenko wrote: >>> On 1/14/20 9:45 PM, Ferruh Yigit wrote: >>>> On 1/14/2020 1:55 PM, Bernard Iremonger wrote: >>>>> Add macros for the following protocols in the DDP esp-ah profile: >>>>> ESP >>>>> AH >>>>> >>>>> Add the following RSS macro for IPsec: >>>>> ETH_RSS_IPSEC >>>>> >>>>> Signed-off-by: Bernard Iremonger >>>> +Ori and other ethdev maintainers. >>>> >>>> Ori, can you please check this patch? >>>> >>>>> --- >>>>> lib/librte_ethdev/rte_ethdev.h | 14 +++++++++++++- >>>>> 1 file changed, 13 insertions(+), 1 deletion(-) >>>>> >>>>> diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h >>>>> index 18a9def..208ec90 100644 >>>>> --- a/lib/librte_ethdev/rte_ethdev.h >>>>> +++ b/lib/librte_ethdev/rte_ethdev.h >>>>> @@ -484,7 +484,9 @@ struct rte_eth_rss_conf { >>>>> #define RTE_ETH_FLOW_NVGRE 21 /**< NVGRE protocol based flow */ >>>>> #define RTE_ETH_FLOW_VXLAN_GPE 22 /**< VXLAN-GPE protocol based flow */ >>>>> #define RTE_ETH_FLOW_GTPU 23 /**< GTPU protocol based flow */ >>>>> -#define RTE_ETH_FLOW_MAX 24 >>>>> +#define RTE_ETH_FLOW_AH 24 /**< AH protocol based flow */ >>>>> +#define RTE_ETH_FLOW_ESP 25 /**< ESP protocol based flow */ >>>>> +#define RTE_ETH_FLOW_MAX 26 >>> Isn't changing RTE_ETH_FLOW_MAX value breaking ABI? >>> Is v20.11 target release of the patch? >> I can't see how this can cause an ABI break, unless the 'RTE_ETH_FLOW_MAX' value >> used as size of an array in the middle of a struct. >> There is 'struct rte_eth_fdir_flex_conf' but the array is at the end there, so >> it should be OK, unless that struct is not in the middle of another struct. > > rte_eth_fdir_flex_conf -> rte_fdir_conf -> rte_eth_conf (in the middle) Yes, this looks like an ABI break and this is very annoying not able to even add a new RTE_FLOW type. We need to find a proper way to handle this, at first glance I can see stop using _MAX macros for the array size can work and perhaps we can use another big enough hardcoded value for all similar array size. Any other option? But we can do this on 20.11, we need a solution until that time. > >> And there are values calculated from 'RTE_ETH_FLOW_MAX', like >> 'RTE_FLOW_MASK_ARRAY_SIZE', same concern applies there, it very hard to follow. >> >> Bernard, >> >> Can you please run the ABI version script to be sure this is not breaking the ABI? >> >> >>>>> >>>>> /* >>>>> * Below macros are defined for RSS offload types, they can be used to >>>>> @@ -511,6 +513,12 @@ struct rte_eth_rss_conf { >>>>> #define ETH_RSS_GENEVE (1ULL << 20) >>>>> #define ETH_RSS_NVGRE (1ULL << 21) >>>>> #define ETH_RSS_GTPU (1ULL << 23) >>>>> +#define ETH_RSS_AH (1ULL << 24) >>>>> +#define ETH_RSS_ESP (1ULL << 25) >>>>> + >>>>> + >>>>> + >>>>> + >>>>> >>>>> /* >>>>> * We use the following macros to combine with above ETH_RSS_* for >>>>> @@ -571,6 +579,10 @@ rte_eth_rss_hf_refine(uint64_t rss_hf) >>>>> ETH_RSS_NONFRAG_IPV4_SCTP | \ >>>>> ETH_RSS_NONFRAG_IPV6_SCTP) >>>>> >>>>> +#define ETH_RSS_IPSEC ( \ >>>>> + ETH_RSS_AH | \ >>>>> + ETH_RSS_ESP) >>>>> + >>>>> #define ETH_RSS_TUNNEL ( \ >>>>> ETH_RSS_VXLAN | \ >>>>> ETH_RSS_GENEVE | \ >>>>> >