From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6ED20A034F; Tue, 23 Feb 2021 15:20:27 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DAF5A4068C; Tue, 23 Feb 2021 15:20:26 +0100 (CET) Received: from out0-149.mail.aliyun.com (out0-149.mail.aliyun.com [140.205.0.149]) by mails.dpdk.org (Postfix) with ESMTP id A27F940041 for ; Tue, 23 Feb 2021 15:20:23 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alibaba-inc.com; s=default; t=1614090022; h=Subject:To:From:Message-ID:Date:MIME-Version:Content-Type; bh=+8nv/b9+0OWA0aWJ+C7P1DmdzunSuBPxgv2t3I7unzE=; b=iOkLlZCbrRyiEIXnBiHCsufFcaTYCwK47jD/z/Zsk9Gn2rU3Ktdq8SJ2RdQF6wyDLcj1xBkH5sER6LvRo5i2xW1eAALBBHtqVyDjyOIfBTuZeVUcoeDBNr/p5JkG5VEokB6vR4KSgyE+T6VTmRvSOwJk0+T6nqKyci/AcyDuXIc= X-Alimail-AntiSpam: AC=PASS; BC=-1|-1; BR=01201311R531e4; CH=green; DM=||false|; DS=||; FP=0|-1|-1|-1|0|-1|-1|-1; HT=ay29a033018047212; MF=huawei.xhw@alibaba-inc.com; NM=1; PH=DS; RN=8; SR=0; TI=SMTPD_---.JcCNHUk_1614090019; Received: from 30.0.182.169(mailfrom:huawei.xhw@alibaba-inc.com fp:SMTPD_---.JcCNHUk_1614090019) by smtp.aliyun-inc.com(127.0.0.1); Tue, 23 Feb 2021 22:20:20 +0800 To: Ferruh Yigit , maxime.coquelin@redhat.com, david.marchand@redhat.com Cc: dev@dpdk.org, anatoly.burakov@intel.com, xuemingl@nvidia.com, grive@u256.net, chenbo.xia@intel.com References: <1611890309-99135-1-git-send-email-huawei.xhw@alibaba-inc.com> <1614014118-91150-1-git-send-email-huawei.xhw@alibaba-inc.com> <1614014118-91150-3-git-send-email-huawei.xhw@alibaba-inc.com> From: "=?UTF-8?B?6LCi5Y2O5LyfKOatpOaXtuatpOWIu++8iQ==?=" Message-ID: Date: Tue, 23 Feb 2021 22:20:19 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US Subject: Re: [dpdk-dev] [PATCH v7 2/2] bus/pci: support MMIO in PCI ioport accessors X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 2021/2/23 1:25, Ferruh Yigit wrote: > On 2/22/2021 5:15 PM, 谢华伟(此时此刻） wrote: >> From: "huawei.xhw" >> >> With IO BAR, we get PIO(programmed IO) address. >> With MMIO BAR, we get mapped virtual address. >> We distinguish PIO(Programmed IO) and MMIO(memory mapped IO) by their >> address like how kernel does. >> ioread/write8/16/32 is provided to access PIO/MMIO. >> By the way, for virtio on arch other than x86, BAR flag indicates PIO >> but is mapped. >> >> Signed-off-by: huawei xie >> Reviewed-by: Maxime Coquelin > > <...> > >> + >> +static inline void iowrite8(uint8_t val, void *addr) >> +{ >> +    (uint64_t)(uintptr_t)addr >= PIO_MAX ? >> +        *(volatile uint8_t *)addr = val : >> +        outb(val, (unsigned long)addr); > > //copying question from previous version: > > Is the 'outb_p' to 'outb' conversion intentional? And if so why? > > Same of the all 'outb_p', 'outw_p', 'outl_p'. There is no need to delay for virtio device, as we can see in virtio legacy driver. IMO, the delay is for ugly old device. The device itself should assure the previous IO completes when the subsequent IO instruction arrives.