[PATCH v1 00/30] Update net/i40e base driver

[PATCH v1 00/30] Update net/i40e base driver

[Anatoly Burakov]

Update the i40e base driver to the latest version of the snapshot.

Aleksandr Loktionov (3):
  net/i40e/base: remove non-inclusive language
  net/i40e/base: fix misleading debug logs and comments
  net/i40e/base: make semaphore timeout 32-bit

Anatoly Burakov (6):
  net/i40e/base: adjust whitespace
  net/i40e/base: strip all tags from code
  net/i40e/base: don't set flags in i40e_init_shared_code
  net/i40e/base: add missing define to X710TL device check
  net/i40e/base: fix setting MAC type for X722
  net/i40e: update base driver README

Artur Tyminski (2):
  net/i40e/base: do not load DDP packages with reserved track ID
  net/i40e/base: add DDP package type defines

Barbara Skobiej (2):
  net/i40e/base: fix unchecked return value
  net/i40e/base: check loop bounds

Bartosz Jakub Rosadzinski (1):
  net/i40e/base: add Shadow RAM pointer definition

Björn Töpel (1):
  net/i40e/base: add named and raw structs to rx desc

Dawid Lukwinski (1):
  net/i40e/base: allow reading LED blink setting

Eryk Rybak (1):
  net/i40e/base: fix not blinking X722 with x557 PHY

Jaroslaw Ilgiewicz (1):
  net/i40e/base: change time variables from 64 bit to 32 bit

Jedrzej Jagielski (1):
  net/i40e/base: add trace buffer reading dependencies

Krzysztof Galazka (1):
  net/i40e/base: remove unused variables

Lukasz Cieplicki (1):
  net/i40e/base: add definitions for rx_err1

Michal Nowak (1):
  net/i40e/base: align registers to the specification

Midde Ajijur Rehaman (1):
  net/i40e/base: add NVM acquire with custom timeout

Piotr Skajewski (1):
  net/i40e/base: add register definitions for FLU

Przemyslaw Gierszynski (1):
  net/i40e/base: add new device ID to 25G device list

Przemyslaw Patynowski (1):
  net/i40e/base: add VLAN field for input set

Radoslaw Tyl (2):
  net/i40e/base: add PHY debug register dump
  net/i40e/base: make register dump read-only

Slawomir Laba (1):
  net/i40e/base: add X722 defines for input set mask

Vignesh Sridhar (1):
  net/i40e/base: improve typecasting

 drivers/net/i40e/base/README            |   6 +-
 drivers/net/i40e/base/i40e_adminq.c     |  91 ++-------
 drivers/net/i40e/base/i40e_adminq_cmd.h |   1 -
 drivers/net/i40e/base/i40e_common.c     | 250 +++++-------------------
 drivers/net/i40e/base/i40e_dcb.c        |   3 +-
 drivers/net/i40e/base/i40e_dcb.h        |   1 -
 drivers/net/i40e/base/i40e_devids.h     |  30 +--
 drivers/net/i40e/base/i40e_diag.c       |  12 +-
 drivers/net/i40e/base/i40e_nvm.c        | 121 ++++++++++--
 drivers/net/i40e/base/i40e_prototype.h  |  34 ++--
 drivers/net/i40e/base/i40e_register.h   |  78 +++-----
 drivers/net/i40e/base/i40e_status.h     |   2 +-
 drivers/net/i40e/base/i40e_type.h       |  33 ++--
 drivers/net/i40e/i40e_ethdev.c          |  22 +--
 drivers/net/i40e/i40e_ethdev.h          |   9 -
 drivers/net/i40e/i40e_regs.h            |  20 +-
 drivers/net/i40e/meson.build            |   5 -
 17 files changed, 275 insertions(+), 443 deletions(-)

-- 
2.43.5

[PATCH v1 01/30] net/i40e/base: adjust whitespace

[Anatoly Burakov]

There are some miscellaneous differences in whitespace between shared code
and DPDK snapshot. Adjust whitespace differences to make base code driver
updates easier in the future by reducing the diff between the two.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_adminq.c     |  7 ++-----
 drivers/net/i40e/base/i40e_adminq_cmd.h |  1 -
 drivers/net/i40e/base/i40e_common.c     | 24 ++++++++----------------
 drivers/net/i40e/base/i40e_dcb.c        |  1 -
 drivers/net/i40e/base/i40e_dcb.h        |  1 -
 drivers/net/i40e/base/i40e_devids.h     | 10 +++++-----
 drivers/net/i40e/base/i40e_prototype.h  | 18 +++++++++---------
 drivers/net/i40e/base/i40e_register.h   |  3 +--
 drivers/net/i40e/base/i40e_type.h       |  2 --
 9 files changed, 25 insertions(+), 42 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_adminq.c b/drivers/net/i40e/base/i40e_adminq.c
index 27c82d9b44..e7dff8ab48 100644
--- a/drivers/net/i40e/base/i40e_adminq.c
+++ b/drivers/net/i40e/base/i40e_adminq.c
@@ -688,7 +688,6 @@ enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw)
 	/* VF has no need of firmware */
 	if (i40e_is_vf(hw))
 		goto init_adminq_exit;
-
 	/* There are some cases where the firmware may not be quite ready
 	 * for AdminQ operations, so we retry the AdminQ setup a few times
 	 * if we see timeouts in this first AQ call.
@@ -723,10 +722,8 @@ enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw)
 	i40e_read_nvm_word(hw, I40E_SR_NVM_EETRACK_HI, &eetrack_hi);
 	hw->nvm.eetrack = (eetrack_hi << 16) | eetrack_lo;
 	i40e_read_nvm_word(hw, I40E_SR_BOOT_CONFIG_PTR, &cfg_ptr);
-	i40e_read_nvm_word(hw, (cfg_ptr + I40E_NVM_OEM_VER_OFF),
-			   &oem_hi);
-	i40e_read_nvm_word(hw, (cfg_ptr + (I40E_NVM_OEM_VER_OFF + 1)),
-			   &oem_lo);
+	i40e_read_nvm_word(hw, (cfg_ptr + I40E_NVM_OEM_VER_OFF), &oem_hi);
+	i40e_read_nvm_word(hw, (cfg_ptr + (I40E_NVM_OEM_VER_OFF + 1)), &oem_lo);
 	hw->nvm.oem_ver = ((u32)oem_hi << 16) | oem_lo;
 
 	if (aq->api_maj_ver > I40E_FW_API_VERSION_MAJOR) {
diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h b/drivers/net/i40e/base/i40e_adminq_cmd.h
index def307b59d..eda19ccf32 100644
--- a/drivers/net/i40e/base/i40e_adminq_cmd.h
+++ b/drivers/net/i40e/base/i40e_adminq_cmd.h
@@ -2660,7 +2660,6 @@ struct i40e_aqc_lldp_stop {
 I40E_CHECK_CMD_LENGTH(i40e_aqc_lldp_stop);
 
 /* Start LLDP (direct 0x0A06) */
-
 struct i40e_aqc_lldp_start {
 	u8	command;
 #define I40E_AQ_LLDP_AGENT_START		0x1
diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index ab655a0a72..2740ee68d9 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -950,7 +950,6 @@ struct i40e_rx_ptype_decoded i40e_ptype_lookup[] = {
 	I40E_PTT_UNUSED_ENTRY(255)
 };
 
-
 /**
  * i40e_validate_mac_addr - Validate unicast MAC address
  * @mac_addr: pointer to MAC address
@@ -1427,7 +1426,6 @@ enum i40e_status_code i40e_pf_reset(struct i40e_hw *hw)
 
 	i40e_clear_pxe_mode(hw);
 
-
 	return I40E_SUCCESS;
 }
 
@@ -2022,7 +2020,6 @@ enum i40e_status_code i40e_aq_get_link_info(struct i40e_hw *hw,
 	enum i40e_status_code status;
 	bool tx_pause, rx_pause;
 	u16 command_flags;
-
 	i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_link_status);
 
 	if (enable_lse)
@@ -2324,7 +2321,7 @@ enum i40e_status_code i40e_aq_add_vsi(struct i40e_hw *hw,
 	desc.flags |= CPU_TO_LE16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
 
 	status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
-				    sizeof(vsi_ctx->info), cmd_details);
+				       sizeof(vsi_ctx->info), cmd_details);
 
 	if (status != I40E_SUCCESS)
 		goto aq_add_vsi_exit;
@@ -2746,7 +2743,7 @@ enum i40e_status_code i40e_aq_update_vsi_params(struct i40e_hw *hw,
 	desc.flags |= CPU_TO_LE16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
 
 	status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
-				    sizeof(vsi_ctx->info), cmd_details);
+				       sizeof(vsi_ctx->info), cmd_details);
 
 	vsi_ctx->vsis_allocated = LE16_TO_CPU(resp->vsi_used);
 	vsi_ctx->vsis_unallocated = LE16_TO_CPU(resp->vsi_free);
@@ -2956,7 +2953,7 @@ enum i40e_status_code i40e_update_link_info(struct i40e_hw *hw)
 	if (((hw->phy.link_info.link_info & I40E_AQ_MEDIA_AVAILABLE) &&
 	     ((hw->phy.link_info.link_info & I40E_AQ_LINK_UP) ||
 	      !(hw->phy.link_info_old.link_info & I40E_AQ_LINK_UP))) ||
-		hw->mac.type == I40E_MAC_X722) {
+	    hw->mac.type == I40E_MAC_X722) {
 		status = i40e_aq_get_phy_capabilities(hw, false,
 						      hw->mac.type ==
 						      I40E_MAC_X722,
@@ -2981,7 +2978,6 @@ enum i40e_status_code i40e_update_link_info(struct i40e_hw *hw)
 	return status;
 }
 
-
 /**
  * i40e_get_link_speed
  * @hw: pointer to the hw struct
@@ -3831,10 +3827,9 @@ enum i40e_status_code i40e_aq_write_nvm_config(struct i40e_hw *hw,
  *
  * Indicate NVM update in process.
  **/
-enum i40e_status_code
-i40e_aq_nvm_update_in_process(struct i40e_hw *hw,
-			      bool update_flow_state,
-			      struct i40e_asq_cmd_details *cmd_details)
+enum i40e_status_code i40e_aq_nvm_update_in_process(struct i40e_hw *hw,
+				bool update_flow_state,
+				struct i40e_asq_cmd_details *cmd_details)
 {
 	struct i40e_aq_desc desc;
 	struct i40e_aqc_nvm_update_in_process *cmd =
@@ -4892,7 +4887,6 @@ enum i40e_status_code i40e_aq_delete_element(struct i40e_hw *hw, u16 seid,
 	i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_delete_element);
 
 	cmd->seid = CPU_TO_LE16(seid);
-
 	status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
 
 	return status;
@@ -6167,7 +6161,6 @@ i40e_status_code i40e_aq_replace_cloud_filters(struct i40e_hw *hw,
 	return status;
 }
 
-
 /**
  * i40e_aq_alternate_write
  * @hw: pointer to the hardware structure
@@ -6525,7 +6518,6 @@ enum i40e_status_code i40e_aq_debug_dump(struct i40e_hw *hw, u8 cluster_id,
 	return status;
 }
 
-
 /**
  * i40e_enable_eee
  * @hw: pointer to the hardware structure
@@ -7280,9 +7272,9 @@ enum i40e_status_code i40e_get_lpi_counters(struct i40e_hw *hw,
 	 */
 	if ((hw->device_id == I40E_DEV_ID_10G_BASE_T_BC ||
 	     hw->device_id == I40E_DEV_ID_5G_BASE_T_BC) &&
-	    hw->phy.link_info.link_speed != I40E_LINK_SPEED_1GB) {
+	     hw->phy.link_info.link_speed != I40E_LINK_SPEED_1GB) {
 		enum i40e_status_code retval;
-		u32 cmd_status = 0;
+		u32 cmd_status;
 
 		*is_clear = false;
 		retval = i40e_aq_run_phy_activity(hw,
diff --git a/drivers/net/i40e/base/i40e_dcb.c b/drivers/net/i40e/base/i40e_dcb.c
index 8f9b7e823f..de0320bf3f 100644
--- a/drivers/net/i40e/base/i40e_dcb.c
+++ b/drivers/net/i40e/base/i40e_dcb.c
@@ -1308,7 +1308,6 @@ enum i40e_status_code i40e_dcb_config_to_lldp(u8 *lldpmib, u16 *miblen,
 	return ret;
 }
 
-
 /**
  * _i40e_read_lldp_cfg - generic read of LLDP Configuration data from NVM
  * @hw: pointer to the HW structure
diff --git a/drivers/net/i40e/base/i40e_dcb.h b/drivers/net/i40e/base/i40e_dcb.h
index 0409fd3e1a..08a5f1b996 100644
--- a/drivers/net/i40e/base/i40e_dcb.h
+++ b/drivers/net/i40e/base/i40e_dcb.h
@@ -183,7 +183,6 @@ struct i40e_dcbx_variables {
 	u32 deftsaassignment;
 };
 
-
 enum i40e_get_fw_lldp_status_resp {
 	I40E_GET_FW_LLDP_STATUS_DISABLED = 0,
 	I40E_GET_FW_LLDP_STATUS_ENABLED = 1
diff --git a/drivers/net/i40e/base/i40e_devids.h b/drivers/net/i40e/base/i40e_devids.h
index ee31e51f57..f0f206b636 100644
--- a/drivers/net/i40e/base/i40e_devids.h
+++ b/drivers/net/i40e/base/i40e_devids.h
@@ -9,6 +9,8 @@
 #define I40E_INTEL_VENDOR_ID		0x8086
 
 /* Device IDs */
+#define I40E_DEV_ID_X710_N3000		0x0CF8
+#define I40E_DEV_ID_XXV710_N3000	0x0D58
 #define I40E_DEV_ID_SFP_XL710		0x1572
 #define I40E_DEV_ID_QEMU		0x1574
 #define I40E_DEV_ID_KX_B		0x1580
@@ -22,11 +24,7 @@
 #define I40E_DEV_ID_10G_BASE_T4		0x1589
 #define I40E_DEV_ID_25G_B		0x158A
 #define I40E_DEV_ID_25G_SFP28		0x158B
-#define I40E_DEV_ID_X710_N3000      0x0CF8
-#define I40E_DEV_ID_XXV710_N3000	0x0D58
 #define I40E_DEV_ID_10G_BASE_T_BC	0x15FF
-#define I40E_DEV_ID_5G_BASE_T_BC	0x101F
-#define I40E_DEV_ID_1G_BASE_T_BC        0x0DD2
 #if defined(INTEGRATED_VF) || defined(VF_DRIVER) || defined(I40E_NDIS_SUPPORT)
 #define I40E_DEV_ID_VF			0x154C
 #define I40E_DEV_ID_VF_HV		0x1571
@@ -40,6 +38,8 @@
 #endif
 #define I40E_DEV_ID_10G_B		0x104F
 #define I40E_DEV_ID_10G_SFP		0x104E
+#define I40E_DEV_ID_5G_BASE_T_BC	0x101F
+#define I40E_DEV_ID_1G_BASE_T_BC	0x0DD2
 #define I40E_IS_X710TL_DEVICE(d) \
 	(((d) == I40E_DEV_ID_10G_BASE_T_BC) || \
 	((d) == I40E_DEV_ID_5G_BASE_T_BC))
@@ -49,10 +49,10 @@
 #define I40E_DEV_ID_1G_BASE_T_X722	0x37D1
 #define I40E_DEV_ID_10G_BASE_T_X722	0x37D2
 #define I40E_DEV_ID_SFP_I_X722		0x37D3
-#define I40E_DEV_ID_SFP_X722_A          0x0DDA
 #if defined(INTEGRATED_VF) || defined(VF_DRIVER) || defined(I40E_NDIS_SUPPORT)
 #define I40E_DEV_ID_X722_VF		0x37CD
 #endif /* VF_DRIVER */
+#define I40E_DEV_ID_SFP_X722_A		0x0DDA
 
 #define i40e_is_40G_device(d)		((d) == I40E_DEV_ID_QSFP_A  || \
 					 (d) == I40E_DEV_ID_QSFP_B  || \
diff --git a/drivers/net/i40e/base/i40e_prototype.h b/drivers/net/i40e/base/i40e_prototype.h
index 691c977172..1c0d79229e 100644
--- a/drivers/net/i40e/base/i40e_prototype.h
+++ b/drivers/net/i40e/base/i40e_prototype.h
@@ -33,11 +33,12 @@ void i40e_adminq_init_ring_data(struct i40e_hw *hw);
 enum i40e_status_code i40e_clean_arq_element(struct i40e_hw *hw,
 					     struct i40e_arq_event_info *e,
 					     u16 *events_pending);
-enum i40e_status_code i40e_asq_send_command(struct i40e_hw *hw,
-				struct i40e_aq_desc *desc,
-				void *buff, /* can be NULL */
-				u16  buff_size,
-				struct i40e_asq_cmd_details *cmd_details);
+enum i40e_status_code
+i40e_asq_send_command(struct i40e_hw *hw,
+		      struct i40e_aq_desc *desc,
+		      void *buff, /* can be NULL */
+		      u16  buff_size,
+		      struct i40e_asq_cmd_details *cmd_details);
 enum i40e_status_code
 i40e_asq_send_command_v2(struct i40e_hw *hw,
 			 struct i40e_aq_desc *desc,
@@ -275,10 +276,9 @@ enum i40e_status_code i40e_aq_update_nvm(struct i40e_hw *hw, u8 module_pointer,
 enum i40e_status_code i40e_aq_rearrange_nvm(struct i40e_hw *hw,
 				u8 rearrange_nvm,
 				struct i40e_asq_cmd_details *cmd_details);
-enum i40e_status_code
-i40e_aq_nvm_update_in_process(struct i40e_hw *hw,
-			      bool update_flow_state,
-			      struct i40e_asq_cmd_details *cmd_details);
+enum i40e_status_code i40e_aq_nvm_update_in_process(struct i40e_hw *hw,
+				bool update_flow_state,
+				struct i40e_asq_cmd_details *cmd_details);
 enum i40e_status_code i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type,
 				u8 mib_type, void *buff, u16 buff_size,
 				u16 *local_len, u16 *remote_len,
diff --git a/drivers/net/i40e/base/i40e_register.h b/drivers/net/i40e/base/i40e_register.h
index 75eff845f1..8476b13d92 100644
--- a/drivers/net/i40e/base/i40e_register.h
+++ b/drivers/net/i40e/base/i40e_register.h
@@ -2916,8 +2916,7 @@
 #define I40E_PRTTSYN_AUX_0_EVNTLVL_SHIFT 16
 #define I40E_PRTTSYN_AUX_0_EVNTLVL_MASK  I40E_MASK(0x3, I40E_PRTTSYN_AUX_0_EVNTLVL_SHIFT)
 #define I40E_PRTTSYN_AUX_0_PTPFLAG_SHIFT 17
-#define I40E_PRTTSYN_AUX_0_PTPFLAG_MASK \
-		I40E_MASK(0x1, I40E_PRTTSYN_AUX_0_PTPFLAG_SHIFT)
+#define I40E_PRTTSYN_AUX_0_PTPFLAG_MASK  I40E_MASK(0x1, I40E_PRTTSYN_AUX_0_PTPFLAG_SHIFT)
 #define I40E_PRTTSYN_AUX_0_PTP_OUT_SYNC_CLK_IO 0xF
 #define I40E_PRTTSYN_AUX_1(_i)               (0x001E42E0 + ((_i) * 32)) /* _i=0...1 */ /* Reset: GLOBR */
 #define I40E_PRTTSYN_AUX_1_MAX_INDEX         1
diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index f4a3d66759..895429f9bb 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -50,7 +50,6 @@
 
 /* Max timeout in ms for the phy to respond */
 #define I40E_MAX_PHY_TIMEOUT		500
-
 /* Check whether address is multicast. */
 #define I40E_IS_MULTICAST(address) (bool)(((u8 *)(address))[0] & ((u8)0x01))
 
@@ -676,7 +675,6 @@ struct i40e_dcbx_config {
 struct i40e_hw {
 	u8 *hw_addr;
 	void *back;
-
 	/* subsystem structs */
 	struct i40e_phy_info phy;
 	struct i40e_mac_info mac;
-- 
2.43.5

[PATCH v1 02/30] net/i40e/base: strip all tags from code

[Anatoly Burakov]

When generating base code updates, the codebase gets stripped from all of
the define tags that are not needed for that driver version. However, some
tags were left in the code for various reasons, and then force-defined in
the meson build file to make sure the code still compiles. Get rid of all
of it and remove the tags from code.

In particular, one of the stripped tags is VF support. This is no longer
needed because all VF support is now done through IAVF driver. This
results in some VF-related code being removed from i40e.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_adminq.c    |  65 ------------
 drivers/net/i40e/base/i40e_common.c    | 139 +------------------------
 drivers/net/i40e/base/i40e_devids.h    |  14 ---
 drivers/net/i40e/base/i40e_prototype.h |   8 --
 drivers/net/i40e/base/i40e_register.h  |   7 --
 drivers/net/i40e/base/i40e_type.h      |  10 --
 drivers/net/i40e/i40e_ethdev.c         |   1 -
 drivers/net/i40e/meson.build           |   5 -
 8 files changed, 1 insertion(+), 248 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_adminq.c b/drivers/net/i40e/base/i40e_adminq.c
index e7dff8ab48..b670250180 100644
--- a/drivers/net/i40e/base/i40e_adminq.c
+++ b/drivers/net/i40e/base/i40e_adminq.c
@@ -28,7 +28,6 @@ STATIC void i40e_adminq_init_regs(struct i40e_hw *hw)
 		hw->aq.arq.len  = I40E_VF_ARQLEN1;
 		hw->aq.arq.bal  = I40E_VF_ARQBAL1;
 		hw->aq.arq.bah  = I40E_VF_ARQBAH1;
-#ifdef PF_DRIVER
 	} else {
 		hw->aq.asq.tail = I40E_PF_ATQT;
 		hw->aq.asq.head = I40E_PF_ATQH;
@@ -40,7 +39,6 @@ STATIC void i40e_adminq_init_regs(struct i40e_hw *hw)
 		hw->aq.arq.len  = I40E_PF_ARQLEN;
 		hw->aq.arq.bal  = I40E_PF_ARQBAL;
 		hw->aq.arq.bah  = I40E_PF_ARQBAH;
-#endif
 	}
 }
 
@@ -278,26 +276,8 @@ STATIC enum i40e_status_code i40e_config_asq_regs(struct i40e_hw *hw)
 	wr32(hw, hw->aq.asq.tail, 0);
 
 	/* set starting point */
-#ifdef PF_DRIVER
-#ifdef INTEGRATED_VF
-	if (!i40e_is_vf(hw))
-		wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
-					  I40E_PF_ATQLEN_ATQENABLE_MASK));
-#else
 	wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
 				  I40E_PF_ATQLEN_ATQENABLE_MASK));
-#endif /* INTEGRATED_VF */
-#endif /* PF_DRIVER */
-#ifdef VF_DRIVER
-#ifdef INTEGRATED_VF
-	if (i40e_is_vf(hw))
-		wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
-					  I40E_VF_ATQLEN1_ATQENABLE_MASK));
-#else
-	wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
-				  I40E_VF_ATQLEN1_ATQENABLE_MASK));
-#endif /* INTEGRATED_VF */
-#endif /* VF_DRIVER */
 	wr32(hw, hw->aq.asq.bal, I40E_LO_DWORD(hw->aq.asq.desc_buf.pa));
 	wr32(hw, hw->aq.asq.bah, I40E_HI_DWORD(hw->aq.asq.desc_buf.pa));
 
@@ -325,26 +305,8 @@ STATIC enum i40e_status_code i40e_config_arq_regs(struct i40e_hw *hw)
 	wr32(hw, hw->aq.arq.tail, 0);
 
 	/* set starting point */
-#ifdef PF_DRIVER
-#ifdef INTEGRATED_VF
-	if (!i40e_is_vf(hw))
-		wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
-					  I40E_PF_ARQLEN_ARQENABLE_MASK));
-#else
 	wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
 				  I40E_PF_ARQLEN_ARQENABLE_MASK));
-#endif /* INTEGRATED_VF */
-#endif /* PF_DRIVER */
-#ifdef VF_DRIVER
-#ifdef INTEGRATED_VF
-	if (i40e_is_vf(hw))
-		wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
-					  I40E_VF_ARQLEN1_ARQENABLE_MASK));
-#else
-	wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
-				  I40E_VF_ARQLEN1_ARQENABLE_MASK));
-#endif /* INTEGRATED_VF */
-#endif /* VF_DRIVER */
 	wr32(hw, hw->aq.arq.bal, I40E_LO_DWORD(hw->aq.arq.desc_buf.pa));
 	wr32(hw, hw->aq.arq.bah, I40E_HI_DWORD(hw->aq.arq.desc_buf.pa));
 
@@ -552,7 +514,6 @@ enum i40e_status_code i40e_shutdown_arq(struct i40e_hw *hw)
 	i40e_release_spinlock(&hw->aq.arq_spinlock);
 	return ret_code;
 }
-#ifdef PF_DRIVER
 
 /**
  *  i40e_resume_aq - resume AQ processing from 0
@@ -571,7 +532,6 @@ STATIC void i40e_resume_aq(struct i40e_hw *hw)
 
 	i40e_config_arq_regs(hw);
 }
-#endif /* PF_DRIVER */
 
 /**
  *  i40e_set_hw_flags - set HW flags
@@ -685,9 +645,6 @@ enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw)
 	if (ret_code != I40E_SUCCESS)
 		goto init_adminq_free_asq;
 
-	/* VF has no need of firmware */
-	if (i40e_is_vf(hw))
-		goto init_adminq_exit;
 	/* There are some cases where the firmware may not be quite ready
 	 * for AdminQ operations, so we retry the AdminQ setup a few times
 	 * if we see timeouts in this first AQ call.
@@ -823,11 +780,7 @@ u16 i40e_clean_asq(struct i40e_hw *hw)
  *  Returns true if the firmware has processed all descriptors on the
  *  admin send queue. Returns false if there are still requests pending.
  **/
-#ifdef VF_DRIVER
-bool i40e_asq_done(struct i40e_hw *hw)
-#else
 STATIC bool i40e_asq_done(struct i40e_hw *hw)
-#endif
 {
 	/* AQ designers suggest use of head for better
 	 * timing reliability than DD bit
@@ -1028,11 +981,7 @@ i40e_asq_send_command_exec(struct i40e_hw *hw,
 	/* update the error if time out occurred */
 	if ((!cmd_completed) &&
 	    (!details->async && !details->postpone)) {
-#ifdef PF_DRIVER
 		if (rd32(hw, hw->aq.asq.len) & I40E_GL_ATQLEN_ATQCRIT_MASK) {
-#else
-		if (rd32(hw, hw->aq.asq.len) & I40E_VF_ATQLEN1_ATQCRIT_MASK) {
-#endif
 			i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,
 				   "AQTX: AQ Critical error.\n");
 			status = I40E_ERR_ADMIN_QUEUE_CRITICAL_ERROR;
@@ -1160,19 +1109,7 @@ enum i40e_status_code i40e_clean_arq_element(struct i40e_hw *hw,
 	}
 
 	/* set next_to_use to head */
-#ifdef INTEGRATED_VF
-	if (!i40e_is_vf(hw))
-		ntu = rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK;
-	else
-		ntu = rd32(hw, hw->aq.arq.head) & I40E_VF_ARQH1_ARQH_MASK;
-#else
-#ifdef PF_DRIVER
 	ntu = rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK;
-#endif /* PF_DRIVER */
-#ifdef VF_DRIVER
-	ntu = rd32(hw, hw->aq.arq.head) & I40E_VF_ARQH1_ARQH_MASK;
-#endif /* VF_DRIVER */
-#endif /* INTEGRATED_VF */
 	if (ntu == ntc) {
 		/* nothing to do - shouldn't need to update ring's values */
 		ret_code = I40E_ERR_ADMIN_QUEUE_NO_WORK;
@@ -1230,9 +1167,7 @@ enum i40e_status_code i40e_clean_arq_element(struct i40e_hw *hw,
 	hw->aq.arq.next_to_clean = ntc;
 	hw->aq.arq.next_to_use = ntu;
 
-#ifdef PF_DRIVER
 	i40e_nvmupd_check_wait_event(hw, LE16_TO_CPU(e->desc.opcode), &e->desc);
-#endif /* PF_DRIVER */
 clean_arq_element_out:
 	/* Set pending if needed, unlock and return */
 	if (pending != NULL)
diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index 2740ee68d9..4927a8d0e9 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -46,33 +46,14 @@ enum i40e_status_code i40e_set_mac_type(struct i40e_hw *hw)
 		case I40E_DEV_ID_XXV710_N3000:
 			hw->mac.type = I40E_MAC_XL710;
 			break;
-#ifdef X722_A0_SUPPORT
-		case I40E_DEV_ID_X722_A0:
-#endif
 		case I40E_DEV_ID_KX_X722:
 		case I40E_DEV_ID_QSFP_X722:
 		case I40E_DEV_ID_SFP_X722:
 		case I40E_DEV_ID_1G_BASE_T_X722:
 		case I40E_DEV_ID_10G_BASE_T_X722:
 		case I40E_DEV_ID_SFP_I_X722:
-		case I40E_DEV_ID_SFP_X722_A:
 			hw->mac.type = I40E_MAC_X722;
 			break;
-#if defined(INTEGRATED_VF) || defined(VF_DRIVER)
-		case I40E_DEV_ID_X722_VF:
-#ifdef X722_A0_SUPPORT
-		case I40E_DEV_ID_X722_A0_VF:
-#endif
-			hw->mac.type = I40E_MAC_X722_VF;
-			break;
-#endif /* INTEGRATED_VF || VF_DRIVER */
-#if defined(INTEGRATED_VF) || defined(VF_DRIVER)
-		case I40E_DEV_ID_VF:
-		case I40E_DEV_ID_VF_HV:
-		case I40E_DEV_ID_ADAPTIVE_VF:
-			hw->mac.type = I40E_MAC_VF;
-			break;
-#endif
 		default:
 			hw->mac.type = I40E_MAC_GENERIC;
 			break;
@@ -378,26 +359,8 @@ void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,
 bool i40e_check_asq_alive(struct i40e_hw *hw)
 {
 	if (hw->aq.asq.len)
-#ifdef PF_DRIVER
-#ifdef INTEGRATED_VF
-		if (!i40e_is_vf(hw))
-			return !!(rd32(hw, hw->aq.asq.len) &
-				I40E_PF_ATQLEN_ATQENABLE_MASK);
-#else
 		return !!(rd32(hw, hw->aq.asq.len) &
 			I40E_PF_ATQLEN_ATQENABLE_MASK);
-#endif /* INTEGRATED_VF */
-#endif /* PF_DRIVER */
-#ifdef VF_DRIVER
-#ifdef INTEGRATED_VF
-		if (i40e_is_vf(hw))
-			return !!(rd32(hw, hw->aq.asq.len) &
-				I40E_VF_ATQLEN1_ATQENABLE_MASK);
-#else
-		return !!(rd32(hw, hw->aq.asq.len) &
-			I40E_VF_ATQLEN1_ATQENABLE_MASK);
-#endif /* INTEGRATED_VF */
-#endif /* VF_DRIVER */
 	return false;
 }
 
@@ -973,7 +936,6 @@ enum i40e_status_code i40e_validate_mac_addr(u8 *mac_addr)
 
 	return status;
 }
-#ifdef PF_DRIVER
 
 /**
  * i40e_init_shared_code - Initialize the shared code
@@ -7198,7 +7160,7 @@ enum i40e_status_code i40e_led_set_phy(struct i40e_hw *hw, bool on,
 	status = i40e_led_set_reg(hw, led_addr, led_ctl);
 	return status;
 }
-#endif /* PF_DRIVER */
+
 /**
  * i40e_get_phy_lpi_status - read LPI status from PHY or MAC register
  * @hw: pointer to the hw struct
@@ -7685,105 +7647,6 @@ i40e_aq_run_phy_activity(struct i40e_hw *hw, u16 activity_id, u32 dnl_opcode,
 	return retval;
 }
 
-#ifdef VF_DRIVER
-
-/**
- * i40e_aq_send_msg_to_pf
- * @hw: pointer to the hardware structure
- * @v_opcode: opcodes for VF-PF communication
- * @v_retval: return error code
- * @msg: pointer to the msg buffer
- * @msglen: msg length
- * @cmd_details: pointer to command details
- *
- * Send message to PF driver using admin queue. By default, this message
- * is sent asynchronously, i.e. i40e_asq_send_command() does not wait for
- * completion before returning.
- **/
-enum i40e_status_code i40e_aq_send_msg_to_pf(struct i40e_hw *hw,
-				enum virtchnl_ops v_opcode,
-				enum i40e_status_code v_retval,
-				u8 *msg, u16 msglen,
-				struct i40e_asq_cmd_details *cmd_details)
-{
-	struct i40e_aq_desc desc;
-	struct i40e_asq_cmd_details details;
-	enum i40e_status_code status;
-
-	i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_send_msg_to_pf);
-	desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_SI);
-	desc.cookie_high = CPU_TO_LE32(v_opcode);
-	desc.cookie_low = CPU_TO_LE32(v_retval);
-	if (msglen) {
-		desc.flags |= CPU_TO_LE16((u16)(I40E_AQ_FLAG_BUF
-						| I40E_AQ_FLAG_RD));
-		if (msglen > I40E_AQ_LARGE_BUF)
-			desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_LB);
-		desc.datalen = CPU_TO_LE16(msglen);
-	}
-	if (!cmd_details) {
-		i40e_memset(&details, 0, sizeof(details), I40E_NONDMA_MEM);
-		details.async = true;
-		cmd_details = &details;
-	}
-	status = i40e_asq_send_command(hw, (struct i40e_aq_desc *)&desc, msg,
-				       msglen, cmd_details);
-	return status;
-}
-
-/**
- * i40e_vf_parse_hw_config
- * @hw: pointer to the hardware structure
- * @msg: pointer to the virtual channel VF resource structure
- *
- * Given a VF resource message from the PF, populate the hw struct
- * with appropriate information.
- **/
-void i40e_vf_parse_hw_config(struct i40e_hw *hw,
-			     struct virtchnl_vf_resource *msg)
-{
-	struct virtchnl_vsi_resource *vsi_res;
-	int i;
-
-	vsi_res = &msg->vsi_res[0];
-
-	hw->dev_caps.num_vsis = msg->num_vsis;
-	hw->dev_caps.num_rx_qp = msg->num_queue_pairs;
-	hw->dev_caps.num_tx_qp = msg->num_queue_pairs;
-	hw->dev_caps.num_msix_vectors_vf = msg->max_vectors;
-	hw->dev_caps.dcb = msg->vf_cap_flags &
-			   VIRTCHNL_VF_OFFLOAD_L2;
-	hw->dev_caps.iwarp = (msg->vf_cap_flags &
-			      VIRTCHNL_VF_OFFLOAD_IWARP) ? 1 : 0;
-	for (i = 0; i < msg->num_vsis; i++) {
-		if (vsi_res->vsi_type == VIRTCHNL_VSI_SRIOV) {
-			i40e_memcpy(hw->mac.perm_addr,
-				    vsi_res->default_mac_addr,
-				    ETH_ALEN,
-				    I40E_NONDMA_TO_NONDMA);
-			i40e_memcpy(hw->mac.addr, vsi_res->default_mac_addr,
-				    ETH_ALEN,
-				    I40E_NONDMA_TO_NONDMA);
-		}
-		vsi_res++;
-	}
-}
-
-/**
- * i40e_vf_reset
- * @hw: pointer to the hardware structure
- *
- * Send a VF_RESET message to the PF. Does not wait for response from PF
- * as none will be forthcoming. Immediately after calling this function,
- * the admin queue should be shut down and (optionally) reinitialized.
- **/
-enum i40e_status_code i40e_vf_reset(struct i40e_hw *hw)
-{
-	return i40e_aq_send_msg_to_pf(hw, VIRTCHNL_OP_RESET_VF,
-				      I40E_SUCCESS, NULL, 0, NULL);
-}
-#endif /* VF_DRIVER */
-
 /**
  * i40e_aq_set_arp_proxy_config
  * @hw: pointer to the HW structure
diff --git a/drivers/net/i40e/base/i40e_devids.h b/drivers/net/i40e/base/i40e_devids.h
index f0f206b636..11e98f1f28 100644
--- a/drivers/net/i40e/base/i40e_devids.h
+++ b/drivers/net/i40e/base/i40e_devids.h
@@ -25,17 +25,6 @@
 #define I40E_DEV_ID_25G_B		0x158A
 #define I40E_DEV_ID_25G_SFP28		0x158B
 #define I40E_DEV_ID_10G_BASE_T_BC	0x15FF
-#if defined(INTEGRATED_VF) || defined(VF_DRIVER) || defined(I40E_NDIS_SUPPORT)
-#define I40E_DEV_ID_VF			0x154C
-#define I40E_DEV_ID_VF_HV		0x1571
-#define I40E_DEV_ID_ADAPTIVE_VF		0x1889
-#endif /* VF_DRIVER */
-#ifdef X722_A0_SUPPORT
-#define I40E_DEV_ID_X722_A0		0x374C
-#if defined(INTEGRATED_VF) || defined(VF_DRIVER)
-#define I40E_DEV_ID_X722_A0_VF		0x374D
-#endif
-#endif
 #define I40E_DEV_ID_10G_B		0x104F
 #define I40E_DEV_ID_10G_SFP		0x104E
 #define I40E_DEV_ID_5G_BASE_T_BC	0x101F
@@ -49,9 +38,6 @@
 #define I40E_DEV_ID_1G_BASE_T_X722	0x37D1
 #define I40E_DEV_ID_10G_BASE_T_X722	0x37D2
 #define I40E_DEV_ID_SFP_I_X722		0x37D3
-#if defined(INTEGRATED_VF) || defined(VF_DRIVER) || defined(I40E_NDIS_SUPPORT)
-#define I40E_DEV_ID_X722_VF		0x37CD
-#endif /* VF_DRIVER */
 #define I40E_DEV_ID_SFP_X722_A		0x0DDA
 
 #define i40e_is_40G_device(d)		((d) == I40E_DEV_ID_QSFP_A  || \
diff --git a/drivers/net/i40e/base/i40e_prototype.h b/drivers/net/i40e/base/i40e_prototype.h
index 1c0d79229e..3fd746a4be 100644
--- a/drivers/net/i40e/base/i40e_prototype.h
+++ b/drivers/net/i40e/base/i40e_prototype.h
@@ -46,9 +46,6 @@ i40e_asq_send_command_v2(struct i40e_hw *hw,
 			 u16  buff_size,
 			 struct i40e_asq_cmd_details *cmd_details,
 			 enum i40e_admin_queue_err *aq_status);
-#ifdef VF_DRIVER
-bool i40e_asq_done(struct i40e_hw *hw);
-#endif
 
 /* debug function for adminq */
 void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask,
@@ -71,8 +68,6 @@ enum i40e_status_code i40e_aq_set_rss_key(struct i40e_hw *hw,
 const char *i40e_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err);
 const char *i40e_stat_str(struct i40e_hw *hw, enum i40e_status_code stat_err);
 
-#ifdef PF_DRIVER
-
 u32 i40e_led_get(struct i40e_hw *hw);
 void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink);
 enum i40e_status_code i40e_led_set_phy(struct i40e_hw *hw, bool on,
@@ -498,7 +493,6 @@ void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode,
 				  struct i40e_aq_desc *desc);
 void i40e_nvmupd_clear_wait_state(struct i40e_hw *hw);
 void i40e_set_pci_config_data(struct i40e_hw *hw, u16 link_status);
-#endif /* PF_DRIVER */
 enum i40e_status_code i40e_enable_eee(struct i40e_hw *hw, bool enable);
 
 enum i40e_status_code i40e_set_mac_type(struct i40e_hw *hw);
@@ -510,7 +504,6 @@ STATIC INLINE struct i40e_rx_ptype_decoded decode_rx_desc_ptype(u8 ptype)
 	return i40e_ptype_lookup[ptype];
 }
 
-#ifdef PF_DRIVER
 /**
  * i40e_virtchnl_link_speed - Convert AdminQ link_speed to virtchnl definition
  * @link_speed: the speed to convert
@@ -545,7 +538,6 @@ i40e_virtchnl_link_speed(enum i40e_aq_link_speed link_speed)
 		return VIRTCHNL_LINK_SPEED_UNKNOWN;
 	}
 }
-#endif /* PF_DRIVER */
 
 /* i40e_common for VF drivers*/
 void i40e_vf_parse_hw_config(struct i40e_hw *hw,
diff --git a/drivers/net/i40e/base/i40e_register.h b/drivers/net/i40e/base/i40e_register.h
index 8476b13d92..51f65d7e5f 100644
--- a/drivers/net/i40e/base/i40e_register.h
+++ b/drivers/net/i40e/base/i40e_register.h
@@ -5,8 +5,6 @@
 #ifndef _I40E_REGISTER_H_
 #define _I40E_REGISTER_H_
 
-
-#ifdef PF_DRIVER
 #define I40E_GL_ARQBAH              0x000801C0 /* Reset: EMPR */
 #define I40E_GL_ARQBAH_ARQBAH_SHIFT 0
 #define I40E_GL_ARQBAH_ARQBAH_MASK  I40E_MASK(0xFFFFFFFF, I40E_GL_ARQBAH_ARQBAH_SHIFT)
@@ -1607,7 +1605,6 @@
 #define I40E_MSIX_TVCTRL_MAX_INDEX  128
 #define I40E_MSIX_TVCTRL_MASK_SHIFT 0
 #define I40E_MSIX_TVCTRL_MASK_MASK  I40E_MASK(0x1, I40E_MSIX_TVCTRL_MASK_SHIFT)
-#endif /* PF_DRIVER */
 #define I40E_VFMSIX_PBA1(_i)          (0x00002000 + ((_i) * 4)) /* _i=0...19 */ /* Reset: VFLR */
 #define I40E_VFMSIX_PBA1_MAX_INDEX    19
 #define I40E_VFMSIX_PBA1_PENBIT_SHIFT 0
@@ -1630,7 +1627,6 @@
 #define I40E_VFMSIX_TVCTRL1_MAX_INDEX  639
 #define I40E_VFMSIX_TVCTRL1_MASK_SHIFT 0
 #define I40E_VFMSIX_TVCTRL1_MASK_MASK  I40E_MASK(0x1, I40E_VFMSIX_TVCTRL1_MASK_SHIFT)
-#ifdef PF_DRIVER
 #define I40E_GLNVM_FLA                0x000B6108 /* Reset: POR */
 #define I40E_GLNVM_FLA_FL_SCK_SHIFT   0
 #define I40E_GLNVM_FLA_FL_SCK_MASK    I40E_MASK(0x1, I40E_GLNVM_FLA_FL_SCK_SHIFT)
@@ -3169,7 +3165,6 @@
 #define I40E_PRTPM_SAL_MAX_INDEX      3
 #define I40E_PRTPM_SAL_PFPM_SAL_SHIFT 0
 #define I40E_PRTPM_SAL_PFPM_SAL_MASK  I40E_MASK(0xFFFFFFFF, I40E_PRTPM_SAL_PFPM_SAL_SHIFT)
-#endif /* PF_DRIVER */
 #define I40E_VF_ARQBAH1              0x00006000 /* Reset: EMPR */
 #define I40E_VF_ARQBAH1_ARQBAH_SHIFT 0
 #define I40E_VF_ARQBAH1_ARQBAH_MASK  I40E_MASK(0xFFFFFFFF, I40E_VF_ARQBAH1_ARQBAH_SHIFT)
@@ -3395,7 +3390,6 @@
 #define I40E_VFQF_HREGION_REGION_7_SHIFT       29
 #define I40E_VFQF_HREGION_REGION_7_MASK        I40E_MASK(0x7, I40E_VFQF_HREGION_REGION_7_SHIFT)
 
-#ifdef PF_DRIVER
 #define I40E_MNGSB_FDCRC               0x000B7050 /* Reset: POR */
 #define I40E_MNGSB_FDCRC_CRC_RES_SHIFT 0
 #define I40E_MNGSB_FDCRC_CRC_RES_MASK  I40E_MASK(0xFF, I40E_MNGSB_FDCRC_CRC_RES_SHIFT)
@@ -5301,7 +5295,6 @@
 #define I40E_GLGEN_STAT_HALT                  0x00390000 /* Reset: CORER */
 #define I40E_GLGEN_STAT_HALT_HALT_CELLS_SHIFT 0
 #define I40E_GLGEN_STAT_HALT_HALT_CELLS_MASK  I40E_MASK(0x3FFFFFFF, I40E_GLGEN_STAT_HALT_HALT_CELLS_SHIFT)
-#endif /* PF_DRIVER */
 /* Flow Director */
 #define I40E_REG_INSET_L2_DMAC_SHIFT            60
 #define I40E_REG_INSET_L2_DMAC_MASK             I40E_MASK(0xEULL, I40E_REG_INSET_L2_DMAC_SHIFT)
diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index 895429f9bb..543b4b41dd 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -20,19 +20,11 @@
 #define UNREFERENCED_4PARAMETER(_p, _q, _r, _s) (_p); (_q); (_r); (_s);
 #define UNREFERENCED_5PARAMETER(_p, _q, _r, _s, _t) (_p); (_q); (_r); (_s); (_t);
 
-#ifndef LINUX_MACROS
-#ifndef BIT
 #define BIT(a) (1UL << (a))
-#endif /* BIT */
-#ifndef BIT_ULL
 #define BIT_ULL(a) (1ULL << (a))
-#endif /* BIT_ULL */
-#endif /* LINUX_MACROS */
 
-#ifndef I40E_MASK
 /* I40E_MASK is a macro used on 32 bit registers */
 #define I40E_MASK(mask, shift) (mask << shift)
-#endif
 
 #define I40E_MAX_PF			16
 #define I40E_MAX_PF_VSI			64
@@ -65,9 +57,7 @@
 struct i40e_hw;
 typedef void (*I40E_ADMINQ_CALLBACK)(struct i40e_hw *, struct i40e_aq_desc *);
 
-#ifndef ETH_ALEN
 #define ETH_ALEN	6
-#endif
 /* Data type manipulation macros. */
 #define I40E_HI_DWORD(x)	((u32)((((x) >> 16) >> 16) & 0xFFFFFFFF))
 #define I40E_LO_DWORD(x)	((u32)((x) & 0xFFFFFFFF))
diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index f847bf82bc..8c93468bfd 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -434,7 +434,6 @@ static const struct rte_pci_id pci_id_i40e_map[] = {
 	{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T4) },
 	{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_25G_B) },
 	{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_25G_SFP28) },
-	{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0) },
 	{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_KX_X722) },
 	{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_X722) },
 	{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_X722) },
diff --git a/drivers/net/i40e/meson.build b/drivers/net/i40e/meson.build
index 80171b9dc6..c1b2f68d41 100644
--- a/drivers/net/i40e/meson.build
+++ b/drivers/net/i40e/meson.build
@@ -17,11 +17,6 @@ if dpdk_conf.get('RTE_IOVA_IN_MBUF') == 0
     subdir_done()
 endif
 
-cflags += ['-DPF_DRIVER',
-    '-DVF_DRIVER',
-    '-DINTEGRATED_VF',
-    '-DX722_A0_SUPPORT']
-
 subdir('base')
 objs = [base_objs]
 
-- 
2.43.5

[PATCH v1 03/30] net/i40e/base: remove non-inclusive language

[Anatoly Burakov]

From: Aleksandr Loktionov <aleksandr.loktionov@intel.com>

Replace usages of the term "master" with "primary".

Signed-off-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_common.c | 4 ++--
 drivers/net/i40e/base/i40e_status.h | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index 4927a8d0e9..25835a5ecb 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -159,8 +159,8 @@ const char *i40e_stat_str(struct i40e_hw *hw, enum i40e_status_code stat_err)
 		return "I40E_ERR_INVALID_MAC_ADDR";
 	case I40E_ERR_DEVICE_NOT_SUPPORTED:
 		return "I40E_ERR_DEVICE_NOT_SUPPORTED";
-	case I40E_ERR_MASTER_REQUESTS_PENDING:
-		return "I40E_ERR_MASTER_REQUESTS_PENDING";
+	case I40E_ERR_PRIMARY_REQUESTS_PENDING:
+		return "I40E_ERR_PRIMARY_REQUESTS_PENDING";
 	case I40E_ERR_INVALID_LINK_SETTINGS:
 		return "I40E_ERR_INVALID_LINK_SETTINGS";
 	case I40E_ERR_AUTONEG_NOT_COMPLETE:
diff --git a/drivers/net/i40e/base/i40e_status.h b/drivers/net/i40e/base/i40e_status.h
index cd72169f14..89b05ede3e 100644
--- a/drivers/net/i40e/base/i40e_status.h
+++ b/drivers/net/i40e/base/i40e_status.h
@@ -19,7 +19,7 @@ enum i40e_status_code {
 	I40E_ERR_ADAPTER_STOPPED		= -9,
 	I40E_ERR_INVALID_MAC_ADDR		= -10,
 	I40E_ERR_DEVICE_NOT_SUPPORTED		= -11,
-	I40E_ERR_MASTER_REQUESTS_PENDING	= -12,
+	I40E_ERR_PRIMARY_REQUESTS_PENDING	= -12,
 	I40E_ERR_INVALID_LINK_SETTINGS		= -13,
 	I40E_ERR_AUTONEG_NOT_COMPLETE		= -14,
 	I40E_ERR_RESET_FAILED			= -15,
-- 
2.43.5

[PATCH v1 04/30] net/i40e/base: remove unused variables

[Anatoly Burakov]

From: Krzysztof Galazka <krzysztof.galazka@intel.com>

At one point, there was functionality that was no longer used and was
removed. However, while removing unused logic from the
i40e_validate_filter_settings function, some intermediate variables were
missed and were still being set. Also remove macro definitions for the
registers that were missed during removal.

Signed-off-by: Krzysztof Galazka <krzysztof.galazka@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_common.c   |  5 ----
 drivers/net/i40e/base/i40e_register.h | 33 ---------------------------
 drivers/net/i40e/i40e_regs.h          |  9 --------
 3 files changed, 47 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index 25835a5ecb..e4de508aea 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -5619,7 +5619,6 @@ STATIC enum i40e_status_code i40e_validate_filter_settings(struct i40e_hw *hw,
 				struct i40e_filter_control_settings *settings)
 {
 	u32 fcoe_cntx_size, fcoe_filt_size;
-	u32 pe_cntx_size, pe_filt_size;
 	u32 fcoe_fmax;
 
 	u32 val;
@@ -5664,8 +5663,6 @@ STATIC enum i40e_status_code i40e_validate_filter_settings(struct i40e_hw *hw,
 	case I40E_HASH_FILTER_SIZE_256K:
 	case I40E_HASH_FILTER_SIZE_512K:
 	case I40E_HASH_FILTER_SIZE_1M:
-		pe_filt_size = I40E_HASH_FILTER_BASE_SIZE;
-		pe_filt_size <<= (u32)settings->pe_filt_num;
 		break;
 	default:
 		return I40E_ERR_PARAM;
@@ -5682,8 +5679,6 @@ STATIC enum i40e_status_code i40e_validate_filter_settings(struct i40e_hw *hw,
 	case I40E_DMA_CNTX_SIZE_64K:
 	case I40E_DMA_CNTX_SIZE_128K:
 	case I40E_DMA_CNTX_SIZE_256K:
-		pe_cntx_size = I40E_DMA_CNTX_BASE_SIZE;
-		pe_cntx_size <<= (u32)settings->pe_cntx_num;
 		break;
 	default:
 		return I40E_ERR_PARAM;
diff --git a/drivers/net/i40e/base/i40e_register.h b/drivers/net/i40e/base/i40e_register.h
index 51f65d7e5f..b9da69484c 100644
--- a/drivers/net/i40e/base/i40e_register.h
+++ b/drivers/net/i40e/base/i40e_register.h
@@ -3618,27 +3618,6 @@
 #define I40E_GLHMC_PETIMEROBJSZ                      0x000C2080 /* Reset: CORER */
 #define I40E_GLHMC_PETIMEROBJSZ_PMPETIMEROBJSZ_SHIFT 0
 #define I40E_GLHMC_PETIMEROBJSZ_PMPETIMEROBJSZ_MASK  I40E_MASK(0xF, I40E_GLHMC_PETIMEROBJSZ_PMPETIMEROBJSZ_SHIFT)
-#define I40E_GLHMC_PEXFBASE(_i)               (0x000C4e00 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */
-#define I40E_GLHMC_PEXFBASE_MAX_INDEX         15
-#define I40E_GLHMC_PEXFBASE_FPMPEXFBASE_SHIFT 0
-#define I40E_GLHMC_PEXFBASE_FPMPEXFBASE_MASK  I40E_MASK(0xFFFFFF, I40E_GLHMC_PEXFBASE_FPMPEXFBASE_SHIFT)
-#define I40E_GLHMC_PEXFCNT(_i)              (0x000C4f00 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */
-#define I40E_GLHMC_PEXFCNT_MAX_INDEX        15
-#define I40E_GLHMC_PEXFCNT_FPMPEXFCNT_SHIFT 0
-#define I40E_GLHMC_PEXFCNT_FPMPEXFCNT_MASK  I40E_MASK(0x1FFFFFFF, I40E_GLHMC_PEXFCNT_FPMPEXFCNT_SHIFT)
-#define I40E_GLHMC_PEXFFLBASE(_i)                 (0x000C5000 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */
-#define I40E_GLHMC_PEXFFLBASE_MAX_INDEX           15
-#define I40E_GLHMC_PEXFFLBASE_FPMPEXFFLBASE_SHIFT 0
-#define I40E_GLHMC_PEXFFLBASE_FPMPEXFFLBASE_MASK  I40E_MASK(0xFFFFFF, I40E_GLHMC_PEXFFLBASE_FPMPEXFFLBASE_SHIFT)
-#define I40E_GLHMC_PEXFFLMAX                   0x000C204c /* Reset: CORER */
-#define I40E_GLHMC_PEXFFLMAX_PMPEXFFLMAX_SHIFT 0
-#define I40E_GLHMC_PEXFFLMAX_PMPEXFFLMAX_MASK  I40E_MASK(0x1FFFFFF, I40E_GLHMC_PEXFFLMAX_PMPEXFFLMAX_SHIFT)
-#define I40E_GLHMC_PEXFMAX                 0x000C2048 /* Reset: CORER */
-#define I40E_GLHMC_PEXFMAX_PMPEXFMAX_SHIFT 0
-#define I40E_GLHMC_PEXFMAX_PMPEXFMAX_MASK  I40E_MASK(0x3FFFFFF, I40E_GLHMC_PEXFMAX_PMPEXFMAX_SHIFT)
-#define I40E_GLHMC_PEXFOBJSZ                   0x000C2044 /* Reset: CORER */
-#define I40E_GLHMC_PEXFOBJSZ_PMPEXFOBJSZ_SHIFT 0
-#define I40E_GLHMC_PEXFOBJSZ_PMPEXFOBJSZ_MASK  I40E_MASK(0xF, I40E_GLHMC_PEXFOBJSZ_PMPEXFOBJSZ_SHIFT)
 #define I40E_GLHMC_PFPESDPART(_i)            (0x000C0880 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */
 #define I40E_GLHMC_PFPESDPART_MAX_INDEX      15
 #define I40E_GLHMC_PFPESDPART_PMSDBASE_SHIFT 0
@@ -3759,18 +3738,6 @@
 #define I40E_GLHMC_VFPETIMERCNT_MAX_INDEX           31
 #define I40E_GLHMC_VFPETIMERCNT_FPMPETIMERCNT_SHIFT 0
 #define I40E_GLHMC_VFPETIMERCNT_FPMPETIMERCNT_MASK  I40E_MASK(0x1FFFFFFF, I40E_GLHMC_VFPETIMERCNT_FPMPETIMERCNT_SHIFT)
-#define I40E_GLHMC_VFPEXFBASE(_i)               (0x000Cce00 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */
-#define I40E_GLHMC_VFPEXFBASE_MAX_INDEX         31
-#define I40E_GLHMC_VFPEXFBASE_FPMPEXFBASE_SHIFT 0
-#define I40E_GLHMC_VFPEXFBASE_FPMPEXFBASE_MASK  I40E_MASK(0xFFFFFF, I40E_GLHMC_VFPEXFBASE_FPMPEXFBASE_SHIFT)
-#define I40E_GLHMC_VFPEXFCNT(_i)              (0x000Ccf00 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */
-#define I40E_GLHMC_VFPEXFCNT_MAX_INDEX        31
-#define I40E_GLHMC_VFPEXFCNT_FPMPEXFCNT_SHIFT 0
-#define I40E_GLHMC_VFPEXFCNT_FPMPEXFCNT_MASK  I40E_MASK(0x1FFFFFFF, I40E_GLHMC_VFPEXFCNT_FPMPEXFCNT_SHIFT)
-#define I40E_GLHMC_VFPEXFFLBASE(_i)                 (0x000Cd000 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */
-#define I40E_GLHMC_VFPEXFFLBASE_MAX_INDEX           31
-#define I40E_GLHMC_VFPEXFFLBASE_FPMPEXFFLBASE_SHIFT 0
-#define I40E_GLHMC_VFPEXFFLBASE_FPMPEXFFLBASE_MASK  I40E_MASK(0xFFFFFF, I40E_GLHMC_VFPEXFFLBASE_FPMPEXFFLBASE_SHIFT)
 #define I40E_GLHMC_VFSDPART(_i)            (0x000C8800 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */
 #define I40E_GLHMC_VFSDPART_MAX_INDEX      31
 #define I40E_GLHMC_VFSDPART_PMSDBASE_SHIFT 0
diff --git a/drivers/net/i40e/i40e_regs.h b/drivers/net/i40e/i40e_regs.h
index b19bb1d5a5..7e94fca5b1 100644
--- a/drivers/net/i40e/i40e_regs.h
+++ b/drivers/net/i40e/i40e_regs.h
@@ -586,9 +586,6 @@ static const struct i40e_reg_info i40e_regs_others[] = {
 	{I40E_GLHMC_PEARPMAX, 0, 0, 0, 0, "GLHMC_PEARPMAX"},
 	{I40E_GLHMC_PEMROBJSZ, 0, 0, 0, 0, "GLHMC_PEMROBJSZ"},
 	{I40E_GLHMC_PEMRMAX, 0, 0, 0, 0, "GLHMC_PEMRMAX"},
-	{I40E_GLHMC_PEXFOBJSZ, 0, 0, 0, 0, "GLHMC_PEXFOBJSZ"},
-	{I40E_GLHMC_PEXFMAX, 0, 0, 0, 0, "GLHMC_PEXFMAX"},
-	{I40E_GLHMC_PEXFFLMAX, 0, 0, 0, 0, "GLHMC_PEXFFLMAX"},
 	{I40E_GLHMC_PEQ1OBJSZ, 0, 0, 0, 0, "GLHMC_PEQ1OBJSZ"},
 	{I40E_GLHMC_PEQ1MAX, 0, 0, 0, 0, "GLHMC_PEQ1MAX"},
 	{I40E_GLHMC_PEQ1FLMAX, 0, 0, 0, 0, "GLHMC_PEQ1FLMAX"},
@@ -616,9 +613,6 @@ static const struct i40e_reg_info i40e_regs_others[] = {
 	{I40E_GLHMC_APBVTINUSEBASE(0), 15, 4, 0, 0, "GLHMC_APBVTINUSEBASE"},
 	{I40E_GLHMC_PEMRBASE(0), 15, 4, 0, 0, "GLHMC_PEMRBASE"},
 	{I40E_GLHMC_PEMRCNT(0), 15, 4, 0, 0, "GLHMC_PEMRCNT"},
-	{I40E_GLHMC_PEXFBASE(0), 15, 4, 0, 0, "GLHMC_PEXFBASE"},
-	{I40E_GLHMC_PEXFCNT(0), 15, 4, 0, 0, "GLHMC_PEXFCNT"},
-	{I40E_GLHMC_PEXFFLBASE(0), 15, 4, 0, 0, "GLHMC_PEXFFLBASE"},
 	{I40E_GLHMC_PEQ1BASE(0), 15, 4, 0, 0, "GLHMC_PEQ1BASE"},
 	{I40E_GLHMC_PEQ1CNT(0), 15, 4, 0, 0, "GLHMC_PEQ1CNT"},
 	{I40E_GLHMC_PEQ1FLBASE(0), 15, 4, 0, 0, "GLHMC_PEQ1FLBASE"},
@@ -653,9 +647,6 @@ static const struct i40e_reg_info i40e_regs_others[] = {
 	{I40E_GLHMC_VFAPBVTINUSEBASE(0), 31, 4, 0, 0, "GLHMC_VFAPBVTINUSEBASE"},
 	{I40E_GLHMC_VFPEMRBASE(0), 31, 4, 0, 0, "GLHMC_VFPEMRBASE"},
 	{I40E_GLHMC_VFPEMRCNT(0), 31, 4, 0, 0, "GLHMC_VFPEMRCNT"},
-	{I40E_GLHMC_VFPEXFBASE(0), 31, 4, 0, 0, "GLHMC_VFPEXFBASE"},
-	{I40E_GLHMC_VFPEXFCNT(0), 31, 4, 0, 0, "GLHMC_VFPEXFCNT"},
-	{I40E_GLHMC_VFPEXFFLBASE(0), 31, 4, 0, 0, "GLHMC_VFPEXFFLBASE"},
 	{I40E_GLHMC_VFPEQ1BASE(0), 31, 4, 0, 0, "GLHMC_VFPEQ1BASE"},
 	{I40E_GLHMC_VFPEQ1CNT(0), 31, 4, 0, 0, "GLHMC_VFPEQ1CNT"},
 	{I40E_GLHMC_VFPEQ1FLBASE(0), 31, 4, 0, 0, "GLHMC_VFPEQ1FLBASE"},
-- 
2.43.5

[PATCH v1 05/30] net/i40e/base: don't set flags in i40e_init_shared_code

[Anatoly Burakov]

The functionality to set i40e_hw's flags was moved to its own function in
AQ a while ago:

commit 37b091c75b13 ("net/i40e/base: extend PHY access AQ command")

However, the setting of hw->flags for X722 was not removed, even though it
has become unnecessary.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_common.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index e4de508aea..451cc2c1c7 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -980,9 +980,6 @@ enum i40e_status_code i40e_init_shared_code(struct i40e_hw *hw)
 	else
 		hw->pf_id = (u8)(func_rid & 0x7);
 
-	if (hw->mac.type == I40E_MAC_X722)
-		hw->flags |= I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE |
-			     I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK;
 	/* NVMUpdate features structure initialization */
 	hw->nvmupd_features.major = I40E_NVMUPD_FEATURES_API_VER_MAJOR;
 	hw->nvmupd_features.minor = I40E_NVMUPD_FEATURES_API_VER_MINOR;
-- 
2.43.5

[PATCH v1 06/30] net/i40e/base: fix misleading debug logs and comments

[Anatoly Burakov]

From: Aleksandr Loktionov <aleksandr.loktionov@intel.com>

Both comments and debug logs for i40e_read_nvm_aq refer to writing, when
in actuality it's a read function. Fix both comments and debug logs.

Signed-off-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_nvm.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_nvm.c b/drivers/net/i40e/base/i40e_nvm.c
index f385042601..05816a4b79 100644
--- a/drivers/net/i40e/base/i40e_nvm.c
+++ b/drivers/net/i40e/base/i40e_nvm.c
@@ -223,11 +223,11 @@ STATIC enum i40e_status_code i40e_read_nvm_word_srctl(struct i40e_hw *hw,
  * @hw: pointer to the HW structure.
  * @module_pointer: module pointer location in words from the NVM beginning
  * @offset: offset in words from module start
- * @words: number of words to write
- * @data: buffer with words to write to the Shadow RAM
+ * @words: number of words to read
+ * @data: buffer with words to read from the Shadow RAM
  * @last_command: tells the AdminQ that this is the last command
  *
- * Writes a 16 bit words buffer to the Shadow RAM using the admin command.
+ * Reads a 16 bit words buffer to the Shadow RAM using the admin command.
  **/
 STATIC enum i40e_status_code i40e_read_nvm_aq(struct i40e_hw *hw,
 					      u8 module_pointer, u32 offset,
@@ -249,18 +249,18 @@ STATIC enum i40e_status_code i40e_read_nvm_aq(struct i40e_hw *hw,
 	 */
 	if ((offset + words) > hw->nvm.sr_size)
 		i40e_debug(hw, I40E_DEBUG_NVM,
-			   "NVM write error: offset %d beyond Shadow RAM limit %d\n",
+			   "NVM read error: offset %d beyond Shadow RAM limit %d\n",
 			   (offset + words), hw->nvm.sr_size);
 	else if (words > I40E_SR_SECTOR_SIZE_IN_WORDS)
-		/* We can write only up to 4KB (one sector), in one AQ write */
+		/* We can read only up to 4KB (one sector), in one AQ read */
 		i40e_debug(hw, I40E_DEBUG_NVM,
-			   "NVM write fail error: tried to write %d words, limit is %d.\n",
+			   "NVM read fail error: tried to read %d words, limit is %d.\n",
 			   words, I40E_SR_SECTOR_SIZE_IN_WORDS);
 	else if (((offset + (words - 1)) / I40E_SR_SECTOR_SIZE_IN_WORDS)
 		 != (offset / I40E_SR_SECTOR_SIZE_IN_WORDS))
-		/* A single write cannot spread over two sectors */
+		/* A single read cannot spread over two sectors */
 		i40e_debug(hw, I40E_DEBUG_NVM,
-			   "NVM write error: cannot spread over two sectors in a single write offset=%d words=%d\n",
+			   "NVM read error: cannot spread over two sectors in a single read offset=%d words=%d\n",
 			   offset, words);
 	else
 		ret_code = i40e_aq_read_nvm(hw, module_pointer,
-- 
2.43.5

[PATCH v1 07/30] net/i40e/base: add missing define to X710TL device check

[Anatoly Burakov]

Commit c0ce1c4677fd ("net/i40e: add new X722 device") added a new X722
define as well as one for X710T*L (that wasn't called out in commit
message), however it was not added to the I40E_IS_X710TL_DEVICE check.
This patch adds the missing define to the check.

Fixes: c0ce1c4677fd ("net/i40e: add new X722 device")

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_devids.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/i40e/base/i40e_devids.h b/drivers/net/i40e/base/i40e_devids.h
index 11e98f1f28..0a323566d1 100644
--- a/drivers/net/i40e/base/i40e_devids.h
+++ b/drivers/net/i40e/base/i40e_devids.h
@@ -31,7 +31,8 @@
 #define I40E_DEV_ID_1G_BASE_T_BC	0x0DD2
 #define I40E_IS_X710TL_DEVICE(d) \
 	(((d) == I40E_DEV_ID_10G_BASE_T_BC) || \
-	((d) == I40E_DEV_ID_5G_BASE_T_BC))
+	((d) == I40E_DEV_ID_5G_BASE_T_BC) || \
+	((d) == I40E_DEV_ID_1G_BASE_T_BC))
 #define I40E_DEV_ID_KX_X722		0x37CE
 #define I40E_DEV_ID_QSFP_X722		0x37CF
 #define I40E_DEV_ID_SFP_X722		0x37D0
-- 
2.43.5

[PATCH v1 08/30] net/i40e/base: add new device ID to 25G device list

[Anatoly Burakov]

From: Przemyslaw Gierszynski <przemyslaw.gierszynski@intel.com>

Added I40E_DEV_ID_XXV710_N3000 (Device ID 0x0D58) as a 25G device to the
i40e_is_25G_device macro.

Signed-off-by: Przemyslaw Gierszynski <przemyslaw.gierszynski@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_devids.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/i40e/base/i40e_devids.h b/drivers/net/i40e/base/i40e_devids.h
index 0a323566d1..d257f328ce 100644
--- a/drivers/net/i40e/base/i40e_devids.h
+++ b/drivers/net/i40e/base/i40e_devids.h
@@ -46,6 +46,7 @@
 					 (d) == I40E_DEV_ID_QSFP_C)
 
 #define i40e_is_25G_device(d)		((d) == I40E_DEV_ID_25G_B  || \
-					 (d) == I40E_DEV_ID_25G_SFP28)
+					 (d) == I40E_DEV_ID_25G_SFP28  || \
+					 (d) == I40E_DEV_ID_XXV710_N3000)
 
 #endif /* _I40E_DEVIDS_H_ */
-- 
2.43.5

[PATCH v1 09/30] net/i40e/base: fix setting MAC type for X722

[Anatoly Burakov]

In one of the earlier commits, definitions for X722 were added. However,
code enabling setting MAC type for a particular variant of X722 device
was missed. Add the missing case statement to set the MAC type for that
device.

Fixes: c0ce1c4677fd ("net/i40e: add new X722 device")

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_common.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index 451cc2c1c7..be27cc9d0b 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -52,6 +52,7 @@ enum i40e_status_code i40e_set_mac_type(struct i40e_hw *hw)
 		case I40E_DEV_ID_1G_BASE_T_X722:
 		case I40E_DEV_ID_10G_BASE_T_X722:
 		case I40E_DEV_ID_SFP_I_X722:
+		case I40E_DEV_ID_SFP_X722_A:
 			hw->mac.type = I40E_MAC_X722;
 			break;
 		default:
-- 
2.43.5

[PATCH v1 10/30] net/i40e/base: add definitions for rx_err1

[Anatoly Burakov]

From: Lukasz Cieplicki <lukaszx.cieplicki@intel.com>

Add defines related to GL_RXEER1 register. GL_RXEER1 register is composed
of two 32 bits registers (H and L). Receive Error Counter 1
(GL_RXERR1{H,L}) contains count of dropped packets due to one of the
following exceptions:

- Packet size is larger than RXMAX of the queue
- Internal Receive queue context error (e.g. when reset is in progress)
- Receive descriptor Unsupported Request on the PCI or internal Dummy
  completion (e.g. when reset is in progress)

The define for L part was already present, but define for H part was
missing in the base driver, so it was previously added to ethdev
manually. Add the missing define to i40e_register.h and remove it from
i40e_ethdev. Also, enable reading this register in i40e_regs.

Additionally, add rx_err1 member to i40e_hw_port_stats, remove the
(previously manually added) rx_err1 from i40e_pf, and replace all usages
of rx_err1 with one from the base driver stats struct.

Signed-off-by: Lukasz Cieplicki <lukaszx.cieplicki@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_register.h | 12 ++++++++----
 drivers/net/i40e/base/i40e_type.h     |  1 +
 drivers/net/i40e/i40e_ethdev.c        | 21 +++++++++++----------
 drivers/net/i40e/i40e_ethdev.h        |  9 ---------
 drivers/net/i40e/i40e_regs.h          |  3 ++-
 5 files changed, 22 insertions(+), 24 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_register.h b/drivers/net/i40e/base/i40e_register.h
index b9da69484c..55f671c3c5 100644
--- a/drivers/net/i40e/base/i40e_register.h
+++ b/drivers/net/i40e/base/i40e_register.h
@@ -2391,10 +2391,14 @@
 #define I40E_GL_FCOERPDC_MAX_INDEX      143
 #define I40E_GL_FCOERPDC_FCOERPDC_SHIFT 0
 #define I40E_GL_FCOERPDC_FCOERPDC_MASK  I40E_MASK(0xFFFFFFFF, I40E_GL_FCOERPDC_FCOERPDC_SHIFT)
-#define I40E_GL_RXERR1_L(_i)             (0x00318000 + ((_i) * 8)) /* _i=0...143 */ /* Reset: CORER */
-#define I40E_GL_RXERR1_L_MAX_INDEX       143
-#define I40E_GL_RXERR1_L_FCOEDIFRC_SHIFT 0
-#define I40E_GL_RXERR1_L_FCOEDIFRC_MASK  I40E_MASK(0xFFFFFFFF, I40E_GL_RXERR1_L_FCOEDIFRC_SHIFT)
+#define I40E_GL_RXERR1H(_i)             (0x00318004 + ((_i) * 8)) /* _i=0...143 */ /* Reset: CORER */
+#define I40E_GL_RXERR1H_MAX_INDEX       143
+#define I40E_GL_RXERR1H_RXERR1H_SHIFT 	0
+#define I40E_GL_RXERR1H_RXERR1H_MASK  	I40E_MASK(0xFFFFFFFF, I40E_GL_RXERR1H_RXERR1H_SHIFT)
+#define I40E_GL_RXERR1L(_i)             (0x00318000 + ((_i) * 8)) /* _i=0...143 */ /* Reset: CORER */
+#define I40E_GL_RXERR1L_MAX_INDEX       143
+#define I40E_GL_RXERR1L_RXERR1L_SHIFT 	0
+#define I40E_GL_RXERR1L_RXERR1L_MASK  	I40E_MASK(0xFFFFFFFF, I40E_GL_RXERR1L_RXERR1L_SHIFT)
 #define I40E_GL_RXERR2_L(_i)             (0x0031c000 + ((_i) * 8)) /* _i=0...143 */ /* Reset: CORER */
 #define I40E_GL_RXERR2_L_MAX_INDEX       143
 #define I40E_GL_RXERR2_L_FCOEDIXAC_SHIFT 0
diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index 543b4b41dd..48d722c1f0 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -1475,6 +1475,7 @@ struct i40e_hw_port_stats {
 	u64 rx_undersize;		/* ruc */
 	u64 rx_fragments;		/* rfc */
 	u64 rx_oversize;		/* roc */
+	u64 rx_err1;			/* rxerr1 */
 	u64 rx_jabber;			/* rjc */
 	u64 tx_size_64;			/* ptc64 */
 	u64 tx_size_127;		/* ptc127 */
diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 8c93468bfd..feb618ee24 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -542,8 +542,11 @@ static const struct rte_i40e_xstats_name_off rte_i40e_stats_strings[] = {
 	{"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)},
 	{"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats,
 		rx_unknown_protocol)},
-	{"rx_size_error_packets", offsetof(struct i40e_pf, rx_err1) -
-				  offsetof(struct i40e_pf, stats)},
+	/*
+	 * all other offsets are against i40e_eth_stats which is first member
+	 * in i40e_hw_port_stats, so these offsets are interchangeable
+	 */
+	{"rx_size_error_packets", offsetof(struct i40e_hw_port_stats, rx_err1)},
 	{"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_unicast)},
 	{"tx_multicast_packets", offsetof(struct i40e_eth_stats, tx_multicast)},
 	{"tx_broadcast_packets", offsetof(struct i40e_eth_stats, tx_broadcast)},
@@ -3285,10 +3288,10 @@ i40e_read_stats_registers(struct i40e_pf *pf, struct i40e_hw *hw)
 			    pf->offset_loaded,
 			    &os->eth.rx_unknown_protocol,
 			    &ns->eth.rx_unknown_protocol);
-	i40e_stat_update_48(hw, I40E_GL_RXERR1_H(hw->pf_id + I40E_MAX_VF),
-			    I40E_GL_RXERR1_L(hw->pf_id + I40E_MAX_VF),
-			    pf->offset_loaded, &pf->rx_err1_offset,
-			    &pf->rx_err1);
+	i40e_stat_update_48(hw, I40E_GL_RXERR1H(hw->pf_id + I40E_MAX_VF),
+			    I40E_GL_RXERR1L(hw->pf_id + I40E_MAX_VF),
+			    pf->offset_loaded, &os->rx_err1,
+			    &ns->rx_err1);
 	i40e_stat_update_48_in_64(hw, I40E_GLPRT_GOTCH(hw->port),
 				  I40E_GLPRT_GOTCL(hw->port),
 				  pf->offset_loaded, &os->eth.tx_bytes,
@@ -3489,7 +3492,7 @@ i40e_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 			pf->main_vsi->eth_stats.rx_multicast +
 			pf->main_vsi->eth_stats.rx_broadcast -
 			pf->main_vsi->eth_stats.rx_discards -
-			pf->rx_err1;
+			ns->rx_err1;
 	stats->opackets = ns->eth.tx_unicast +
 			ns->eth.tx_multicast +
 			ns->eth.tx_broadcast;
@@ -3504,7 +3507,7 @@ i40e_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 	stats->ierrors  = ns->crc_errors +
 			ns->rx_length_errors + ns->rx_undersize +
 			ns->rx_oversize + ns->rx_fragments + ns->rx_jabber +
-			pf->rx_err1;
+			ns->rx_err1;
 
 	if (pf->vfs) {
 		for (i = 0; i < pf->vf_num; i++) {
@@ -6407,8 +6410,6 @@ i40e_pf_setup(struct i40e_pf *pf)
 	memset(&pf->stats_offset, 0, sizeof(struct i40e_hw_port_stats));
 	memset(&pf->internal_stats, 0, sizeof(struct i40e_eth_stats));
 	memset(&pf->internal_stats_offset, 0, sizeof(struct i40e_eth_stats));
-	pf->rx_err1 = 0;
-	pf->rx_err1_offset = 0;
 
 	ret = i40e_pf_get_switch_config(pf);
 	if (ret != I40E_SUCCESS) {
diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h
index 31fc92691e..98213948b4 100644
--- a/drivers/net/i40e/i40e_ethdev.h
+++ b/drivers/net/i40e/i40e_ethdev.h
@@ -20,13 +20,6 @@
 #include "base/i40e_type.h"
 #include "base/virtchnl.h"
 
-/**
- * _i=0...143,
- * counters 0-127 are for the 128 VFs,
- * counters 128-143 are for the 16 PFs
- */
-#define I40E_GL_RXERR1_H(_i)	(0x00318004 + ((_i) * 8))
-
 #define I40E_AQ_LEN               32
 #define I40E_AQ_BUF_SZ            4096
 /* Number of queues per TC should be one of 1, 2, 4, 8, 16, 32, 64 */
@@ -1128,8 +1121,6 @@ struct i40e_pf {
 	struct i40e_hw_port_stats stats_offset;
 	struct i40e_hw_port_stats stats;
 	struct i40e_mbuf_stats mbuf_stats;
-	u64 rx_err1;	/* rxerr1 */
-	u64 rx_err1_offset;
 
 	/* internal packet statistics, it should be excluded from the total */
 	struct i40e_eth_stats internal_stats_offset;
diff --git a/drivers/net/i40e/i40e_regs.h b/drivers/net/i40e/i40e_regs.h
index 7e94fca5b1..e6f8866e9f 100644
--- a/drivers/net/i40e/i40e_regs.h
+++ b/drivers/net/i40e/i40e_regs.h
@@ -887,7 +887,8 @@ static const struct i40e_reg_info i40e_regs_others[] = {
 	{I40E_GL_FCOEDDPC(0), 143, 8, 0, 0, "GL_FCOEDDPC"},
 	{I40E_GL_FCOECRC(0), 143, 8, 0, 0, "GL_FCOECRC"},
 	{I40E_GL_FCOEPRC(0), 143, 8, 0, 0, "GL_FCOEPRC"},
-	{I40E_GL_RXERR1_L(0), 143, 8, 0, 0, "GL_RXERR1_L"},
+	{I40E_GL_RXERR1L(0), 143, 8, 0, 0, "GL_RXERR1L"},
+	{I40E_GL_RXERR1H(0), 143, 8, 0, 0, "GL_RXERR1H"},
 	{I40E_GL_FCOEDIFEC(0), 143, 8, 0, 0, "GL_FCOEDIFEC"},
 	{I40E_GL_RXERR2_L(0), 143, 8, 0, 0, "GL_RXERR2_L"},
 	{I40E_GL_FCOEDWRCL(0), 143, 8, 0, 0, "GL_FCOEDWRCL"},
-- 
2.43.5

[PATCH v1 11/30] net/i40e/base: fix not blinking X722 with x557 PHY

[Anatoly Burakov]

From: Eryk Rybak <eryk.roch.rybak@intel.com>

On x722 with x557 PHY LEDs do not blink under certain circumstances,
because the function was attempting to avoid triggering LED activity when
it detected that LED was already active. Fix it to just always trigger
LED blinking regardless of the LED state.

Signed-off-by: Eryk Rybak <eryk.roch.rybak@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_common.c | 32 -----------------------------
 1 file changed, 32 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index be27cc9d0b..80500697ed 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -1548,7 +1548,6 @@ static u32 i40e_led_is_mine(struct i40e_hw *hw, int idx)
  **/
 u32 i40e_led_get(struct i40e_hw *hw)
 {
-	u32 current_mode = 0;
 	u32 mode = 0;
 	int i;
 
@@ -1561,21 +1560,6 @@ u32 i40e_led_get(struct i40e_hw *hw)
 		if (!gpio_val)
 			continue;
 
-		/* ignore gpio LED src mode entries related to the activity
-		 *  LEDs
-		 */
-		current_mode = ((gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK)
-				>> I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT);
-		switch (current_mode) {
-		case I40E_COMBINED_ACTIVITY:
-		case I40E_FILTER_ACTIVITY:
-		case I40E_MAC_ACTIVITY:
-		case I40E_LINK_ACTIVITY:
-			continue;
-		default:
-			break;
-		}
-
 		mode = (gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK) >>
 			I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT;
 		break;
@@ -1595,7 +1579,6 @@ u32 i40e_led_get(struct i40e_hw *hw)
  **/
 void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink)
 {
-	u32 current_mode = 0;
 	int i;
 
 	if (mode & ~I40E_LED_MODE_VALID) {
@@ -1612,21 +1595,6 @@ void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink)
 		if (!gpio_val)
 			continue;
 
-		/* ignore gpio LED src mode entries related to the activity
-		 * LEDs
-		 */
-		current_mode = ((gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK)
-				>> I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT);
-		switch (current_mode) {
-		case I40E_COMBINED_ACTIVITY:
-		case I40E_FILTER_ACTIVITY:
-		case I40E_MAC_ACTIVITY:
-		case I40E_LINK_ACTIVITY:
-			continue;
-		default:
-			break;
-		}
-
 		if (I40E_IS_X710TL_DEVICE(hw->device_id)) {
 			u32 pin_func = 0;
 
-- 
2.43.5

[PATCH v1 12/30] net/i40e/base: add VLAN field for input set

[Anatoly Burakov]

From: Przemyslaw Patynowski <przemyslawx.patynowski@intel.com>

Add VLAN bit used during flow director programming, as a part of
input set for HW.

Signed-off-by: Przemyslaw Patynowski <przemyslawx.patynowski@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_type.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index 48d722c1f0..45b38c086b 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -1925,6 +1925,8 @@ struct i40e_lldp_variables {
 #define I40E_L4_DST_MASK		(0x1ULL << I40E_L4_DST_SHIFT)
 #define I40E_VERIFY_TAG_SHIFT		31
 #define I40E_VERIFY_TAG_MASK		(0x3ULL << I40E_VERIFY_TAG_SHIFT)
+#define I40E_VLAN_SRC_SHIFT		55
+#define I40E_VLAN_SRC_MASK		(0x1ULL << I40E_VLAN_SRC_SHIFT)
 
 #define I40E_FLEX_50_SHIFT		13
 #define I40E_FLEX_50_MASK		(0x1ULL << I40E_FLEX_50_SHIFT)
-- 
2.43.5

[PATCH v1 13/30] net/i40e/base: allow reading LED blink setting

[Anatoly Burakov]

From: Dawid Łukwiński <dawid.lukwinski@intel.com>

Provide an API to allow reading LED blink setting.

Signed-off-by: Dawid Łukwiński <dawid.lukwinski@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_common.c    | 29 ++++++++++++++++++++++++++
 drivers/net/i40e/base/i40e_prototype.h |  1 +
 2 files changed, 30 insertions(+)

diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index 80500697ed..a43b89aaeb 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -1568,6 +1568,35 @@ u32 i40e_led_get(struct i40e_hw *hw)
 	return mode;
 }
 
+/**
+ * i40e_led_get_blink - return current LED blink setting
+ * @hw: pointer to the hw struct
+ *
+ * The value returned is the LED_BLINK bit as defined in the
+ * GPIO register definitions (0 = no blink, 1 = do blink).
+ **/
+bool i40e_led_get_blink(struct i40e_hw *hw)
+{
+	bool blink = 0;
+	int i;
+
+	/* as per the documentation GPIO 22-29 are the LED
+	 * GPIO pins named LED0..LED7
+	 */
+	for (i = I40E_LED0; i <= I40E_GLGEN_GPIO_CTL_MAX_INDEX; i++) {
+		u32 gpio_val = i40e_led_is_mine(hw, i);
+
+		if (!gpio_val)
+			continue;
+
+		blink = (gpio_val & I40E_GLGEN_GPIO_CTL_LED_BLINK_MASK) >>
+			I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT;
+		break;
+	}
+
+	return blink;
+}
+
 /**
  * i40e_led_set - set new on/off mode
  * @hw: pointer to the hw struct
diff --git a/drivers/net/i40e/base/i40e_prototype.h b/drivers/net/i40e/base/i40e_prototype.h
index 3fd746a4be..745b9709c5 100644
--- a/drivers/net/i40e/base/i40e_prototype.h
+++ b/drivers/net/i40e/base/i40e_prototype.h
@@ -69,6 +69,7 @@ const char *i40e_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err);
 const char *i40e_stat_str(struct i40e_hw *hw, enum i40e_status_code stat_err);
 
 u32 i40e_led_get(struct i40e_hw *hw);
+bool i40e_led_get_blink(struct i40e_hw *hw);
 void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink);
 enum i40e_status_code i40e_led_set_phy(struct i40e_hw *hw, bool on,
 				       u16 led_addr, u32 mode);
-- 
2.43.5

[PATCH v1 14/30] net/i40e/base: do not load DDP packages with reserved track ID

[Anatoly Burakov]

From: Artur Tyminski <arturx.tyminski@intel.com>

Packages with reserved track IDs should not be loaded, yet currently, the
driver will only check one of the reserved ID's, but not the other.
Fix the DDP package loading to also check for the other reserved track ID.

Signed-off-by: Artur Tyminski <arturx.tyminski@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_common.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index a43b89aaeb..693608ac99 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -8048,7 +8048,8 @@ i40e_validate_profile(struct i40e_hw *hw, struct i40e_profile_segment *profile,
 	u32 sec_off;
 	u32 i;
 
-	if (track_id == I40E_DDP_TRACKID_INVALID) {
+	if (track_id == I40E_DDP_TRACKID_INVALID ||
+	    track_id == I40E_DDP_TRACKID_RDONLY) {
 		i40e_debug(hw, I40E_DEBUG_PACKAGE, "Invalid track_id\n");
 		return I40E_NOT_SUPPORTED;
 	}
-- 
2.43.5

[PATCH v1 15/30] net/i40e/base: add DDP package type defines

[Anatoly Burakov]

From: Artur Tyminski <arturx.tyminski@intel.com>

This patch adds definitions related to DDP package type.

Signed-off-by: Artur Tyminski <arturx.tyminski@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_type.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index 45b38c086b..2676d272c9 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -1981,6 +1981,8 @@ struct i40e_metadata_segment {
 #define I40E_DDP_TRACKID_INVALID	0xFFFFFFFF
 #define I40E_DDP_TRACKID_GRP_MSK	0x00FF0000
 #define I40E_DDP_TRACKID_GRP_COMP_ALL	0xFF
+#define I40E_DDP_TRACKID_PKGTYPE_MSK	0xFF000000
+#define I40E_DDP_TRACKID_PKGTYPE_RDONLY	0
 	u32 track_id;
 	char name[I40E_DDP_NAME_SIZE];
 };
-- 
2.43.5

[PATCH v1 16/30] net/i40e/base: add X722 defines for input set mask

[Anatoly Burakov]

From: Slawomir Laba <slawomirx.laba@intel.com>

Add X722 input set mask for RSS and flow director.
X722 family is using different shifts on the registers
from X710 NIC family.

Signed-off-by: Slawomir Laba <slawomirx.laba@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_type.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index 2676d272c9..fe47f00ec9 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -1911,6 +1911,10 @@ struct i40e_lldp_variables {
 #define I40E_PFQF_CTL_0_HASHLUTSIZE_512	0x00010000
 
 /* INPUT SET MASK for RSS, flow director, and flexible payload */
+#define I40E_X722_L3_SRC_SHIFT		49
+#define I40E_X722_L3_SRC_MASK		(0x3ULL << I40E_X722_L3_SRC_SHIFT)
+#define I40E_X722_L3_DST_SHIFT		41
+#define I40E_X722_L3_DST_MASK		(0x3ULL << I40E_X722_L3_DST_SHIFT)
 #define I40E_L3_SRC_SHIFT		47
 #define I40E_L3_SRC_MASK		(0x3ULL << I40E_L3_SRC_SHIFT)
 #define I40E_L3_V6_SRC_SHIFT		43
-- 
2.43.5

[PATCH v1 17/30] net/i40e/base: improve typecasting

[Anatoly Burakov]

From: Vignesh Sridhar <vignesh.sridhar@intel.com>

Adding typecast to variables to avoid compiler warnings generated on
certain platforms and compilers if variables of a particular data type
are assigned to ones of a smaller data type.

Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_common.c | 6 +++---
 drivers/net/i40e/base/i40e_dcb.c    | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index 693608ac99..416f31dcc3 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -4253,7 +4253,7 @@ STATIC void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
 	 */
 	if (hw->num_ports != 0) {
 		hw->partition_id = (hw->pf_id / hw->num_ports) + 1;
-		hw->num_partitions = num_functions / hw->num_ports;
+		hw->num_partitions = (u16)(num_functions / hw->num_ports);
 	}
 
 	/* additional HW specific goodies that might
@@ -6180,7 +6180,7 @@ enum i40e_status_code i40e_aq_alternate_write_indirect(struct i40e_hw *hw,
 	cmd_resp->length = CPU_TO_LE32(dw_count);
 
 	status = i40e_asq_send_command(hw, &desc, buffer,
-				       I40E_LO_DWORD(4*dw_count), NULL);
+				       I40E_LO_WORD(4*dw_count), NULL);
 
 	return status;
 }
@@ -6261,7 +6261,7 @@ enum i40e_status_code i40e_aq_alternate_read_indirect(struct i40e_hw *hw,
 	cmd_resp->length = CPU_TO_LE32(dw_count);
 
 	status = i40e_asq_send_command(hw, &desc, buffer,
-				       I40E_LO_DWORD(4*dw_count), NULL);
+				       I40E_LO_WORD(4*dw_count), NULL);
 
 	return status;
 }
diff --git a/drivers/net/i40e/base/i40e_dcb.c b/drivers/net/i40e/base/i40e_dcb.c
index de0320bf3f..04322ea034 100644
--- a/drivers/net/i40e/base/i40e_dcb.c
+++ b/drivers/net/i40e/base/i40e_dcb.c
@@ -906,7 +906,7 @@ enum i40e_status_code i40e_init_dcb(struct i40e_hw *hw, bool enable_mib_change)
 		return I40E_ERR_NOT_READY;
 
 	/* Get the LLDP AdminStatus for the current port */
-	adminstatus = lldp_cfg.adminstatus >> (hw->port * 4);
+	adminstatus = (u8)(lldp_cfg.adminstatus >> (hw->port * 4));
 	adminstatus &= 0xF;
 
 	/* LLDP agent disabled */
-- 
2.43.5

[PATCH v1 18/30] net/i40e/base: add named and raw structs to rx desc

[Anatoly Burakov]

From: Björn Töpel <bjorn.topel@intel.com>

Add i40e_16b_rx_wb_qw0 and raw structs to i40e_16byte_rx_desc, to allow
access both as 16-byte descriptor, and as raw data.

Signed-off-by: Björn Töpel <bjorn.topel@intel.com>
Signed-off-by: Michal Jaron <michalx.jaron@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_type.h | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index fe47f00ec9..83cf701fb4 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -775,7 +775,7 @@ union i40e_16byte_rx_desc {
 		__le64 hdr_addr; /* Header buffer address */
 	} read;
 	struct {
-		struct {
+		struct i40e_16b_rx_wb_qw0 {
 			struct {
 				union {
 					__le16 mirroring_status;
@@ -794,6 +794,9 @@ union i40e_16byte_rx_desc {
 			__le64 status_error_len;
 		} qword1;
 	} wb;  /* writeback */
+	struct {
+		u64 qword[2];
+	} raw;
 };
 
 union i40e_32byte_rx_desc {
-- 
2.43.5

[PATCH v1 19/30] net/i40e/base: align registers to the specification

[Anatoly Burakov]

From: Michal Nowak <michal2.nowak@intel.com>

The I40E_PFPM_APM, I40E_PFPM_WUC, I40E_PFPM_WUFC, and I40E_PFPM_WUS should
read bits per PF.

Signed-off-by: Michal Nowak <michal2.nowak@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_register.h | 8 ++++----
 drivers/net/i40e/i40e_regs.h          | 8 ++++----
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_register.h b/drivers/net/i40e/base/i40e_register.h
index 55f671c3c5..f440f0cbd1 100644
--- a/drivers/net/i40e/base/i40e_register.h
+++ b/drivers/net/i40e/base/i40e_register.h
@@ -3072,17 +3072,17 @@
 #define I40E_GLPM_WUMC_RESERVED_4_MASK    I40E_MASK(0x1FFF, I40E_GLPM_WUMC_RESERVED_4_SHIFT)
 #define I40E_GLPM_WUMC_MNG_WU_PF_SHIFT    16
 #define I40E_GLPM_WUMC_MNG_WU_PF_MASK     I40E_MASK(0xFFFF, I40E_GLPM_WUMC_MNG_WU_PF_SHIFT)
-#define I40E_PFPM_APM            0x000B8080 /* Reset: POR */
+#define I40E_PFPM_APM(_PF)       (0x000B8080 + ((_PF) * 4)) /* Reset: POR */
 #define I40E_PFPM_APM_APME_SHIFT 0
 #define I40E_PFPM_APM_APME_MASK  I40E_MASK(0x1, I40E_PFPM_APM_APME_SHIFT)
 #define I40E_PFPM_FHFT_LENGTH(_i)          (0x0006A000 + ((_i) * 128)) /* _i=0...7 */ /* Reset: POR */
 #define I40E_PFPM_FHFT_LENGTH_MAX_INDEX    7
 #define I40E_PFPM_FHFT_LENGTH_LENGTH_SHIFT 0
 #define I40E_PFPM_FHFT_LENGTH_LENGTH_MASK  I40E_MASK(0xFF, I40E_PFPM_FHFT_LENGTH_LENGTH_SHIFT)
-#define I40E_PFPM_WUC                 0x0006B200 /* Reset: POR */
+#define I40E_PFPM_WUC(_PF)            (0x0006B200 + ((_PF) * 4)) /* Reset: POR */
 #define I40E_PFPM_WUC_EN_APM_D0_SHIFT 5
 #define I40E_PFPM_WUC_EN_APM_D0_MASK  I40E_MASK(0x1, I40E_PFPM_WUC_EN_APM_D0_SHIFT)
-#define I40E_PFPM_WUFC                 0x0006B400 /* Reset: POR */
+#define I40E_PFPM_WUFC(_PF)            (0x0006B400 + ((_PF) * 4)) /* Reset: POR */
 #define I40E_PFPM_WUFC_LNKC_SHIFT      0
 #define I40E_PFPM_WUFC_LNKC_MASK       I40E_MASK(0x1, I40E_PFPM_WUFC_LNKC_SHIFT)
 #define I40E_PFPM_WUFC_MAG_SHIFT       1
@@ -3123,7 +3123,7 @@
 #define I40E_PFPM_WUFC_FLX7_MASK       I40E_MASK(0x1, I40E_PFPM_WUFC_FLX7_SHIFT)
 #define I40E_PFPM_WUFC_FW_RST_WK_SHIFT 31
 #define I40E_PFPM_WUFC_FW_RST_WK_MASK  I40E_MASK(0x1, I40E_PFPM_WUFC_FW_RST_WK_SHIFT)
-#define I40E_PFPM_WUS                  0x0006B600 /* Reset: POR */
+#define I40E_PFPM_WUS(_PF)             (0x0006B600 + ((_PF) * 4)) /* Reset: POR */
 #define I40E_PFPM_WUS_LNKC_SHIFT       0
 #define I40E_PFPM_WUS_LNKC_MASK        I40E_MASK(0x1, I40E_PFPM_WUS_LNKC_SHIFT)
 #define I40E_PFPM_WUS_MAG_SHIFT        1
diff --git a/drivers/net/i40e/i40e_regs.h b/drivers/net/i40e/i40e_regs.h
index e6f8866e9f..35ff12f1f7 100644
--- a/drivers/net/i40e/i40e_regs.h
+++ b/drivers/net/i40e/i40e_regs.h
@@ -339,9 +339,9 @@ static const struct i40e_reg_info i40e_regs_others[] = {
 	{I40E_GLLAN_TSOMSK_L, 0, 0, 0, 0, "GLLAN_TSOMSK_L"},
 	{I40E_GL_RDPU_CNTRL, 0, 0, 0, 0, "GL_RDPU_CNTRL"},
 	{I40E_PFPM_FHFT_LENGTH(0), 7, 128, 0, 0, "PFPM_FHFT_LENGTH"},
-	{I40E_PFPM_WUC, 0, 0, 0, 0, "PFPM_WUC"},
-	{I40E_PFPM_WUFC, 0, 0, 0, 0, "PFPM_WUFC"},
-	{I40E_PFPM_WUS, 0, 0, 0, 0, "PFPM_WUS"},
+	{I40E_PFPM_WUC(0), 0, 0, 0, 0, "PFPM_WUC"},
+	{I40E_PFPM_WUFC(0), 0, 0, 0, 0, "PFPM_WUFC"},
+	{I40E_PFPM_WUS(0), 0, 0, 0, 0, "PFPM_WUS"},
 	{I40E_PRTPM_FHFHR, 0, 0, 0, 0, "PRTPM_FHFHR"},
 	{I40E_GLPM_WUMC, 0, 0, 0, 0, "GLPM_WUMC"},
 	{I40E_VPLAN_QTABLE(0, 0), 15, 1024, 127, 4, "VPLAN_QTABLE"},
@@ -524,7 +524,7 @@ static const struct i40e_reg_info i40e_regs_others[] = {
 	{I40E_MNGSB_WDATA, 0, 0, 0, 0, "MNGSB_WDATA"},
 	{I40E_MNGSB_RHDR0, 0, 0, 0, 0, "MNGSB_RHDR0"},
 	{I40E_MNGSB_RDATA, 0, 0, 0, 0, "MNGSB_RDATA"},
-	{I40E_PFPM_APM, 0, 0, 0, 0, "PFPM_APM"},
+	{I40E_PFPM_APM(0), 0, 0, 0, 0, "PFPM_APM"},
 	{I40E_PRTGEN_STATUS, 0, 0, 0, 0, "PRTGEN_STATUS"},
 	{I40E_PRTGEN_CNF, 0, 0, 0, 0, "PRTGEN_CNF"},
 	{I40E_PRTPM_GC, 0, 0, 0, 0, "PRTPM_GC"},
-- 
2.43.5

[PATCH v1 20/30] net/i40e/base: add PHY debug register dump

[Anatoly Burakov]

From: Radoslaw Tyl <radoslawx.tyl@intel.com>

Add definitions for register dump for some PHY registers in order to
assist field debugging of link issues.

Signed-off-by: Radoslaw Tyl <radoslawx.tyl@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_register.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/net/i40e/base/i40e_register.h b/drivers/net/i40e/base/i40e_register.h
index f440f0cbd1..e8372575e4 100644
--- a/drivers/net/i40e/base/i40e_register.h
+++ b/drivers/net/i40e/base/i40e_register.h
@@ -1414,6 +1414,13 @@
 #define I40E_PRTMAC_PCS_LINK_STATUS1_LINK_SPEED_SHIFT 24
 #define I40E_PRTMAC_PCS_LINK_STATUS1_LINK_SPEED_MASK \
 	I40E_MASK(0x7, I40E_PRTMAC_PCS_LINK_STATUS1_LINK_SPEED_SHIFT)
+#define I40E_PRTMAC_PCS_LINK_STATUS2			0x0008C220
+#define I40E_PRTMAC_PCS_LINK_CTRL			0x0008C260
+#define I40E_PRTMAC_PCS_XGMII_FIFO_STATUS		0x0008C320
+#define I40E_PRTMAC_PCS_AN_LP_STATUS			0x0008C680
+#define I40E_PRTMAC_PCS_KR_STATUS			0x0008CA00
+#define I40E_PRTMAC_PCS_FEC_KR_STATUS1			0x0008CC20
+#define I40E_PRTMAC_PCS_FEC_KR_STATUS2			0x0008CC40
 #define I40E_GL_FWRESETCNT                  0x00083100 /* Reset: POR */
 #define I40E_GL_FWRESETCNT_FWRESETCNT_SHIFT 0
 #define I40E_GL_FWRESETCNT_FWRESETCNT_MASK  I40E_MASK(0xFFFFFFFF, I40E_GL_FWRESETCNT_FWRESETCNT_SHIFT)
-- 
2.43.5

[PATCH v1 21/30] net/i40e/base: make register dump read-only

[Anatoly Burakov]

From: Radoslaw Tyl <radoslawx.tyl@intel.com>

Currently, when registers are dumped, the data inside them is changed, so
repeated dumps lead to unexpected results. Fix this by making register list
read-only.

Signed-off-by: Radoslaw Tyl <radoslawx.tyl@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_diag.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_diag.c b/drivers/net/i40e/base/i40e_diag.c
index b3c4cfd3aa..4ca102cdd5 100644
--- a/drivers/net/i40e/base/i40e_diag.c
+++ b/drivers/net/i40e/base/i40e_diag.c
@@ -55,7 +55,7 @@ static enum i40e_status_code i40e_diag_reg_pattern_test(struct i40e_hw *hw,
 	return I40E_SUCCESS;
 }
 
-static struct i40e_diag_reg_test_info i40e_reg_list[] = {
+static const struct i40e_diag_reg_test_info i40e_reg_list[] = {
 	/* offset               mask         elements   stride */
 	{I40E_QTX_CTL(0),       0x0000FFBF, 1, I40E_QTX_CTL(1) - I40E_QTX_CTL(0)},
 	{I40E_PFINT_ITR0(0),    0x00000FFF, 3, I40E_PFINT_ITR0(1) - I40E_PFINT_ITR0(0)},
@@ -81,28 +81,28 @@ enum i40e_status_code i40e_diag_reg_test(struct i40e_hw *hw)
 {
 	enum i40e_status_code ret_code = I40E_SUCCESS;
 	u32 reg, mask;
+	u32 elements;
 	u32 i, j;
 
 	for (i = 0; i40e_reg_list[i].offset != 0 &&
 					     ret_code == I40E_SUCCESS; i++) {
 
+		elements = i40e_reg_list[i].elements;
 		/* set actual reg range for dynamically allocated resources */
 		if (i40e_reg_list[i].offset == I40E_QTX_CTL(0) &&
 		    hw->func_caps.num_tx_qp != 0)
-			i40e_reg_list[i].elements = hw->func_caps.num_tx_qp;
+			elements = hw->func_caps.num_tx_qp;
 		if ((i40e_reg_list[i].offset == I40E_PFINT_ITRN(0, 0) ||
 		     i40e_reg_list[i].offset == I40E_PFINT_ITRN(1, 0) ||
 		     i40e_reg_list[i].offset == I40E_PFINT_ITRN(2, 0) ||
 		     i40e_reg_list[i].offset == I40E_QINT_TQCTL(0) ||
 		     i40e_reg_list[i].offset == I40E_QINT_RQCTL(0)) &&
 		    hw->func_caps.num_msix_vectors != 0)
-			i40e_reg_list[i].elements =
-				hw->func_caps.num_msix_vectors - 1;
+			elements = hw->func_caps.num_msix_vectors - 1;
 
 		/* test register access */
 		mask = i40e_reg_list[i].mask;
-		for (j = 0; j < i40e_reg_list[i].elements &&
-			    ret_code == I40E_SUCCESS; j++) {
+		for (j = 0; j < elements && ret_code == I40E_SUCCESS; j++) {
 			reg = i40e_reg_list[i].offset
 				+ (j * i40e_reg_list[i].stride);
 			ret_code = i40e_diag_reg_pattern_test(hw, reg, mask);
-- 
2.43.5

[PATCH v1 22/30] net/i40e/base: fix unchecked return value

[Anatoly Burakov]

From: Barbara Skobiej <barbara.skobiej@intel.com>

Static analysis tools have reported an unchecked return value warning.
Address the warning by checking return value.

Signed-off-by: Barbara Skobiej <barbara.skobiej@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_common.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index 416f31dcc3..07e18deaea 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -4215,8 +4215,8 @@ STATIC void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
 		/* use AQ read to get the physical register offset instead
 		 * of the port relative offset
 		 */
-		i40e_aq_debug_read_register(hw, port_cfg_reg, &port_cfg, NULL);
-		if (!(port_cfg & I40E_PRTGEN_CNF_PORT_DIS_MASK))
+		status = i40e_aq_debug_read_register(hw, port_cfg_reg, &port_cfg, NULL);
+		if ((status == I40E_SUCCESS) && (!(port_cfg & I40E_PRTGEN_CNF_PORT_DIS_MASK)))
 			hw->num_ports++;
 	}
 
-- 
2.43.5

[PATCH v1 23/30] net/i40e/base: check loop bounds

[Anatoly Burakov]

From: Barbara Skobiej <barbara.skobiej@intel.com>

An unchecked value used as a loop bound. Add verification if value of
'next_to_clean' variable is greater than 2^10 (next_to_clean is 10 bits).

Also, refactored loop so that it reads the head value only once, and also
checks if head is invalid.

Signed-off-by: Barbara Skobiej <barbara.skobiej@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_adminq.c | 19 +++++++++++++++++--
 1 file changed, 17 insertions(+), 2 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_adminq.c b/drivers/net/i40e/base/i40e_adminq.c
index b670250180..350288269b 100644
--- a/drivers/net/i40e/base/i40e_adminq.c
+++ b/drivers/net/i40e/base/i40e_adminq.c
@@ -745,12 +745,26 @@ u16 i40e_clean_asq(struct i40e_hw *hw)
 	u16 ntc = asq->next_to_clean;
 	struct i40e_aq_desc desc_cb;
 	struct i40e_aq_desc *desc;
+	u32 head = 0;
+
+	if (ntc >= (1 << 10))
+		goto clean_asq_exit;
 
 	desc = I40E_ADMINQ_DESC(*asq, ntc);
 	details = I40E_ADMINQ_DETAILS(*asq, ntc);
-	while (rd32(hw, hw->aq.asq.head) != ntc) {
+	while (true) {
+		head = rd32(hw, hw->aq.asq.head);
+
+		if (head >= asq->count) {
+			i40e_debug(hw, I40E_DEBUG_AQ_COMMAND, "Read head value is improper\n");
+			return 0;
+		}
+
+		if (head == ntc)
+			break;
+
 		i40e_debug(hw, I40E_DEBUG_AQ_COMMAND,
-			   "ntc %d head %d.\n", ntc, rd32(hw, hw->aq.asq.head));
+			   "ntc %d head %d.\n", ntc, head);
 
 		if (details->callback) {
 			I40E_ADMINQ_CALLBACK cb_func =
@@ -770,6 +784,7 @@ u16 i40e_clean_asq(struct i40e_hw *hw)
 
 	asq->next_to_clean = ntc;
 
+clean_asq_exit:
 	return I40E_DESC_UNUSED(asq);
 }
 
-- 
2.43.5

[PATCH v1 24/30] net/i40e/base: make semaphore timeout 32-bit

[Anatoly Burakov]

From: Aleksandr Loktionov <aleksandr.loktionov@intel.com>

Decrease hw_semaphore_timeout size down to 32bits, because FW
I40E_GLVFGEN_TIMER register is 32bits only anyway, and having both
variables as same 32-bit size simplifies code. Also, fix FW write semaphore
expiration condition, taking into account that I40E_GLVFGEN_TIMER wraps,
by checking the sign of substraction of two 32 bit vaues.

Signed-off-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_nvm.c  | 8 ++++----
 drivers/net/i40e/base/i40e_type.h | 2 +-
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_nvm.c b/drivers/net/i40e/base/i40e_nvm.c
index 05816a4b79..c0f40691f3 100644
--- a/drivers/net/i40e/base/i40e_nvm.c
+++ b/drivers/net/i40e/base/i40e_nvm.c
@@ -61,7 +61,7 @@ enum i40e_status_code i40e_acquire_nvm(struct i40e_hw *hw,
 				       enum i40e_aq_resource_access_type access)
 {
 	enum i40e_status_code ret_code = I40E_SUCCESS;
-	u64 gtime, timeout;
+	u32 gtime, timeout;
 	u64 time_left = 0;
 
 	DEBUGFUNC("i40e_acquire_nvm");
@@ -85,7 +85,7 @@ enum i40e_status_code i40e_acquire_nvm(struct i40e_hw *hw,
 	if (ret_code && time_left) {
 		/* Poll until the current NVM owner timeouts */
 		timeout = I40E_MS_TO_GTIME(I40E_MAX_NVM_TIMEOUT) + gtime;
-		while ((gtime < timeout) && time_left) {
+		while ((s32)(gtime - timeout) < 0 && time_left) {
 			i40e_msec_delay(10);
 			gtime = rd32(hw, I40E_GLVFGEN_TIMER);
 			ret_code = i40e_aq_request_resource(hw,
@@ -1301,9 +1301,9 @@ STATIC enum i40e_status_code i40e_nvmupd_state_writing(struct i40e_hw *hw,
 		u32 gtime;
 
 		gtime = rd32(hw, I40E_GLVFGEN_TIMER);
-		if (gtime >= hw->nvm.hw_semaphore_timeout) {
+		if ((s32)(gtime - hw->nvm.hw_semaphore_timeout) >= 0) {
 			i40e_debug(hw, I40E_DEBUG_ALL,
-				   "NVMUPD: write semaphore expired (%d >= %" PRIu64 "), retrying\n",
+				   "NVMUPD: write semaphore expired (%d >= %" PRIu32 "), retrying\n",
 				   gtime, hw->nvm.hw_semaphore_timeout);
 			i40e_release_nvm(hw);
 			status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);
diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index 83cf701fb4..2d5afb99dd 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -443,7 +443,7 @@ enum i40e_aq_resource_access_type {
 };
 
 struct i40e_nvm_info {
-	u64 hw_semaphore_timeout; /* usec global time (GTIME resolution) */
+	u32 hw_semaphore_timeout; /* usec global time (GTIME resolution) */
 	u32 timeout;              /* [ms] */
 	u16 sr_size;              /* Shadow RAM size in words */
 	bool blank_nvm_mode;      /* is NVM empty (no FW present)*/
-- 
2.43.5

[PATCH v1 25/30] net/i40e/base: add register definitions for FLU

[Anatoly Burakov]

From: Piotr Skajewski <piotrx.skajewski@intel.com>

These registers are relevant to MAC source pruning feature.

Signed-off-by: Piotr Skajewski <piotrx.skajewski@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_register.h | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/net/i40e/base/i40e_register.h b/drivers/net/i40e/base/i40e_register.h
index e8372575e4..beac70f8d6 100644
--- a/drivers/net/i40e/base/i40e_register.h
+++ b/drivers/net/i40e/base/i40e_register.h
@@ -2049,6 +2049,14 @@
 #define I40E_PRTPM_TLPIC              0x001E43C0 /* Reset: GLOBR */
 #define I40E_PRTPM_TLPIC_ETLPIC_SHIFT 0
 #define I40E_PRTPM_TLPIC_ETLPIC_MASK  I40E_MASK(0xFFFFFFFF, I40E_PRTPM_TLPIC_ETLPIC_SHIFT)
+#define I40E_GL_PRE_FLU_MSK_PH1_H(_i)             (0x00269F20 + ((_i) * 4)) /* _i=0...6 */ /* Reset: CORER */
+#define I40E_GL_PRE_FLU_MSK_PH1_H_MAX_INDEX       6
+#define I40E_GL_PRE_FLU_MSK_PH1_H_MASK_HIGH_SHIFT 0
+#define I40E_GL_PRE_FLU_MSK_PH1_H_MASK_HIGH_MASK  I40E_MASK(0xFFFF, I40E_GL_PRE_FLU_MSK_PH1_H_MASK_HIGH_SHIFT)
+#define I40E_GL_PRE_FLU_MSK_PH1_L(_i)            (0x00269EE0 + ((_i) * 4)) /* _i=0...6 */ /* Reset: CORER */
+#define I40E_GL_PRE_FLU_MSK_PH1_L_MAX_INDEX      6
+#define I40E_GL_PRE_FLU_MSK_PH1_L_MASK_LOW_SHIFT 0
+#define I40E_GL_PRE_FLU_MSK_PH1_L_MASK_LOW_MASK  I40E_MASK(0xFFFFFFFF, I40E_GL_PRE_FLU_MSK_PH1_L_MASK_LOW_SHIFT)
 #define I40E_GL_PRS_FVBM(_i)                 (0x00269760 + ((_i) * 4)) /* _i=0...3 */ /* Reset: CORER */
 #define I40E_GL_PRS_FVBM_MAX_INDEX           3
 #define I40E_GL_PRS_FVBM_FV_BYTE_INDX_SHIFT  0
-- 
2.43.5

[PATCH v1 26/30] net/i40e/base: add NVM acquire with custom timeout

[Anatoly Burakov]

From: Midde Ajijur Rehaman <ajijurx.rehaman.midde@intel.com>

On some platforms, during NVM update the adapter is getting disabled for
long time due to lock in OID_INTEL_FLASH_INFO. At this time, access to
NVM is locked by the tool that updates NVM. As result, driver is unable to
access NVM and it should timeout quickly. This patch adds custom timeout
for that case.

Signed-off-by: Midde Ajijur Rehaman <ajijurx.rehaman.midde@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_nvm.c       | 95 ++++++++++++++++++++++++++
 drivers/net/i40e/base/i40e_prototype.h |  5 ++
 2 files changed, 100 insertions(+)

diff --git a/drivers/net/i40e/base/i40e_nvm.c b/drivers/net/i40e/base/i40e_nvm.c
index c0f40691f3..2f6cd9eda5 100644
--- a/drivers/net/i40e/base/i40e_nvm.c
+++ b/drivers/net/i40e/base/i40e_nvm.c
@@ -110,6 +110,75 @@ enum i40e_status_code i40e_acquire_nvm(struct i40e_hw *hw,
 	return ret_code;
 }
 
+
+/**
+ * i40e_acquire_nvm_ex - Specific request only for
+ * OID_INTEL_FLASH_INFO_TIMEOUT for acquiring the NVM ownership
+ * @hw: pointer to the HW structure
+ * @access: NVM access type (read or write)
+ * @custom_timeout: timeout for aquire NVM (read)
+ *
+ * This function will request NVM ownership for reading
+ * via the proper Admin Command.
+ **/
+
+enum i40e_status_code i40e_acquire_nvm_ex(struct i40e_hw *hw,
+				       enum i40e_aq_resource_access_type access,
+					   u32 custom_timeout)
+{
+	enum i40e_status_code ret_code = I40E_SUCCESS;
+	u64 gtime, timeout;
+	u64 time_left = 0;
+
+	DEBUGFUNC("i40e_acquire_nvm");
+
+	if (hw->nvm.blank_nvm_mode)
+		goto i40e_i40e_acquire_nvm_exit;
+
+	ret_code = i40e_aq_request_resource(hw, I40E_NVM_RESOURCE_ID, access,
+					    0, &time_left, NULL);
+	/* Reading the Global Device Timer */
+	gtime = rd32(hw, I40E_GLVFGEN_TIMER);
+
+	/* Store the timeout */
+	hw->nvm.hw_semaphore_timeout = I40E_MS_TO_GTIME(time_left) + gtime;
+
+	if (ret_code)
+		i40e_debug(hw, I40E_DEBUG_NVM,
+			   "NVM acquire type %d failed time_left=%llu ret=%d aq_err=%d\n",
+			   access, (unsigned long long)time_left, ret_code,
+			   hw->aq.asq_last_status);
+
+	if (ret_code && time_left) {
+		/* Poll until the current NVM owner timeouts */
+		timeout = I40E_MS_TO_GTIME(custom_timeout) + gtime;
+		while ((gtime < timeout) && time_left) {
+			i40e_msec_delay(10);
+			gtime = rd32(hw, I40E_GLVFGEN_TIMER);
+			ret_code = i40e_aq_request_resource(hw,
+							I40E_NVM_RESOURCE_ID,
+							access, 0, &time_left,
+							NULL);
+			if (ret_code == I40E_SUCCESS) {
+				hw->nvm.hw_semaphore_timeout =
+					    I40E_MS_TO_GTIME(time_left) + gtime;
+				break;
+			}
+		}
+		if (ret_code != I40E_SUCCESS) {
+			hw->nvm.hw_semaphore_timeout = 0;
+			i40e_debug(hw, I40E_DEBUG_NVM,
+				   "NVM acquire timed out, wait %llu ms before trying again. status=%d aq_err=%d\n",
+				   (unsigned long long)time_left, ret_code,
+				   hw->aq.asq_last_status);
+		}
+	}
+
+i40e_i40e_acquire_nvm_exit:
+	return ret_code;
+}
+
+
 /**
  * i40e_release_nvm - Generic request for releasing the NVM ownership
  * @hw: pointer to the HW structure
@@ -339,6 +408,32 @@ enum i40e_status_code i40e_read_nvm_word(struct i40e_hw *hw, u16 offset,
 	return ret_code;
 }
 
+/**
+ * i40e_read_nvm_word_ex - Specific request only for
+ * OID_INTEL_FLASH_INFO_TIMEOUT for Reads NVM word, acquires lock if necessary
+ * @hw: pointer to the HW structure
+ * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
+ * @data: word read from the Shadow RAM
+ * @custom_timeout: timeout for aquire NVM (read)
+ *
+ * Reads one 16 bit word from the Shadow RAM.
+ **/
+enum i40e_status_code i40e_read_nvm_word_ex(struct i40e_hw *hw, u16 offset,
+					 u16 *data, u32 custom_timeout)
+{
+	enum i40e_status_code ret_code = I40E_SUCCESS;
+
+	if (hw->flags & I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK)
+		ret_code = i40e_acquire_nvm_ex(hw, I40E_RESOURCE_READ, custom_timeout);
+
+	if (ret_code)
+		return ret_code;
+	ret_code = __i40e_read_nvm_word(hw, offset, data);
+	if (hw->flags & I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK)
+		i40e_release_nvm(hw);
+	return ret_code;
+}
+
 /**
  * i40e_read_nvm_module_data - Reads NVM Buffer to specified memory location
  * @hw: Pointer to the HW structure
diff --git a/drivers/net/i40e/base/i40e_prototype.h b/drivers/net/i40e/base/i40e_prototype.h
index 745b9709c5..440e713a28 100644
--- a/drivers/net/i40e/base/i40e_prototype.h
+++ b/drivers/net/i40e/base/i40e_prototype.h
@@ -464,9 +464,14 @@ enum i40e_aq_link_speed i40e_get_link_speed(struct i40e_hw *hw);
 enum i40e_status_code i40e_init_nvm(struct i40e_hw *hw);
 enum i40e_status_code i40e_acquire_nvm(struct i40e_hw *hw,
 				      enum i40e_aq_resource_access_type access);
+enum i40e_status_code i40e_acquire_nvm_ex(struct i40e_hw *hw,
+				       enum i40e_aq_resource_access_type access,
+					   u32 custom_timeout);
 void i40e_release_nvm(struct i40e_hw *hw);
 enum i40e_status_code i40e_read_nvm_word(struct i40e_hw *hw, u16 offset,
 					 u16 *data);
+enum i40e_status_code i40e_read_nvm_word_ex(struct i40e_hw *hw, u16 offset,
+					 u16 *data, u32 custom_timeout);
 enum i40e_status_code
 i40e_read_nvm_module_data(struct i40e_hw *hw, u8 module_ptr, u16 module_offset,
 			  u16 data_offset, u16 words_data_size, u16 *data_ptr);
-- 
2.43.5

[PATCH v1 27/30] net/i40e/base: change time variables from 64 bit to 32 bit

[Anatoly Burakov]

From: Jaroslaw Ilgiewicz <jaroslaw.ilgiewicz@intel.com>

Time variables were designed for 32 bit and 64 bit variables are not
necessary. Changed all to 32 bit.

Signed-off-by: Jaroslaw Ilgiewicz <jaroslaw.ilgiewicz@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_common.c    | 2 +-
 drivers/net/i40e/base/i40e_nvm.c       | 6 +++---
 drivers/net/i40e/base/i40e_prototype.h | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index 07e18deaea..a2cfafeda9 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -3596,7 +3596,7 @@ enum i40e_status_code i40e_aq_debug_write_register(struct i40e_hw *hw,
 enum i40e_status_code i40e_aq_request_resource(struct i40e_hw *hw,
 				enum i40e_aq_resources_ids resource,
 				enum i40e_aq_resource_access_type access,
-				u8 sdp_number, u64 *timeout,
+				u8 sdp_number, u32 *timeout,
 				struct i40e_asq_cmd_details *cmd_details)
 {
 	struct i40e_aq_desc desc;
diff --git a/drivers/net/i40e/base/i40e_nvm.c b/drivers/net/i40e/base/i40e_nvm.c
index 2f6cd9eda5..185af67817 100644
--- a/drivers/net/i40e/base/i40e_nvm.c
+++ b/drivers/net/i40e/base/i40e_nvm.c
@@ -62,7 +62,7 @@ enum i40e_status_code i40e_acquire_nvm(struct i40e_hw *hw,
 {
 	enum i40e_status_code ret_code = I40E_SUCCESS;
 	u32 gtime, timeout;
-	u64 time_left = 0;
+	u32 time_left = 0;
 
 	DEBUGFUNC("i40e_acquire_nvm");
 
@@ -127,8 +127,8 @@ enum i40e_status_code i40e_acquire_nvm_ex(struct i40e_hw *hw,
 					   u32 custom_timeout)
 {
 	enum i40e_status_code ret_code = I40E_SUCCESS;
-	u64 gtime, timeout;
-	u64 time_left = 0;
+	u32 gtime, timeout;
+	u32 time_left = 0;
 
 	DEBUGFUNC("i40e_acquire_nvm");
 
diff --git a/drivers/net/i40e/base/i40e_prototype.h b/drivers/net/i40e/base/i40e_prototype.h
index 440e713a28..e7e6d4c427 100644
--- a/drivers/net/i40e/base/i40e_prototype.h
+++ b/drivers/net/i40e/base/i40e_prototype.h
@@ -233,7 +233,7 @@ enum i40e_status_code i40e_aq_set_switch_config(struct i40e_hw *hw,
 enum i40e_status_code i40e_aq_request_resource(struct i40e_hw *hw,
 				enum i40e_aq_resources_ids resource,
 				enum i40e_aq_resource_access_type access,
-				u8 sdp_number, u64 *timeout,
+				u8 sdp_number, u32 *timeout,
 				struct i40e_asq_cmd_details *cmd_details);
 enum i40e_status_code i40e_aq_release_resource(struct i40e_hw *hw,
 				enum i40e_aq_resources_ids resource,
-- 
2.43.5

[PATCH v1 28/30] net/i40e/base: add trace buffer reading dependencies

[Anatoly Burakov]

From: Jedrzej Jagielski <jedrzej.jagielski@intel.com>

Some driver versions need to use "Read alternate - Indirect" command
in order to get the content of trace buffer. This patch adds a couple of
defines related to that functionality.

Signed-off-by: Jedrzej Jagielski <jedrzej.jagielski@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_type.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index 2d5afb99dd..5d59446d96 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -1910,6 +1910,10 @@ struct i40e_lldp_variables {
 #define I40E_ALT_BW_RELATIVE_MASK	0x40000000
 #define I40E_ALT_BW_VALID_MASK		0x80000000
 
+/* Alternate Ram Trace Buffer*/
+#define I40E_ALT_CANARY			0xABCDEFAB
+#define I40E_ALT_BUFF_DWORD_SIZE	0x14 /* in dwords */
+
 /* RSS Hash Table Size */
 #define I40E_PFQF_CTL_0_HASHLUTSIZE_512	0x00010000
 
-- 
2.43.5

[PATCH v1 29/30] net/i40e/base: add Shadow RAM pointer definition

[Anatoly Burakov]

From: Bartosz Jakub Rosadzinski <bartosz.jakub.rosadzinski@intel.com>

This commit introduces a definition of the 5th Free Provisioning Area
pointer in Shadow RAM. 5th PFA is used during NVM update for storing
X710-T2L/X710-T4L's Phy Firmware.

Signed-off-by: Bartosz Jakub Rosadzinski <bartosz.jakub.rosadzinski@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_type.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index 5d59446d96..7cc746f82f 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -1554,6 +1554,7 @@ struct i40e_hw_port_stats {
 #define I40E_SR_FEATURE_CONFIGURATION_PTR	0x49
 #define I40E_SR_CONFIGURATION_METADATA_PTR	0x4D
 #define I40E_SR_IMMEDIATE_VALUES_PTR		0x4E
+#define I40E_SR_5TH_FREE_PROVISION_AREA_PTR	0x50
 #define I40E_SR_PRESERVATION_RULES_PTR		0x70
 #define I40E_X722_SR_5TH_FREE_PROVISION_AREA_PTR	0x71
 #define I40E_SR_6TH_FREE_PROVISION_AREA_PTR	0x71
-- 
2.43.5

[PATCH v1 30/30] net/i40e: update base driver README

[Anatoly Burakov]

Update README with the date of when the latest snapshot was generated.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/README | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/net/i40e/base/README b/drivers/net/i40e/base/README
index 2e4fa5a921..c40573e62e 100644
--- a/drivers/net/i40e/base/README
+++ b/drivers/net/i40e/base/README
@@ -1,12 +1,12 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2017-2020 Intel Corporation
+ * Copyright(c) 2017-2024 Intel Corporation
  */
 
 Intel® I40E driver
 ==================
 
-This directory contains source code of FreeBSD i40e driver of version
-cid-i40e.2021.08.16.tar.gz released by the team which develops
+This directory contains source code of FreeBSD i40e driver generated on
+2024-08-30 released by the team which develops
 basic drivers for any i40e NIC. The directory of base/ contains the
 original source package.
 This driver is valid for the product(s) listed below
-- 
2.43.5

Re: [PATCH v1 00/30] Update net/i40e base driver

[Bruce Richardson]

On Mon, Sep 02, 2024 at 10:54:12AM +0100, Anatoly Burakov wrote:
> Update the i40e base driver to the latest version of the snapshot.
> 
Series-acked-by: Bruce Richardson <bruce.richardson@intel.com>

On apply I tagged a few more patches as bugfixes (including fixes line) for
backport to the older LTS releases.

Applied to dpdk-next-net-intel.

Thanks,
/Bruce