From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C9366458CD; Mon, 2 Sep 2024 11:57:54 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C323440DF6; Mon, 2 Sep 2024 11:55:47 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) by mails.dpdk.org (Postfix) with ESMTP id E0C1E40678 for ; Mon, 2 Sep 2024 11:55:24 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1725270925; x=1756806925; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=K1GMk+8w99CIOWYA7l3KZyrfI4BfB480bPDjfdtmROA=; b=Xmu7GZej4wwlrHSjj+BDkfCrCz7uCsol75IENgjB+QChtwZvO2KJcZsQ 4o8zWbgPKhomkBNPTo8BF/uCPdfaEMg005PKWhZew/9lZeOo3ItLfic0e maRm4Ofwo0yfEiwM7ib8I+ggkkux1701D/H2NoYCqv+i84fHs4x8+azAW z4UetqJUKjmCrGojMXCcMObMN2QlZtGuw1/xcfXj2wr73JCl4tZEUjsEi xPFjLM0XfSuIw2AZxbdcQIHczqYp0i7qvvwTjeRYJIEiLpF6IF+O2/iFr Gu6QPSFLsGYqXb2CXKdZxFhVrdSi1FTz9Uu1GcCNWuikJQw101FHPsObm w==; X-CSE-ConnectionGUID: F69gptpnRv6Udivxe1d95g== X-CSE-MsgGUID: QUlS82GcSDSR4d184AQcLg== X-IronPort-AV: E=McAfee;i="6700,10204,11182"; a="26747254" X-IronPort-AV: E=Sophos;i="6.10,195,1719903600"; d="scan'208";a="26747254" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2024 02:55:24 -0700 X-CSE-ConnectionGUID: ioEvABleRESTH430qrBT5g== X-CSE-MsgGUID: o7JtQlorRymW2UWT1F/XiA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,195,1719903600"; d="scan'208";a="64598011" Received: from silpixa00401119.ir.intel.com ([10.55.129.167]) by fmviesa009.fm.intel.com with ESMTP; 02 Sep 2024 02:55:23 -0700 From: Anatoly Burakov To: dev@dpdk.org Cc: bruce.richardson@intel.com Subject: [PATCH v1 26/30] net/i40e/base: add NVM acquire with custom timeout Date: Mon, 2 Sep 2024 10:54:38 +0100 Message-ID: X-Mailer: git-send-email 2.43.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Midde Ajijur Rehaman On some platforms, during NVM update the adapter is getting disabled for long time due to lock in OID_INTEL_FLASH_INFO. At this time, access to NVM is locked by the tool that updates NVM. As result, driver is unable to access NVM and it should timeout quickly. This patch adds custom timeout for that case. Signed-off-by: Midde Ajijur Rehaman Signed-off-by: Anatoly Burakov --- drivers/net/i40e/base/i40e_nvm.c | 95 ++++++++++++++++++++++++++ drivers/net/i40e/base/i40e_prototype.h | 5 ++ 2 files changed, 100 insertions(+) diff --git a/drivers/net/i40e/base/i40e_nvm.c b/drivers/net/i40e/base/i40e_nvm.c index c0f40691f3..2f6cd9eda5 100644 --- a/drivers/net/i40e/base/i40e_nvm.c +++ b/drivers/net/i40e/base/i40e_nvm.c @@ -110,6 +110,75 @@ enum i40e_status_code i40e_acquire_nvm(struct i40e_hw *hw, return ret_code; } + +/** + * i40e_acquire_nvm_ex - Specific request only for + * OID_INTEL_FLASH_INFO_TIMEOUT for acquiring the NVM ownership + * @hw: pointer to the HW structure + * @access: NVM access type (read or write) + * @custom_timeout: timeout for aquire NVM (read) + * + * This function will request NVM ownership for reading + * via the proper Admin Command. + **/ + +enum i40e_status_code i40e_acquire_nvm_ex(struct i40e_hw *hw, + enum i40e_aq_resource_access_type access, + u32 custom_timeout) +{ + enum i40e_status_code ret_code = I40E_SUCCESS; + u64 gtime, timeout; + u64 time_left = 0; + + DEBUGFUNC("i40e_acquire_nvm"); + + if (hw->nvm.blank_nvm_mode) + goto i40e_i40e_acquire_nvm_exit; + + ret_code = i40e_aq_request_resource(hw, I40E_NVM_RESOURCE_ID, access, + 0, &time_left, NULL); + /* Reading the Global Device Timer */ + gtime = rd32(hw, I40E_GLVFGEN_TIMER); + + /* Store the timeout */ + hw->nvm.hw_semaphore_timeout = I40E_MS_TO_GTIME(time_left) + gtime; + + if (ret_code) + i40e_debug(hw, I40E_DEBUG_NVM, + "NVM acquire type %d failed time_left=%llu ret=%d aq_err=%d\n", + access, (unsigned long long)time_left, ret_code, + hw->aq.asq_last_status); + + if (ret_code && time_left) { + /* Poll until the current NVM owner timeouts */ + timeout = I40E_MS_TO_GTIME(custom_timeout) + gtime; + while ((gtime < timeout) && time_left) { + i40e_msec_delay(10); + gtime = rd32(hw, I40E_GLVFGEN_TIMER); + ret_code = i40e_aq_request_resource(hw, + I40E_NVM_RESOURCE_ID, + access, 0, &time_left, + NULL); + if (ret_code == I40E_SUCCESS) { + hw->nvm.hw_semaphore_timeout = + I40E_MS_TO_GTIME(time_left) + gtime; + break; + } + } + if (ret_code != I40E_SUCCESS) { + hw->nvm.hw_semaphore_timeout = 0; + i40e_debug(hw, I40E_DEBUG_NVM, + "NVM acquire timed out, wait %llu ms before trying again. status=%d aq_err=%d\n", + (unsigned long long)time_left, ret_code, + hw->aq.asq_last_status); + } + } + +i40e_i40e_acquire_nvm_exit: + return ret_code; +} + + /** * i40e_release_nvm - Generic request for releasing the NVM ownership * @hw: pointer to the HW structure @@ -339,6 +408,32 @@ enum i40e_status_code i40e_read_nvm_word(struct i40e_hw *hw, u16 offset, return ret_code; } +/** + * i40e_read_nvm_word_ex - Specific request only for + * OID_INTEL_FLASH_INFO_TIMEOUT for Reads NVM word, acquires lock if necessary + * @hw: pointer to the HW structure + * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF) + * @data: word read from the Shadow RAM + * @custom_timeout: timeout for aquire NVM (read) + * + * Reads one 16 bit word from the Shadow RAM. + **/ +enum i40e_status_code i40e_read_nvm_word_ex(struct i40e_hw *hw, u16 offset, + u16 *data, u32 custom_timeout) +{ + enum i40e_status_code ret_code = I40E_SUCCESS; + + if (hw->flags & I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK) + ret_code = i40e_acquire_nvm_ex(hw, I40E_RESOURCE_READ, custom_timeout); + + if (ret_code) + return ret_code; + ret_code = __i40e_read_nvm_word(hw, offset, data); + if (hw->flags & I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK) + i40e_release_nvm(hw); + return ret_code; +} + /** * i40e_read_nvm_module_data - Reads NVM Buffer to specified memory location * @hw: Pointer to the HW structure diff --git a/drivers/net/i40e/base/i40e_prototype.h b/drivers/net/i40e/base/i40e_prototype.h index 745b9709c5..440e713a28 100644 --- a/drivers/net/i40e/base/i40e_prototype.h +++ b/drivers/net/i40e/base/i40e_prototype.h @@ -464,9 +464,14 @@ enum i40e_aq_link_speed i40e_get_link_speed(struct i40e_hw *hw); enum i40e_status_code i40e_init_nvm(struct i40e_hw *hw); enum i40e_status_code i40e_acquire_nvm(struct i40e_hw *hw, enum i40e_aq_resource_access_type access); +enum i40e_status_code i40e_acquire_nvm_ex(struct i40e_hw *hw, + enum i40e_aq_resource_access_type access, + u32 custom_timeout); void i40e_release_nvm(struct i40e_hw *hw); enum i40e_status_code i40e_read_nvm_word(struct i40e_hw *hw, u16 offset, u16 *data); +enum i40e_status_code i40e_read_nvm_word_ex(struct i40e_hw *hw, u16 offset, + u16 *data, u32 custom_timeout); enum i40e_status_code i40e_read_nvm_module_data(struct i40e_hw *hw, u8 module_ptr, u16 module_offset, u16 data_offset, u16 words_data_size, u16 *data_ptr); -- 2.43.5