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From: "Burakov, Anatoly" <anatoly.burakov@intel.com>
To: "Wangyu (Eric)" <seven.wangyu@huawei.com>, "dev@dpdk.org" <dev@dpdk.org>
Cc: "ferruh.yigit@intel.com" <ferruh.yigit@intel.com>,
	Linuxarm <linuxarm@huawei.com>, "humin (Q)" <humin29@huawei.com>,
	dengxiaofeng <dengxiaofeng@huawei.com>,
	"Liyuan (Larry)" <Larry.T@huawei.com>
Subject: Re: [dpdk-dev] [PATCH v3] bus/pci: resolve multiple NICs address conflicts
Date: Tue, 12 Nov 2019 12:29:23 +0000	[thread overview]
Message-ID: <eb0f230a-b628-2012-5d72-8b82cf615496@intel.com> (raw)
In-Reply-To: <78A93308629D474AA53B84C5879E84D24B1086FB@DGGEMM533-MBX.china.huawei.com>

On 12-Nov-19 2:22 AM, Wangyu (Eric) wrote:
> NIC address conflicts on 64K pagesize when using multiple NICs,
> 
> as system will mmap 64K pagesize for NIC,
> 
> but dev->mem_resource[i].len is 16K.

Suggested rewording:

===
bus/pci: align next mapping address on page boundary

Currently, the next address picked by PCI mapping infrastructure may be 
page-unaligned due to BAR length being smaller than page size. This 
leads to a situation where the requested map address is invalid, 
resulting in mmap() call returning an arbitrary address, which will 
later interfere with device BAR mapping in secondary processes.

Fix it by always aligning the next requested address on page boundary.
===

Also, probably missing Fixes: tag and Cc: stable.

> 
> Signed-off-by: beard-627 <dengxiaofeng@huawei.com>

That's an unconventional name :)

> Signed-off-by: Wangyu (Eric) <seven.wangyu@huawei.com>
> Acked-by: Wei Hu <xavier.huwei@huawei.com>
> Acked-by: Min Hu <humin29@huawei.com>
> ---
>   drivers/bus/pci/linux/pci_uio.c  | 2 ++  drivers/bus/pci/linux/pci_vfio.c | 3 +++
>   2 files changed, 5 insertions(+)
> 
> diff --git a/drivers/bus/pci/linux/pci_uio.c b/drivers/bus/pci/linux/pci_uio.c index 6dca05a..097dc19 100644
> --- a/drivers/bus/pci/linux/pci_uio.c
> +++ b/drivers/bus/pci/linux/pci_uio.c
> @@ -351,6 +351,8 @@
>   	pci_map_addr = RTE_PTR_ADD(mapaddr,
>   			(size_t)dev->mem_resource[res_idx].len);
>   
> +	pci_map_addr = RTE_PTR_ALIGN(pci_map_addr, sysconf(_SC_PAGE_SIZE));
> +
>   	maps[map_idx].phaddr = dev->mem_resource[res_idx].phys_addr;
>   	maps[map_idx].size = dev->mem_resource[res_idx].len;
>   	maps[map_idx].addr = mapaddr;
> diff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c
> index b8faa23..64cd84a 100644
> --- a/drivers/bus/pci/linux/pci_vfio.c
> +++ b/drivers/bus/pci/linux/pci_vfio.c
> @@ -750,6 +750,9 @@
>   		bar_addr = pci_map_addr;
>   		pci_map_addr = RTE_PTR_ADD(bar_addr, (size_t) reg->size);
>   
> +		pci_map_addr = RTE_PTR_ALIGN(pci_map_addr,
> +					sysconf(_SC_PAGE_SIZE));
> +
>   		maps[i].addr = bar_addr;
>   		maps[i].offset = reg->offset;
>   		maps[i].size = reg->size;
> --
> 1.8.3.1
> 
> 

As for contents of this patch (as long as the above is addressed):

Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>

-- 
Thanks,
Anatoly

  parent reply	other threads:[~2019-11-12 12:29 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1573521821-21173-1-git-send-email-dengxiaofeng@huawei.com>
2019-11-12  2:22 ` Wangyu (Eric)
2019-11-12  7:01   ` Gavin Hu (Arm Technology China)
2019-11-12 12:29   ` Burakov, Anatoly [this message]
     [not found] <D3165BB52137B64493C4E18DC69F10D62C8F4B4F@dggemm521-mbx.china.huawei.com>
2019-11-13  3:11 ` [dpdk-dev] 答复: " Wangyu (Eric)

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