From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 03267A3168 for ; Thu, 17 Oct 2019 11:08:58 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5E2121E8E1; Thu, 17 Oct 2019 11:08:57 +0200 (CEST) Received: from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com [67.231.154.164]) by dpdk.org (Postfix) with ESMTP id 6C4B91E882 for ; Thu, 17 Oct 2019 11:08:56 +0200 (CEST) X-Virus-Scanned: Proofpoint Essentials engine Received: from webmail.solarflare.com (uk.solarflare.com [193.34.186.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by mx1-us5.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTPS id CC127580055; Thu, 17 Oct 2019 09:08:54 +0000 (UTC) Received: from [192.168.38.17] (91.220.146.112) by ukex01.SolarFlarecom.com (10.17.10.4) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 17 Oct 2019 10:08:46 +0100 To: , Adrien Mazarguil , Wenzhuo Lu , Jingjing Wu , Bernard Iremonger , John McNamara , Marko Kovacevic , Thomas Monjalon , Ferruh Yigit , Olivier Matz CC: , References: <20191015083201.2310-1-kirankumark@marvell.com> <20191017041550.4075-1-kirankumark@marvell.com> From: Andrew Rybchenko Message-ID: Date: Thu, 17 Oct 2019 12:08:42 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 MIME-Version: 1.0 In-Reply-To: <20191017041550.4075-1-kirankumark@marvell.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-GB X-Originating-IP: [91.220.146.112] X-ClientProxiedBy: ocex03.SolarFlarecom.com (10.20.40.36) To ukex01.SolarFlarecom.com (10.17.10.4) X-TM-AS-Product-Ver: SMEX-12.5.0.1300-8.5.1010-24982.003 X-TM-AS-Result: No-12.694900-8.000000-10 X-TMASE-MatchedRID: C/snMIRQLS3mLzc6AOD8DfHkpkyUphL9NV9S7O+u3KZ+SLLtNOiBho+6 rpsQrK11Bu48gwYo41iclGPdyA5gnvirh+cliRUjXK5keCa+bmhr9+Kgn2XgeNZd/DOmlnxIz4r 7KlkL2+KY5cvP7IrCcrzJY6eQHnV+Ft1Iz38pf2bm96eHJyFxjRmyTBaqiJvcFBQ5IKls/A4lwx cYIrek6V3U5i4vdFnSryqHc9kSvF8/N5lw9tNRRIJgHeALbaZ/S1zwNuiBtITfUZT83lbkEB9hv NAbXVzo7+QCnKURZjJK5Bi1rXyCWC7VJbT1Ye1Wh2VzUlo4HVPLvfc3C6SWwpGPHiE2kiT4Kxiy iXkprBbs0AE5EQQPhp8doylyk3Kidsj49V16pSlsivAOGSeMWTFVRYZezcLzPpSpBc6D7BKrdy2 2UOhsDM+z2EHFW3bi5aqzNUw0vNjmLvr90L8tmZ4CIKY/Hg3AtOt1ofVlaoLUHQeTVDUrIldoOf oOEDYCjaPj0W1qn0Q7AFczfjr/7Mx79HxVOtRsGBP2KWUZGIOvmHIzs55c1a9S3AKBrPZUDcbtC eiC2mo= X-TM-AS-User-Approved-Sender: Yes X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--12.694900-8.000000 X-TMASE-Version: SMEX-12.5.0.1300-8.5.1010-24982.003 X-MDID: 1571303336-D_9x5O-NMsBD Subject: Re: [dpdk-dev] [PATCH v4] ethdev: add HIGIG2 key field to flow API X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 10/17/19 7:15 AM, kirankumark@marvell.com wrote: > From: Kiran Kumar K > > Add new rte_flow_item_higig2_hdr in order to match higig2 header. > It is a layer 2.5 protocol and used in broadcom switches. broadcom -> Broadcom > Header format is based on the following document. > http://read.pudn.com/downloads558/doc/comm/2301468/HiGig_protocol.pdf > > Signed-off-by: Kiran Kumar K > --- > V4 Changes: > * Removed packed attribute > > V3 Changes: > * Fixed Copyright header > * Fixed version info in the subject > > V2 Changes: > * Added support in testpmd to parse the higig2 item > * Moved the higig2 header to new file > * Added indentation in doc > > app/test-pmd/cmdline_flow.c | 33 +++++++ > doc/guides/prog_guide/rte_flow.rst | 8 ++ > lib/librte_ethdev/rte_flow.c | 1 + > lib/librte_ethdev/rte_flow.h | 7 ++ > lib/librte_net/Makefile | 2 +- > lib/librte_net/rte_higig.h | 138 +++++++++++++++++++++++++++++ meson.build should be updated as well [snip] > diff --git a/doc/guides/prog_guide/rte_flow.rst b/doc/guides/prog_guide/rte_flow.rst > index 1c837ff13..a47266c67 100644 > --- a/doc/guides/prog_guide/rte_flow.rst > +++ b/doc/guides/prog_guide/rte_flow.rst > @@ -1289,6 +1289,14 @@ Matches a IP Authentication Header (RFC 4302). > - ``seq_num``: counter value increased by 1 on each packet sent. > - Default ``mask`` matches spi. > > +Item: ``HIGIG2`` > +^^^^^^^^^^^^^^^^^ > + > +Matches a HIGIG2 header field. It is layer 2.5 protocol and used in > +broadcom switches. broadcom -> Broadcom [snip] > diff --git a/lib/librte_net/rte_higig.h b/lib/librte_net/rte_higig.h > new file mode 100644 > index 000000000..220cee827 > --- /dev/null > +++ b/lib/librte_net/rte_higig.h > @@ -0,0 +1,138 @@ > + > +/* SPDX-License-Identifier: BSD-3-Clause > + * Copyright(C) 2019 Marvell International Ltd. > + */ > + > +#ifndef _RTE_HIGIG2_H_ > +#define _RTE_HIGIG2_H_ It is inconsistent vs header name. Should be _RTE_HIGIG_H_. > + > +#include > +#include > + > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +/** > + * RTE_FLOW_ITEM_TYPE_HIGIG2 > + * Matches higig2 header. > + */ > +struct rte_higig2_frc { > +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN > + uint32_t ksop:8; > + uint32_t tc:4; > + uint32_t mcst:1; > + uint32_t resv:3; > + uint32_t dst_modid:8; > + uint32_t dst_pid:8; > + uint32_t src_modid:8; > + uint32_t src_pid:8; > + uint32_t lbid:8; > + uint32_t ppd_type:3; > + uint32_t resv1:3; > + uint32_t dp:2; > +#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN > + uint32_t ksop:8; > + uint32_t resv:3; > + uint32_t mcst:1; > + uint32_t tc:4; > + uint32_t dst_modid:8; > + uint32_t dst_pid:8; > + uint32_t src_modid:8; > + uint32_t src_pid:8; > + uint32_t lbid:8; > + uint32_t dp:2; > + uint32_t resv1:3; > + uint32_t ppd_type:3; > +#endif > +}; > + > +struct rte_higig2_ppt_type0 { > +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN > + uint32_t mirror:1; > + uint32_t mirror_done:1; > + uint32_t mirror_only:1; > + uint32_t ingress_tagged:1; > + uint32_t dst_tgid:3; > + uint32_t dst_t:1; > + uint32_t vc_label2:4; > + uint32_t label_present:1; > + uint32_t l3:1; > + uint32_t res:2; > + uint32_t vc_label1:8; > + uint32_t vc_label0:8; > + uint32_t vid_high:8; > + uint32_t vid_low:8; > + uint32_t opcode:3; > + uint32_t res1:2; > + uint32_t src_t:1; > + uint32_t pfm:2; > + uint32_t res2:5; > + uint32_t hdr_ext_len:3; > +#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN > + uint32_t dst_t:1; > + uint32_t dst_tgid:3; > + uint32_t ingress_tagged:1; > + uint32_t mirror_only:1; > + uint32_t mirror_done:1; > + uint32_t mirror:1; > + uint32_t res:2; > + uint32_t l3:1; > + uint32_t label_present:1; > + uint32_t vc_label2:4; > + uint32_t vc_label1:8; > + uint32_t vc_label0:8; > + uint32_t vid_high:8; > + uint32_t vid_low:8; > + uint32_t pfm:2; > + uint32_t src_t:1; > + uint32_t res1:2; > + uint32_t opcode:3; > + uint32_t hdr_ext_len:3; > + uint32_t res2:5; > +#endif > +}; > + > +struct rte_higig2_ppt_type1 { > + uint16_t classification; > + uint16_t resv; > + uint16_t vid; > +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN > + uint16_t opcode:3; > + uint16_t resv1:2; > + uint16_t src_t:1; > + uint16_t pfm:2; > + uint16_t resv2:5; > + uint16_t hdr_ext_len:3; > +#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN > + uint16_t pfm:2; > + uint16_t src_t:1; > + uint16_t resv1:2; > + uint16_t opcode:3; > + uint16_t hdr_ext_len:3; > + uint16_t resv2:5; > +#endif > +}; > + > +RTE_STD_C11 > +struct rte_flow_item_higig2_hdr { > + struct rte_higig2_frc fcr; > + union { > + struct rte_higig2_ppt_type0 ppt0; > + struct rte_higig2_ppt_type1 ppt1; > + }; > +}; > + > +/** Default mask for RTE_FLOW_ITEM_TYPE_HIGIG2. */ > +#ifndef __cplusplus > +static const struct rte_flow_item_higig2_hdr rte_flow_item_higig2_hdr_mask = { > + .ppt1.classification = 0xffff, > + .ppt1.vid = 0xfff, > +}; > +#endif > + > +#ifdef __cplusplus > +} > +#endif > + > +#endif /* RTE_HIGIG2_H_ */ Inconsistent as well.