From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pg0-f50.google.com (mail-pg0-f50.google.com [74.125.83.50]) by dpdk.org (Postfix) with ESMTP id AF8101B20C for ; Wed, 1 Nov 2017 05:48:45 +0100 (CET) Received: by mail-pg0-f50.google.com with SMTP id s75so1137483pgs.0 for ; Tue, 31 Oct 2017 21:48:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=subject:to:cc:references:from:message-id:date:user-agent :mime-version:in-reply-to:content-transfer-encoding; bh=SSPOgKvAgGvq+zGrrPAhZYFR5n8fUgUCgPt19P3V/P0=; b=jYhGHSky8ryrdNOQU6LUUptUEcUsypVjrvgJY+ANhCuRLIuG19BA6dK2pDPBBmeDVO 2qfylBy9kGSsbB+o0r/2q2NNqXg3yFrilSq/0mmPwbn5BspicBi1Y/TOg27RopXO8bnx XPqez6uedj/uLMZ/1SPc8+EQw/BEFXgJAGllDMLWdUhf4R9Bx2frCRvbIK47fWRZYwsl KaNWkyewwNKA/F+1WKlVhDWELOfnqa+nplLSuU11NDxFVlgWkE3du7RvZar2rpPFApye agCN7CyFtIixIJgA0kGllGriSZp0nhd+VSikw7dT+aIuxLzoMrjS3nXg6hgwT+sEuXaW 6YSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-transfer-encoding; bh=SSPOgKvAgGvq+zGrrPAhZYFR5n8fUgUCgPt19P3V/P0=; b=tA5BWiQEIFIZdaPLlK4pQJdLDPMlmaQdteevGsP8LlfJAaBlGXAKVK4q3SddF2TWo8 IeZCWykeNQI0y+GKdkZphN84aCK05hUj98yWNy7I6H1xIgCYKGMuPU2/3e6x3iuH1B22 0W4YgrSIvQYZvYm9zj405qydab0zBOu44F9HQ6k8QZ2zIK6UlIKVZBamjiCSOT99sFZ1 pc9Oj+PHgH2vk8NHkjTmhwwz+HaMOAEc6c9CmBOJxOQ6WC6mnDvere4PJfgUNIbaGCr1 N45zOmSF6V2SD3P7HPUdjQ9U6OEA15nsJctsZLO8RjUpnADspqsBbiF7r3TN/U6cL6yh KA+A== X-Gm-Message-State: AMCzsaWj11ZbjDjY76Zv16eiqYCchY9FJ6cxJ0K4N9QQYjmOiJ+Q4Tgx DSLNS0MTzuU8z0CWATpGyFw= X-Google-Smtp-Source: ABhQp+Qt4PzpWZ5W8jVLUziPDvlOsG25ASK4oWn3DJMek+NVNBNlqjH+EBf0wK4yipKefrFx5cCwcg== X-Received: by 10.98.181.3 with SMTP id y3mr4991353pfe.264.1509511723878; Tue, 31 Oct 2017 21:48:43 -0700 (PDT) Received: from [0.0.0.0] (67.209.179.165.16clouds.com. [67.209.179.165]) by smtp.gmail.com with ESMTPSA id r80sm5645184pfa.169.2017.10.31.21.48.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 31 Oct 2017 21:48:42 -0700 (PDT) To: Jerin Jacob Cc: "Ananyev, Konstantin" , "Zhao, Bing" , Olivier MATZ , "dev@dpdk.org" , "jia.he@hxt-semitech.com" , "jie2.liu@hxt-semitech.com" , "bing.zhao@hxt-semitech.com" , "Richardson, Bruce" , jianbo.liu@arm.com, hemant.agrawal@nxp.com References: <8806e2bd-c57b-03ff-a315-0a311690f1d9@163.com> <2601191342CEEE43887BDE71AB9772585FAAB404@IRSMSX103.ger.corp.intel.com> <2601191342CEEE43887BDE71AB9772585FAAB570@IRSMSX103.ger.corp.intel.com> <3e580cd7-2854-d855-be9c-7c4ce06e3ed5@gmail.com> <20171020054319.GA4249@jerin> <20171023100617.GA17957@jerin> <20171025132642.GA13977@jerin> <20171031111433.GA21742@jerin> From: Jia He Message-ID: Date: Wed, 1 Nov 2017 12:48:31 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 In-Reply-To: <20171031111433.GA21742@jerin> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Subject: Re: [dpdk-dev] [PATCH] ring: guarantee ordering of cons/prod loading when doing enqueue/dequeue X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 01 Nov 2017 04:48:45 -0000 Hi Jerin On 10/31/2017 7:14 PM, Jerin Jacob Wrote: > -----Original Message----- >> Date: Tue, 31 Oct 2017 10:55:15 +0800 >> From: Jia He >> To: Jerin Jacob >> Cc: "Ananyev, Konstantin" , "Zhao, Bing" >> , Olivier MATZ , >> "dev@dpdk.org" , "jia.he@hxt-semitech.com" >> , "jie2.liu@hxt-semitech.com" >> , "bing.zhao@hxt-semitech.com" >> , "Richardson, Bruce" >> >> Subject: Re: [dpdk-dev] [PATCH] ring: guarantee ordering of cons/prod >> loading when doing enqueue/dequeue >> User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101 >> Thunderbird/52.4.0 >> >> Hi Jerin > Hi Jia, > >> Do you think  next step whether I need to implement the load_acquire half >> barrier as per freebsd > I did a quick prototype using C11 memory model(ACQUIRE/RELEASE) schematics > and tested on two arm64 platform in Cavium(Platform A: Non arm64 OOO machine) > and Platform B: arm64 OOO machine) Can you elaborate anything about your Non arm64 OOO machine? As I know, all arm64 server is strong memory order. Am I missed anything? -- Cheers, Jia