From: Ferruh Yigit <ferruh.yigit@intel.com>
To: Yongseok Koh <yskoh@mellanox.com>, Shahaf Shuler <shahafs@mellanox.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>, "stable@dpdk.org" <stable@dpdk.org>
Subject: Re: [dpdk-dev] [dpdk-stable] [PATCH] net/mlx5: fix 32b compilation
Date: Thu, 13 Jun 2019 14:35:48 +0100 [thread overview]
Message-ID: <f2087e8f-be13-b061-8569-d464d4303302@intel.com> (raw)
In-Reply-To: <9b58271e-994d-d7d3-fd43-01a7f2105d23@intel.com>
On 6/13/2019 2:29 PM, Ferruh Yigit wrote:
> On 6/12/2019 10:25 PM, Yongseok Koh wrote:
>>
>>> On Jun 11, 2019, at 10:32 PM, Shahaf Shuler <shahafs@mellanox.com> wrote:
>>>
>>> 32b Compilation output the below error:
>>>
>>> drivers/net/mlx5/mlx5_txq.c: In function 'mlx5_txq_ibv_new':
>>> error: format '%lx' expects argument of type 'long unsigned int', but
>>> argument 8 has type 'off_t' [-Werror=format=]
>>> DRV_LOG(DEBUG, "port %u: uar_mmap_offset 0x%lx",
>>> ^
>>
>> off_t would have same size as pointer.
>> Changing lx to PRIxPTR would work?
>
> 'off_t' is no more same size as pointer, please check [1], otherwise what you
> said correct and code was working fine previously.
>
> Briefly, from build system we are asking/forcing off_t to be always 64-bit
Ahh, sorry I see what you mean after checking the patch J
You are right, I thinks patch should be something like:
- DRV_LOG(DEBUG, "port %u: uar_mmap_offset 0x%lx",
+ DRV_LOG(DEBUG, "port %u: uar_mmap_offset 0x%"PRIx64,
>
> [1]: https://mails.dpdk.org/archives/dev/2019-June/133819.html
>
>>
>>> Fixes: 6bf10ab69be0 ("net/mlx5: support 32-bit systems")
>>> Cc: stable@dpdk.org
>>>
>>> Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
>>> ---
>>> drivers/net/mlx5/mlx5_txq.c | 4 ++--
>>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c
>>> index ebb42cbffb..a421139e3c 100644
>>> --- a/drivers/net/mlx5/mlx5_txq.c
>>> +++ b/drivers/net/mlx5/mlx5_txq.c
>>> @@ -566,8 +566,8 @@ mlx5_txq_ibv_new(struct rte_eth_dev *dev, uint16_t idx)
>>> txq_uar_init(txq_ctrl);
>>> if (qp.comp_mask & MLX5DV_QP_MASK_UAR_MMAP_OFFSET) {
>>> txq_ctrl->uar_mmap_offset = qp.uar_mmap_offset;
>>> - DRV_LOG(DEBUG, "port %u: uar_mmap_offset 0x%lx",
>>> - dev->data->port_id, txq_ctrl->uar_mmap_offset);
>>> + DRV_LOG(DEBUG, "port %u: uar_mmap_offset 0x%x",
>>> + dev->data->port_id, (int)(txq_ctrl->uar_mmap_offset));
>>> } else {
>>> DRV_LOG(ERR,
>>> "port %u failed to retrieve UAR info, invalid"
>>> --
>>> 2.12.0
>>>
>>
>
next prev parent reply other threads:[~2019-06-13 13:35 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-12 5:32 [dpdk-dev] " Shahaf Shuler
2019-06-12 21:25 ` Yongseok Koh
2019-06-13 13:29 ` [dpdk-dev] [dpdk-stable] " Ferruh Yigit
2019-06-13 13:35 ` Ferruh Yigit [this message]
2020-01-13 14:22 ` [dpdk-dev] [PATCH] net/mlx5: fix doorbell register offset type Viacheslav Ovsiienko
2020-01-13 14:29 ` Matan Azrad
2020-01-15 10:09 ` Raslan Darawsheh
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