From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3B6A6A2EDB for ; Mon, 30 Sep 2019 17:07:01 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D924C1BEB5; Mon, 30 Sep 2019 17:07:00 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id C05E11B9B5 for ; Mon, 30 Sep 2019 17:06:58 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Sep 2019 08:06:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,567,1559545200"; d="scan'208";a="220681611" Received: from fyigit-mobl.ger.corp.intel.com (HELO [10.237.221.10]) ([10.237.221.10]) by fmsmga002.fm.intel.com with ESMTP; 30 Sep 2019 08:06:55 -0700 To: Xiaoyun wang Cc: dev@dpdk.org, xuanziyang2@huawei.com, shahar.belkar@huawei.com, luoxianjun@huawei.com, tanya.brokhman@huawei.com, zhouguoyang@huawei.com, wulike1@huawei.com References: From: Ferruh Yigit Openpgp: preference=signencrypt Autocrypt: addr=ferruh.yigit@intel.com; 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charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Subject: Re: [dpdk-dev] [PATCH v3 00/19] Add advanced features for Huawei hinic pmd X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 9/30/2019 3:00 PM, Xiaoyun wang wrote: > This patch set adds advanced features for Huawei hinic pmd, > such as VLAN filter and VLAN offload, SR-IOV, FW version get, > set link down and up, Flow director for LACP, VRRP, BGP and so on. > > -- > v2: > - Fix RSS bugs for vxlan packets inner type > - Add comments for new added func interface > - Fix code review comments from patch v1 > - Fix code style problems > - Remove ceq interfaces and definitions that not used > - Fix aeq init bugs, firstly alloc aeq resource, then set aeq ctrl len > - Fix bar map bugs for VF Page size larger than PF > - Modify link state set, add enable or disable fiber in tx direction > - Fix mbox and mgmt channel sync lock mechanism to reduce CPU usage > - Fix FDIR bugs for VRRP packets > - Fit ABI changes from dpdk lib > > v3: > - Split hinic.ini and hinic.rst to related feature patches > - Add min_mtu & max_mtu initialization for hinic_dev_infos_get > - Fix fdir config patch with net/hinic/base > - Split link patch into link and fw version getting 2 patches > - Update pmd doc files to new next version > - Add comments for cover letter patch > - Add rxq & txq info getting interfaces > - Fix load intrinsics for receiving packets > > Xiaoyun wang (19): > net/hinic/base: add mbox command channel for SRIOV > net/hinic/base: add HW interfaces for SR-IOV > net/hinic: add VF PMD operation interfaces > net/hinic: add VLAN filter and offload > net/hinic: add allmulticast mode and MTU set > net/hinic: add unicast and multicast MAC set > net/hinic/base: add fdir config interface > net/hinic: add fdir validate flow operations > net/hinic: create and destroy ntuple filter > net/hinic: create and destroy fdir filter > net/hinic: flush fdir filter > net/hinic: set link down and up > net/hinic: get firmware version > net/hinic: support inner L3 checksum offload > net/hinic: support LRO offload > net/hinic: add hinic PMD doc files > net/hinic/base: optimize aeq interfaces > net/hinic: optimize RX performance > net/hinic: add support for getting rxq or txq info There is following 32-bit build error because of the log formatting [1], can you please check it? [1] .../drivers/net/hinic/base/hinic_pmd_mbox.c(659): error #181: argument of type "unsigned long long" is incompatible with format "%lx", expecting argument of type "unsigned long" PMD_DRV_LOG(ERR, "Fail to send mbox seg, seq_id: 0x%lx, err: %d",