From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1245CA0093; Sun, 1 May 2022 19:10:07 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A263F40E28; Sun, 1 May 2022 19:10:06 +0200 (CEST) Received: from forward500p.mail.yandex.net (forward500p.mail.yandex.net [77.88.28.110]) by mails.dpdk.org (Postfix) with ESMTP id 5A96140DDB for ; Sun, 1 May 2022 19:10:05 +0200 (CEST) Received: from myt6-c5b71206f32d.qloud-c.yandex.net (myt6-c5b71206f32d.qloud-c.yandex.net [IPv6:2a02:6b8:c12:4a2d:0:640:c5b7:1206]) by forward500p.mail.yandex.net (Yandex) with ESMTP id 9EADEF01829; Sun, 1 May 2022 20:10:04 +0300 (MSK) Received: from myt6-265321db07ea.qloud-c.yandex.net (myt6-265321db07ea.qloud-c.yandex.net [2a02:6b8:c12:2626:0:640:2653:21db]) by myt6-c5b71206f32d.qloud-c.yandex.net (mxback/Yandex) with ESMTP id hL02ris6BJ-A4fWWYDm; Sun, 01 May 2022 20:10:04 +0300 X-Yandex-Fwd: 2 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=yandex.ru; s=mail; t=1651425004; bh=FRt7xXl+TlLl6nfrhMZuNrRXjJUjamiWu8vP2/xgens=; h=In-Reply-To:From:Subject:Cc:References:Date:Message-ID:To; b=fyoHA7NTcSa7xeU55EIp1kRSbiouDpCfcAzh3It7ld0EoFkPIPVQ2wVgggvxnCS6U sR+QHQKl0o3H5od5bJ8KtGGMpdz7KuAxChW1HT3Z79Ki0sUBljUDncKGToLns0Gvo4 G5+7HQumtF+kU0Ynr9UlrIPU8YmSTurq0136jk60= Authentication-Results: myt6-c5b71206f32d.qloud-c.yandex.net; dkim=pass header.i=@yandex.ru Received: by myt6-265321db07ea.qloud-c.yandex.net (smtp/Yandex) with ESMTPSA id XSJ2S3sEVp-A3LGIpB2; Sun, 01 May 2022 20:10:03 +0300 (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (Client certificate not present) Message-ID: Date: Sun, 1 May 2022 18:10:00 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.0 Subject: Re: [PATCH v4 2/7] examples/ipsec-secgw: disable Tx chksum offload for inline Content-Language: en-US To: Nithin Dabilpuram , jerinj@marvell.com, konstantin.ananyev@intel.com, Radu Nicolau , Akhil Goyal Cc: dev@dpdk.org, anoobj@marvell.com References: <20220322175902.363520-1-ndabilpuram@marvell.com> <20220429204416.12066-1-ndabilpuram@marvell.com> <20220429204416.12066-2-ndabilpuram@marvell.com> From: Konstantin Ananyev In-Reply-To: <20220429204416.12066-2-ndabilpuram@marvell.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org 29/04/2022 21:44, Nithin Dabilpuram пишет: > Enable Tx IPv4 checksum offload only when Tx inline crypto, lookaside > crypto/protocol or cpu crypto is needed. > For Tx Inline protocol offload, checksum computation > is implicitly taken care by HW. > > Signed-off-by: Nithin Dabilpuram > Acked-by: Akhil Goyal > --- > examples/ipsec-secgw/ipsec-secgw.c | 3 --- > examples/ipsec-secgw/sa.c | 46 ++++++++++++++++++++++++++++++++------ > 2 files changed, 39 insertions(+), 10 deletions(-) > > diff --git a/examples/ipsec-secgw/ipsec-secgw.c b/examples/ipsec-secgw/ipsec-secgw.c > index 959a20b..5fe5eee 100644 > --- a/examples/ipsec-secgw/ipsec-secgw.c > +++ b/examples/ipsec-secgw/ipsec-secgw.c > @@ -1761,9 +1761,6 @@ port_init(uint16_t portid, uint64_t req_rx_offloads, uint64_t req_tx_offloads) > local_port_conf.txmode.offloads |= > RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE; > > - if (dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM) > - local_port_conf.txmode.offloads |= RTE_ETH_TX_OFFLOAD_IPV4_CKSUM; > - > printf("port %u configuring rx_offloads=0x%" PRIx64 > ", tx_offloads=0x%" PRIx64 "\n", > portid, local_port_conf.rxmode.offloads, > diff --git a/examples/ipsec-secgw/sa.c b/examples/ipsec-secgw/sa.c > index 1839ac7..e8f2598 100644 > --- a/examples/ipsec-secgw/sa.c > +++ b/examples/ipsec-secgw/sa.c > @@ -1766,10 +1766,18 @@ sa_check_offloads(uint16_t port_id, uint64_t *rx_offloads, > struct ipsec_sa *rule; > uint32_t idx_sa; > enum rte_security_session_action_type rule_type; > + struct rte_eth_dev_info dev_info; > + int ret; > > *rx_offloads = 0; > *tx_offloads = 0; > > + ret = rte_eth_dev_info_get(port_id, &dev_info); > + if (ret != 0) > + rte_exit(EXIT_FAILURE, > + "Error during getting device (port %u) info: %s\n", > + port_id, strerror(-ret)); > + > /* Check for inbound rules that use offloads and use this port */ > for (idx_sa = 0; idx_sa < nb_sa_in; idx_sa++) { > rule = &sa_in[idx_sa]; > @@ -1785,13 +1793,37 @@ sa_check_offloads(uint16_t port_id, uint64_t *rx_offloads, > for (idx_sa = 0; idx_sa < nb_sa_out; idx_sa++) { > rule = &sa_out[idx_sa]; > rule_type = ipsec_get_action_type(rule); > - if ((rule_type == RTE_SECURITY_ACTION_TYPE_INLINE_CRYPTO || > - rule_type == > - RTE_SECURITY_ACTION_TYPE_INLINE_PROTOCOL) > - && rule->portid == port_id) { > - *tx_offloads |= RTE_ETH_TX_OFFLOAD_SECURITY; > - if (rule->mss) > - *tx_offloads |= RTE_ETH_TX_OFFLOAD_TCP_TSO; > + switch (rule_type) { > + case RTE_SECURITY_ACTION_TYPE_INLINE_PROTOCOL: > + /* Checksum offload is not needed for inline protocol as > + * all processing for Outbound IPSec packets will be > + * implicitly taken care and for non-IPSec packets, > + * there is no need of IPv4 Checksum offload. > + */ > + if (rule->portid == port_id) { > + *tx_offloads |= RTE_ETH_TX_OFFLOAD_SECURITY; > + if (rule->mss) > + *tx_offloads |= (RTE_ETH_TX_OFFLOAD_TCP_TSO | > + RTE_ETH_TX_OFFLOAD_IPV4_CKSUM); > + } > + break; > + case RTE_SECURITY_ACTION_TYPE_INLINE_CRYPTO: > + if (rule->portid == port_id) { > + *tx_offloads |= RTE_ETH_TX_OFFLOAD_SECURITY; > + if (rule->mss) > + *tx_offloads |= > + RTE_ETH_TX_OFFLOAD_TCP_TSO; > + *tx_offloads |= RTE_ETH_TX_OFFLOAD_IPV4_CKSUM; > + } > + break; > + default: > + /* Enable IPv4 checksum offload even if one of lookaside > + * SA's are present. > + */ > + if (dev_info.tx_offload_capa & > + RTE_ETH_TX_OFFLOAD_IPV4_CKSUM) > + *tx_offloads |= RTE_ETH_TX_OFFLOAD_IPV4_CKSUM; > + break; > } > } > return 0; Acked-by: Konstantin Ananyev