Hi, Wenjun > -----Original Message----- > From: Wu, Wenjun1 <wenjun1.wu@intel.com> > Sent: Tuesday, January 19, 2021 2:59 PM > To: dev@dpdk.org; Guo, Jia <jia.guo@intel.com>; Zhang, Qi Z > <qi.z.zhang@intel.com>; Zhang, Yuying <yuying.zhang@intel.com> > Cc: Wu, Wenjun1 <wenjun1.wu@intel.com>; stable@dpdk.org > Subject: [PATCH v1] net/e1000: fix the invalid flow control mode setting > > E1000_CTRL register should be updated according to fc_conf->mode's value. > > Fixes: af75078fece3 ("first public release") > Cc: stable@dpdk.org > > Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com> > --- > drivers/net/e1000/igb_ethdev.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/net/e1000/igb_ethdev.c > b/drivers/net/e1000/igb_ethdev.c index 647aa8d99..390737393 100644 > --- a/drivers/net/e1000/igb_ethdev.c > +++ b/drivers/net/e1000/igb_ethdev.c > @@ -3064,6 +3064,7 @@ eth_igb_flow_ctrl_set(struct rte_eth_dev *dev, > struct rte_eth_fc_conf *fc_conf) > uint32_t rx_buf_size; > uint32_t max_high_water; > uint32_t rctl; > + uint32_t ctrl; > > hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); > if (fc_conf->autoneg != hw->mac.autoneg) @@ -3101,6 +3102,15 > @@ eth_igb_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf > *fc_conf) > rctl &= ~E1000_RCTL_PMCF; > > E1000_WRITE_REG(hw, E1000_RCTL, rctl); > + Some document for ctrl, like rctl setting, would be appreciate. > + ctrl = E1000_READ_REG(hw, E1000_CTRL); > + ctrl &= ~(E1000_CTRL_RFCE|E1000_CTRL_TFCE); > + if (fc_conf->mode == RTE_FC_RX_PAUSE || fc_conf->mode > == RTE_FC_FULL) > + ctrl |= E1000_CTRL_RFCE; > + if (fc_conf->mode == RTE_FC_TX_PAUSE || fc_conf->mode > == RTE_FC_FULL) > + ctrl |= E1000_CTRL_TFCE; What about the case if fc_conf->mode == RTE_FC_NONE? Use a switch would be help for that? > + E1000_WRITE_REG(hw, E1000_CTRL, ctrl); > + > E1000_WRITE_FLUSH(hw); > > return 0; > -- > 2.25.1
Hi, wenjun > -----Original Message----- > From: Wu, Wenjun1 <wenjun1.wu@intel.com> > Sent: Wednesday, January 20, 2021 12:59 PM > To: dev@dpdk.org; Guo, Jia <jia.guo@intel.com> > Cc: Wu, Wenjun1 <wenjun1.wu@intel.com>; stable@dpdk.org > Subject: [PATCH v1] net/e1000: fix the invalid flow control mode setting > > E1000_CTRL register should be updated according to fc_conf->mode's value. > > Fixes: af75078fece3 ("first public release") > Cc: stable@dpdk.org > > Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com> > --- > drivers/net/e1000/igb_ethdev.c | 32 > ++++++++++++++++++++++++++++++++ > 1 file changed, 32 insertions(+) > > diff --git a/drivers/net/e1000/igb_ethdev.c > b/drivers/net/e1000/igb_ethdev.c index 647aa8d99..8fecd657d 100644 > --- a/drivers/net/e1000/igb_ethdev.c > +++ b/drivers/net/e1000/igb_ethdev.c > @@ -3064,6 +3064,7 @@ eth_igb_flow_ctrl_set(struct rte_eth_dev *dev, > struct rte_eth_fc_conf *fc_conf) > uint32_t rx_buf_size; > uint32_t max_high_water; > uint32_t rctl; > + uint32_t ctrl; > > hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); > if (fc_conf->autoneg != hw->mac.autoneg) @@ -3101,6 +3102,37 > @@ eth_igb_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf > *fc_conf) > rctl &= ~E1000_RCTL_PMCF; > > E1000_WRITE_REG(hw, E1000_RCTL, rctl); > + > + /* check if we want to change flow control mode - driver > doesn't have native > + * capability to do that, so we'll write the registers ourselves > */ No need the blank line with the code block which be explain by the doc, and please considerate the format for multiple line, like that: /* * XXXXX * XXXXX */ > + > + ctrl = E1000_READ_REG(hw, E1000_CTRL); > + > + /* set or clear E1000_CTRL_RFCE and E1000_CTRL_TFCE bits > depending > + * on configuration */ > + Ditto. > + switch (fc_conf->mode) { > + case RTE_FC_NONE: > + ctrl &= ~E1000_CTRL_RFCE & ~E1000_CTRL_TFCE; > + break; > + case RTE_FC_RX_PAUSE: > + ctrl |= E1000_CTRL_RFCE; > + ctrl &= ~E1000_CTRL_TFCE; > + break; > + case RTE_FC_TX_PAUSE: > + ctrl |= E1000_CTRL_TFCE; > + ctrl &= ~E1000_CTRL_RFCE; > + break; > + case RTE_FC_FULL: > + ctrl |= E1000_CTRL_RFCE | E1000_CTRL_TFCE; > + break; > + default: > + PMD_INIT_LOG(ERR, "invalid flow control mode"); > + return -EIO; Would be better if use "-EINVAL" for the meaning of invalid configure mode? > + } > + > + E1000_WRITE_REG(hw, E1000_CTRL, ctrl); > + > E1000_WRITE_FLUSH(hw); > > return 0; > -- > 2.25.1
E1000_CTRL register should be updated according to fc_conf->mode's value. Fixes: af75078fece3 ("first public release") Cc: stable@dpdk.org Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com> --- drivers/net/e1000/igb_ethdev.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c index 647aa8d99..a8fc57d2c 100644 --- a/drivers/net/e1000/igb_ethdev.c +++ b/drivers/net/e1000/igb_ethdev.c @@ -3064,6 +3064,7 @@ eth_igb_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) uint32_t rx_buf_size; uint32_t max_high_water; uint32_t rctl; + uint32_t ctrl; hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); if (fc_conf->autoneg != hw->mac.autoneg) @@ -3101,6 +3102,39 @@ eth_igb_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) rctl &= ~E1000_RCTL_PMCF; E1000_WRITE_REG(hw, E1000_RCTL, rctl); + + /* + * check if we want to change flow control mode - driver doesn't have native + * capability to do that, so we'll write the registers ourselves + */ + ctrl = E1000_READ_REG(hw, E1000_CTRL); + + /* + * set or clear E1000_CTRL_RFCE and E1000_CTRL_TFCE bits depending + * on configuration + */ + switch (fc_conf->mode) { + case RTE_FC_NONE: + ctrl &= ~E1000_CTRL_RFCE & ~E1000_CTRL_TFCE; + break; + case RTE_FC_RX_PAUSE: + ctrl |= E1000_CTRL_RFCE; + ctrl &= ~E1000_CTRL_TFCE; + break; + case RTE_FC_TX_PAUSE: + ctrl |= E1000_CTRL_TFCE; + ctrl &= ~E1000_CTRL_RFCE; + break; + case RTE_FC_FULL: + ctrl |= E1000_CTRL_RFCE | E1000_CTRL_TFCE; + break; + default: + PMD_INIT_LOG(ERR, "invalid flow control mode"); + return -EINVAL; + } + + E1000_WRITE_REG(hw, E1000_CTRL, ctrl); + E1000_WRITE_FLUSH(hw); return 0; -- 2.25.1
Acked-by: Jeff Guo <jia.guo@intel.com>
> -----Original Message-----
> From: Wu, Wenjun1 <wenjun1.wu@intel.com>
> Sent: Wednesday, January 20, 2021 2:54 PM
> To: dev@dpdk.org; Guo, Jia <jia.guo@intel.com>
> Cc: Wu, Wenjun1 <wenjun1.wu@intel.com>; stable@dpdk.org
> Subject: [PATCH v1] net/e1000: fix the invalid flow control mode setting
>
> E1000_CTRL register should be updated according to fc_conf->mode's value.
>
> Fixes: af75078fece3 ("first public release")
> Cc: stable@dpdk.org
>
> Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
> ---
> drivers/net/e1000/igb_ethdev.c | 34
> ++++++++++++++++++++++++++++++++++
> 1 file changed, 34 insertions(+)
>
> diff --git a/drivers/net/e1000/igb_ethdev.c
> b/drivers/net/e1000/igb_ethdev.c index 647aa8d99..a8fc57d2c 100644
> --- a/drivers/net/e1000/igb_ethdev.c
> +++ b/drivers/net/e1000/igb_ethdev.c
> @@ -3064,6 +3064,7 @@ eth_igb_flow_ctrl_set(struct rte_eth_dev *dev,
> struct rte_eth_fc_conf *fc_conf)
> uint32_t rx_buf_size;
> uint32_t max_high_water;
> uint32_t rctl;
> + uint32_t ctrl;
>
> hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
> if (fc_conf->autoneg != hw->mac.autoneg) @@ -3101,6 +3102,39
> @@ eth_igb_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf
> *fc_conf)
> rctl &= ~E1000_RCTL_PMCF;
>
> E1000_WRITE_REG(hw, E1000_RCTL, rctl);
> +
> + /*
> + * check if we want to change flow control mode - driver
> doesn't have native
> + * capability to do that, so we'll write the registers ourselves
> + */
> + ctrl = E1000_READ_REG(hw, E1000_CTRL);
> +
> + /*
> + * set or clear E1000_CTRL_RFCE and E1000_CTRL_TFCE bits
> depending
> + * on configuration
> + */
> + switch (fc_conf->mode) {
> + case RTE_FC_NONE:
> + ctrl &= ~E1000_CTRL_RFCE & ~E1000_CTRL_TFCE;
> + break;
> + case RTE_FC_RX_PAUSE:
> + ctrl |= E1000_CTRL_RFCE;
> + ctrl &= ~E1000_CTRL_TFCE;
> + break;
> + case RTE_FC_TX_PAUSE:
> + ctrl |= E1000_CTRL_TFCE;
> + ctrl &= ~E1000_CTRL_RFCE;
> + break;
> + case RTE_FC_FULL:
> + ctrl |= E1000_CTRL_RFCE | E1000_CTRL_TFCE;
> + break;
> + default:
> + PMD_INIT_LOG(ERR, "invalid flow control mode");
> + return -EINVAL;
> + }
> +
> + E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
> +
> E1000_WRITE_FLUSH(hw);
>
> return 0;
> --
> 2.25.1
> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Guo, Jia
> Sent: Wednesday, January 20, 2021 3:19 PM
> To: Wu, Wenjun1 <wenjun1.wu@intel.com>; dev@dpdk.org
> Cc: stable@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH v1] net/e1000: fix the invalid flow control mode
> setting
>
> Acked-by: Jeff Guo <jia.guo@intel.com>
>
> > -----Original Message-----
> > From: Wu, Wenjun1 <wenjun1.wu@intel.com>
> > Sent: Wednesday, January 20, 2021 2:54 PM
> > To: dev@dpdk.org; Guo, Jia <jia.guo@intel.com>
> > Cc: Wu, Wenjun1 <wenjun1.wu@intel.com>; stable@dpdk.org
> > Subject: [PATCH v1] net/e1000: fix the invalid flow control mode
> > setting
> >
> > E1000_CTRL register should be updated according to fc_conf->mode's value.
> >
> > Fixes: af75078fece3 ("first public release")
> > Cc: stable@dpdk.org
> >
> > Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Applied to dpdk-next-net-intel.
Thanks
Qi